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Computer System Architecture Computer System Operation
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Device Status Table Direct Memory Access DMA Structure. Used for high speed I O devices able to transmit information at. close to memory speeds, Device controller transfers blocks of data from buffer storage. directly to main memory without CPU intervention, Only one interrupt is generated per block rather than the one. interrupt per byte, Operating System Concepts 2 5 Silberschatz and Galvin 2004 revised by Wiseman Operating System Concepts 2 6 Silberschatz and Galvin 2004 revised by Wiseman. Storage Structure Moving Head Disk Mechanism, Main memory only large storage media that the CPU can. access directly, Secondary storage extension of main memory that provides.
large nonvolatile storage capacity, Magnetic disks rigid metal or glass platters covered with. magnetic recording material, Disk surface is logically divided into tracks which are. subdivided into sectors, The disk controller determines the logical interaction. between the device and the computer, Operating System Concepts 2 7 Silberschatz and Galvin 2004 revised by Wiseman Operating System Concepts 2 8 Silberschatz and Galvin 2004 revised by Wiseman. Storage Hierarchy Migration of A From Disk to Register. Storage systems organized in hierarchy, volatility.
Caching copying information into faster storage system main. memory can be viewed as a cache for secondary storage Use of high speed memory to hold recently accessed data. Requires a cache management policy Caching introduces. another level in storage hierarchy This requires data that is. simultaneously stored in more than one level to be consistent. Operating System Concepts 2 9 Silberschatz and Galvin 2004 revised by Wiseman Operating System Concepts 2 10 Silberschatz and Galvin 2004 revised by Wiseman. Dual Mode Operation Dual Mode Operation Cont, Sharing system resources requires operating system to ensure Mode bit added to computer hardware to indicate the current. that an incorrect program cannot cause other programs to mode kernel 0 or user 1. execute incorrectly, When an interrupt or fault occurs hardware switches to kernel. Provides hardware support to differentiate between at least two mode. modes of operations Interrupt fault, 1 User mode execution done on behalf of a user. 2 Kernel mode also monitor mode supervisor mode or. system mode execution done on behalf of operating kernel user. set user mode, Privileged instructions can be issued only in kernel mode. Operating System Concepts 2 11 Silberschatz and Galvin 2004 revised by Wiseman Operating System Concepts 2 12 Silberschatz and Galvin 2004 revised by Wiseman. I O Protection Use of a System Call to Perform an I O. Must ensure that a user program, All I O instructions are privileged instructions could never gain control of the.
Given the I O instructions are privileged how does the user computer in kernel mode. program perform I O Otherwise undesirable actions, can be done e g a user program. System call the method used by a process to request action by that as part of its execution. the operating system stores a new address in the, Usually takes the form of a trap to a specific location in the interrupt vector. interrupt vector, Control passes through the interrupt vector to a service. routine in the OS and the mode bit is set to kernel mode. The kernel verifies that the parameters are correct and. legal executes the request and returns control to the. instruction following the system call, Operating System Concepts 2 13 Silberschatz and Galvin 2004 revised by Wiseman Operating System Concepts 2 14 Silberschatz and Galvin 2004 revised by Wiseman. Memory Protection A Base And A limit Register Define A Logical Address Space. Must provide memory protection at least for the interrupt vector. and the interrupt service routines, In order to have memory protection add two registers that.
determine the range of legal addresses a program may access. base register holds the smallest legal physical memory. Limit register contains the size of the range, Memory outside the defined range is protected. Operating System Concepts 2 15 Silberschatz and Galvin 2004 revised by Wiseman Operating System Concepts 2 16 Silberschatz and Galvin 2004 revised by Wiseman. Protection Hardware CPU Protection, Timer interrupts computer after specified period to ensure. operating system maintains control, Timer is decremented every clock tick. When timer reaches the value 0 an interrupt occurs. Timer commonly used to implement time sharing, Time also used to compute the current time. Load timer is a privileged instruction, When executing in kernel mode the operating system has.
unrestricted access to both kernel and user s memory. The load instructions for the base and limit registers are. privileged instructions, Operating System Concepts 2 17 Silberschatz and Galvin 2004 revised by Wiseman Operating System Concepts 2 18 Silberschatz and Galvin 2004 revised by Wiseman. Computer System Architecture Operating System Concepts 2 2 Silberschatz and Galvin 2004 revised by Wiseman Computer System Operation I O devices and the CPU can execute concurrently Each device controller is in charge of a particular device type Each device controller has a local buffer

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Computer System Architecture Operating System Concepts 2 3 Silberschatz Galvin and Gagne 2002 Computer System Operation I O devices and the CPU can execute concurrently Each device controller is in charge of a particular device type Each device controller has a local buffer CPU moves data from to main memory to from local buffers I O is from the device to local buffer of controller