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MIPS Assembly Language Programming

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MIPS Assembly Language ProgrammingRobert BrittonComputer Science DepartmentCalifornia State University, ChicoChico, California

Instructors are granted permission to make copies of this beta version textbook for use bystudents in their courses. Title to and ownership of all intellectual property rights in thisbook are the exclusive property of Robert Britton, Chico, California.ii

PrefaceThis book is targeted for use in an introductory lower-division assembly languageprogramming or computer organization course. After students are introduced to the MIPSarchitecture using this book, they will be well prepared to go on to an upper-divisioncomputer organization course using a textbook such as “Computer Organization andDesign” by Patterson and Hennessy. This book provides a technique that will make MIPSassembly language programming a relatively easy task as compared to writing complexIntel 80x86 assembly language code. Students using this book will acquire anunderstanding of how the functional components of computers are put together, and howa computer works at the machine language level. We assume students have experience indeveloping algorithms, and running programs in a high-level language.Chapter 1 provides an introduction to the basic MIPS architecture, which is a modernReduced Instruction Set Computer (RISC). Chapter 2 shows how to develop codetargeted to run on a MIPS processor using an intermediate pseudocode notation similar tothe high-level language “C”, and how easy it is to translate this notation to MIPSassembly language.Chapter 3 is an introduction to the binary number system, and the rules for performingarithmetic, as well as detecting overflow. Chapter 4 explains the features of the PCSpimsimulator for the MIPS architecture, which by the way is available for free. Within theremaining chapters, a wealth of programming exercises are provided, which everystudent needs to become an accomplished assembly language programmer. Instructorsare provided with a set of PowerPoint slides. After students have had an opportunity todevelop their pseudocode and their MIPS assembly language code for each of theexercises, they can be provided with example solutions via the PowerPoint slides.In Chapter 5 students are presented with the classical I/O algorithms for decimal andhexadecimal representation. The utility of logical operators and shift operators arestressed. In Chapter 6, a specific argument passing protocol is defined. Most significantprogramming projects are a teamwork effort. Emphasis is placed on the importance thateveryone involved in a teamwork project must adopt the same convention for parameterpassing. In the case of nested function calls, a specific convention is defined for savingand restoring values in the temporary registers. In Chapter 7 the necessity for reentrantcode is explained, as well as the rules one must follow to write such functions. Chapter 8introduces exceptions and exception processing. In Chapter 9 a pipelined implementationof the MIPS architecture is presented, and the special programming considerationsdealing with delayed loads and delayed branches are discussed. The final chapter brieflydescribes the expanding opportunities in the field of embedded processors forprogrammers who have a solid understanding of the underlying processor functionality.Robert BrittonMay 2002iii

ContentsCHAPTER 1: The MIPS Architecture. 11.1Introduction. 11.2The Datapath Diagram. 11.3Instruction Fetch and Execute. 21.4The MIPS Register File . 31.5The Arithmetic and Logic Unit (ALU). 31.6The Program Counter (PC) . 41.7Memory. 51.8The Instruction Register (IR) . 51.9The Control Unit . 51.10 Instruction Set . 61.11 Addressing Modes . 71.12 Summary. 8Exercises . 8CHAPTER 2: Pseudocode . 92.1Introduction. 92.2Develop the Algorithm in Pseudocode . 92.3Register Usage Convention. 122.4The MIPS Instruction Set. 122.5Translation of an “IF THEN ELSE” Control Structure . 132.6Translation of a “WHILE” Control Structure. 142.7Translation of a “FOR LOOP” Control Structure. 142.8Translation of Arithmetic Expressions . 152.9Translation of a “SWITCH” Control Structure . 162.10 Assembler Directives . 172.11 Input and Output . 18Exercises . 18CHAPTER 3: Number Systems. 213.1Introduction. 213.2Positional Notation. 213.3Converting Binary Numbers to Decimal Numbers. 223.4Detecting if a Binary Number is Odd or Even. 223.5Multiplication by Constants that are a Power of Two . 233.6The Double and Add Method . 233.7Converting Decimal Numbers to Binary Numbers. 243.8The Two’s Complement Number System. 243.9The Two’s Complement Operation . 253.10 A Shortcut for Finding the Two’s Complement of any Number . 253.11 Sign Extension . 263.12 Binary Addition . 263.13 Binary Subtraction . 263.14 Overflow Detection. 273.15 Hexadecimal Numbers. 27iv

Exercises . 28CHAPTER 4: PCSpim The MIPS Simulator. 314.1Introduction. 314.2Advantages of a Simulator. 314.3The Big Picture . 324.4Analyzing the Text Segment. 344.5Analyzing the Data Segment . 354.6System I/O . 364.7Deficiencies of the System I/O Services. 36Exercises . 38CHAPTER 5: Algorithm Development . 395.1Introduction. 395.2Instructions that Perform Logical Operations. 395.3Instructions that Perform Shift Operations . 415.4Modular Program Design and Documentation . 425.5A Function to Print Values in Hexadecimal Representation . 475.6A Function to Read Values in Hexadecimal Representation. 485.7A Function to Print Decimal Values Right Justified . 495.8A Function to Read Decimal Values and Detect Errors . 49Exercises . 50CHAPTER 6: Function Calls Using the Stack . 536.1Introduction. 536.2The Stack Segment in Memory. 536.3Argument Passing Convention . 536.4Nested Function Calls and Leaf Functions . 546.5Local Variables are Allocated Space on the Stack . 556.6Frame Pointer. 55Exercises . 56CHAPTER 7: Reentrant Functions. 597.1Introduction. 597.2Rules for Writing Reentrant Code . 597.3Reentrant I/O Functions. 607.4Personal Computers . 607.5Recursive Functions. 60Exercises . 61CHAPTER 8: Exception Processing. 638.1Introduction. 638.2The Trap Handler. 63Exercises . 65CHAPTER 9: A Pipelined Implementation. 679.1Introduction. 679.2A Pipelined Datapath . 689.3PCSpim Option to Simulate a Pipelined Implementation. 69Exercises . 69v

CHAPTER 10: Embedded Processors . 7110.1 Introduction. 7110.2 Code Development for Embedded Processors. 7110.3 Memory Mapped I/O . 7210.4 References. 72APPENDIX A: Quick Reference. 73APPENDIX B: ASCII Codes. 77APPENDIX C: Integer Instruction Set . 79APPENDIX D: Macro Instructions . 95APPENDIX E: A Trap Handler. 100Related Web Siteswww.mips.com/http://www.ecst.csuchico.edu/ brittonhttp://www.cs.wisc.edu/ ter.asphttp://www.cs.wisc.edu/ larus/SPIM/cod-appa.pdfvi

CHAPTER 1The MIPS ArchitectureIf at first you don’t succeed,Skydiving is definitely not for you.1.1IntroductionThis book provides a technique that will make MIPS assembly language programming arelatively easy task as compared to writing Intel 80x86 assembly language code. Weare assuming that you have experience in developing algorithms, and running programsin some high level language such as Pascal, C, C , or JAVA. One of the benefits ofunderstanding and writing assembly language code is that you will have new insights intohow to write more efficient, high-level language code. You will become familiar with thetask that is performed by a compiler and how computers are organized down to the basicfunctional component level. You may even open new opportunities for yourself in theexploding field of embedded processors.The first thing everyone must do to apply this technique is to become familiar with theMIPS architecture. The architecture of any computer is defined by the registers that areavailable (visible) to the assembly language programmer, the instruction set, the memoryaddressing modes, and the data types.1.2The Datapath DiagramIt is very useful to have a picture of a datapath diagram that depicts the essentialcomponents and features of the MIPS architecture. Please note that there are manydifferent ways that an architecture can be implemented in hardware. These days,pipelined and superscalar implementations are common in high-performance processors.An initial picture of a MIPS datapath diagram will be the straightforward simple diagramshown in Figure 1.1. This is not a completely accurate diagram for the MIPS architecture;it is just a useful starting point.1

Program Counter (PC)MemoryOutAddressInstruction RegisterALUControlLogicRdRsRt4Data InRegister FileFigure 1.1 MIPS Simplified Datapath Diagram1.3Instruction Fetch and ExecuteComputers work by fetching machine language instructions from memory, decoding andexecuting them. Machine language instructions and the values that are operated upon areencoded in binary. Chapter 3 introduces the binary number system. As we progressthrough the first two chapters, we will be expressing values as decimal values, but keepin mind that in an actual MIPS processor these values are encoded in binary. The basicfunctional components of the MIPS architecture shown in Figure 1.1 are:(a)Program Counter (PC)(b)Memory(c)Instruction Register (IR)(d)Register File(e)Arithmetic and Logic Unit (ALU)(f)Control UnitInterconnecting all of these components, except the control unit, are busses. A bus isnothing more than a set of electrical conducting paths over which different sets of binaryvalues are transmitted. Most of the busses in the MIPS architecture are 32-bits wide. Inother words, 32 separate, tiny wires running from a source to a destination.2

In this datapath diagram, we have the situation where we need to route information frommore than one source to a destination, such as the ALU. One way to accomplish this iswith a multiplexer. Multiplexers are sometimes called data selectors. In Figure 1.1,multiplexers are represented by the triangle-shaped symbols. Every multiplexer with twoinput busses must have a single control signal connected to it. This control signal comesfrom the control unit. The control signal is either the binary value zero or one, which issent to the multiplexer over a single wire. In Figure 1.1, we have not shown any of thecontrol signals, because it would make the diagram too busy. When the control signal iszero, the 32-bit value connected to input port zero (0) of the multiplexer will appear onthe output of the multiplexer. When the control signal is one, the 32-bit value connectedto input port one (1) of the multiplexer will appear on the output of the multiplexer. Theacronym “bit” is an abbreviation of “binary digit.”1.4The MIPS Register FileThe term “register” refers to an electronic storage component. Every register in the MIPSarchitecture is a component with a capacity to hold a 32-bit binary number. Anyone whohas ever used an electronic hand-held calculator has experienced the fact that there issome electronic component inside the calculator that holds the result of the latestcomputation.The MIPS architecture has a register file containing 32 registers. See Figure 1.2. Eachregister has a capacity to hold a 32-bit value. The range of values that can be representedwith 32 bits is -2,147,483,648 to 2,147,483,647. When writing at the assembly languagelevel almost every instruction requires that the programmer specify which registers in theregister file are used in the execution of the instruction. A convention has been adoptedthat specifies which registers are appropriate to use in specific circumstances. Theregisters have been given names that help to remind us about this convention. Register zero is special; it is the source of the constant value zero. Nothing can be stored inregister zero. Register number 1 has the name at, which stands for assemblertemporary. This register is reserved to implement “macro instructions” and should not beused by the assembly language programmer. Registers k0 and k1 are used by thekernel of the operating system and should not be changed by a user program.1.5The Arithmetic and Logic Unit (ALU)The ALU, as its name implies, is a digital logic circuit designed to perform binaryarithmetic operations, as well as binary logical o

targeted to run on a MIPS processor using an intermediate pseudocode notation similar to the high-level language “C”, and how easy it is to translate this notation to MIPS assembly language. Chapter 3 is an introduction to the binary num