AN3181 Application Note - STMicroelectronics

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AN3181Application noteGuidelines for obtaining UL/CSA/IEC 60730-1/60335-1Class B certification in any STM8 applicationIntroductionThe role of safety is more and more important in electronic applications. The level of safetyrequirements for components used in electronic designs is steadily increasing and themanufacturers of electronic devices include many new technical solutions in the design ofnew components. Software techniques for improving safety are continuously beingdeveloped, and also the associated standards related to safety requirements for hardwareand software are in continuous development.The current safety recommendations and requirements are specified in world widerecognized standards issued by IEC (International Electrotechnical Commission), UL(Underwriters Laboratories) and CSA (Canadian Standards Association) authorities, andcome under compliance, verification and certification process by institutions like TUV andVDE (mostly operating in Europe), UL and CSA (targeting mainly US and Canadianmarkets).The main purpose of this application note and of its associated software(STM8-SafeCLASSB) is to facilitate and accelerate user software development andcertification processes for applications (based on STM8 microcontrollers) that are subject tothese requirements and certifications.The certified package is provided for: Mainstream STM8S and automotive STM8A high, medium and low density devices Ultra-low-power medium-density STM8L and STM8AL devices Ultra-low-power low density STM8L, STM8AL and STM8TL touch-sensing devices.Due to limited memory capacity of most of 8-bit devices all these packages are optimizedand independent from other firmware libraries published by ST. Proper headersstm8xxx it.h and stm8xxx type.h from ST standard peripheral libraries are included only tokeep consistency of names of registers, bit masks, interrupt vectors and constants definedthere. Optimized code reduces program memory overhead and increases the codeexecution speed.All certified packages use similar principles, described in this document with focus on themain differences. Provided hardware and firmware compatibility within the STM8 sub-classis ensured, the user can easily adapt the projects included in the package to all the STM8microcontrollers.The STL package is pre-certified for the methodology and the used techniques. Theprovided examples show how to integrate the STL package in the application, however thefinal implementation and functionality has to be always verified by the certification body atthe application level.February 2018AN3181 Rev 41/47www.st.com1

ContentsAN3181Contents1Package overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62Package structure overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83Main differences from the product point of view . . . . . . . . . . . . . . . . . 1143.1Clock system test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.2RAM test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.3Flash memory integrity test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.4Start-up and system initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143.5Firmware configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Compliance with IEC, UL and CSA standards . . . . . . . . . . . . . . . . . . . 164.1Generic tests included in STL firmware package . . . . . . . . . . . . . . . . . . . 184.2Application specific tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204.35Analog signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 204.2.2Digital I/Os . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214.2.3Interrupts and external communication . . . . . . . . . . . . . . . . . . . . . . . . . 214.2.4Timing and program flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214.2.5External addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Safety life cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Class B software package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245.15.25.32/474.2.1Common software principles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245.1.1Fail Safe mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245.1.2Class B variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245.1.3Class B flow control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Firmware package structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285.2.1Projects and workspaces included in the package . . . . . . . . . . . . . . . . 285.2.2Tools and other specifc controls of the library . . . . . . . . . . . . . . . . . . . . 285.2.3Application examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29Package configuring and debugging . . . . . . . . . . . . . . . . . . . . . . . . . . . . 295.3.1Configuration control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 295.3.2Verbose diagnostic mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30AN3181 Rev 4

AN3181Contents5.3.36Debugging the package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Class B solution integration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 326.1Integrating software into user application . . . . . . . . . . . . . . . . . . . . . . . . . 326.2Detailed description of startup self tests . . . . . . . . . . . . . . . . . . . . . . . . . . 326.2.1Watchdog startup self test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 336.2.2CPU startup self test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 346.2.3Flash memory complete checksum self test . . . . . . . . . . . . . . . . . . . . . 346.2.4Full RAM March C-/X self test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 356.2.5Clock startup self test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 366.3Periodic run mode self tests initialization . . . . . . . . . . . . . . . . . . . . . . . . . 376.4Detailed description of periodic run mode self tests . . . . . . . . . . . . . . . . . 386.4.1Run time self tests structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 386.4.2CPU light run mode self test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 396.4.3Stack boundaries run mode test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 396.4.4Clock run mode self test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 406.4.5Partial Flash memory CRC run mode self test . . . . . . . . . . . . . . . . . . . 416.4.6Watchdog service in run mode test . . . . . . . . . . . . . . . . . . . . . . . . . . . . 426.4.7Partial RAM run mode self test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Appendix A STM8 Class B firmware package variations . . . . . . . . . . . . . . . . . . 44Appendix B List of verbose messages and codes reported at Fail Safe modeentry45Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46AN3181 Rev 43/473

List of tablesAN3181List of tablesTable 1.Table 2.Table 3.Table 4.Table 5.Table 6.Table 7.Table 8.Table 9.Table 10.Table 11.Table 12.Table 13.Table 14.4/47Projects related to STM8-SafeCLASSB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8FW organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Overview of common STL procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Overview of common tool specific STL procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Integration support files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10STM8 compatibility aspects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Specific compiler configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14STL specific configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14MCU parts that must be tested under Class B compliance . . . . . . . . . . . . . . . . . . . . . . . . 18Methods used in micro specific tests of associated ST package . . . . . . . . . . . . . . . . . . . . 19March C- phases at RAM partial test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43STM8 Class B firmware packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44Verbose messages and unique codes reported at Fail Safe mode entry . . . . . . . . . . . . . . 45Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46AN3181 Rev 4

AN3181List of figuresList of figuresFigure 1.Figure 2.Figure 3.Figure 4.Figure 5.Figure 6.Figure 7.Figure 8.Figure 9.Figure 10.Figure 11.Figure 12.Figure 13.Figure 14.Figure 15.Figure 16.Figure 17.Figure 18.Figure 19.Example of RAM memory configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25Control flow four steps check routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27Diagnostic LED timing signal principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30Integration of startup and periodic run mode self tests into application . . . . . . . . . . . . . . . 32startup self tests structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33Watchdogs startup self test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34CPU startup self test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34Flash memory startup self test structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35RAM startup self test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Clock startup self test subroutine structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Periodic run mode self test initialization structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38Periodic run mode self test and time base interrupt service structure . . . . . . . . . . . . . . . . 39CPU light run mode self test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39Stack overflow run mode test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40Clock run mode self test structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40Clock run mode self test principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Partial Flash memory CRC run mode self test structure. . . . . . . . . . . . . . . . . . . . . . . . . . . 41Partial RAM run mode self test structure) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Fault coupling principle used in partial RAM run mode self test . . . . . . . . . . . . . . . . . . . . . 43AN3181 Rev 45/475

Package overview1AN3181Package overviewAvailable configurations of STM8S/A package support the following devices: STM8S high-density Performance line devices, with 32 to128 Kbytes Flash memory(like STM8S20x) STM8S medium- and low-density Access line devices, with 4 to 32 Kbytes Flashmemory (like STM8S105x, STM8S103x) STM8S high-, medium- and low-density Value Line devices, with 4 to 64 Kbytes Flashmemory (like STM8S007x, STM8S005x, STM8S003x) STM8S low-density Application specific devices, with 8 Kbytes Flash memory (likeSTM8S903x) STM8A high-density CAN line devices, with 32 to 128 Kbytes Flash memory (likeSTM8AF5xxx) STM8A high and medium density Standard line devices, with 8 to 128 Kbytes Flashmemory (like (STM8AF6xxx)Available configurations of medium-density STM8L/AL package support the followingultra-low-power devices: STM8L medium density standard devices, with 4 to 64 Kbytes Flash memory (likeSTM8L15xx) STM8L medium-density Value Line devices, with 4 to 64 Kbytes Flash memory (likeSTM8L05xx) STM8AL medium-density devices, with up to 32 Kbytes Flash memory (likeSTM8AL31xx, STM8AL3Lxx)Available configurations of low-density STM8L/AL/TL package support the followingultra-low-power devices: STM8L low density standard devices, with up to 8 Kbytes Flash memory (likeSTM8L10xx) STM8AL low density devices, with up to 8 Kbytes Flash memory (like STM8AL30xx) STM8TL low density devices, with up to 16 Kbytes Flash memory and touch sensinginterface (like STM8TL53xxx)All these firmware packages are available on www.st.com.The STM8 microcontrollers are based on a proprietary advanced 8-bit architecture core,performing up to 20 MIPS at 24 MHz.Two projects have been prepared and tested for each package, using the followingenvironment and toolchains:6/471.IAR Embedded Workbench for STM8 IDE (EWSTM8 ) with IAR C/C Compiler version 3.10.12.ST Visual Develop (STVD) version 4.3.11 with Cosmic STM8 C compiler 32 Kversion 4.4.6AN3181 Rev 4

AN3181Package overviewFor more info on ElectroMagnetic Compatibility (EMC) refer to the following applicationnotes, available on www.st.com:AN1015, Software techniques for improving microcontroller EMC performance AN1709, EMC design guide AN2860, EMC guidelines for STM8SAN3181 Rev 47/4746

Package structure overview2AN3181Package structure overviewThe projects included in this FW package are summarized in Table 1.Table 1. Projects related to STM8-SafeCLASSBNameRevisionRPNEvaluation boardSub-familySTM8AS128 EVAL2.0.0STM8S208MBT6BSTM8/128-EVALMB631 Rev DSTM8S/AF 128KSTM8S Discovery2.0.0STM8S105C6T6STM8S-DiscoveryMB867 Rev ASTM8S/AF eryMB1008 Rev ASTM8S/AL 8KSTM8L1528 EVAL2.0.0STM8L152M8T6STM8L 1528 EVALMB904 Rev BSTM8L/AL 64K/32KSTM8L101 Discovery2.0.0STM8L101K3T6STM8L1-DBMB709 Rev ASTM8L/AL/TL 8KAll the projects are based on common self-test procedures collecting the principal tests andmethods. These common C-language source files are kept in the Middleware directory.Part of the methods are tool specific, but common to the whole family. Most of them arewritten in Assembler for specific compilers. Those files are located in a single place of theIAR and Cosmic directories of the pilot STM8AS128 EVAL project, and included by all theother projects, from these dedicated directories.BSP directory collects specific drivers for evaluation boards (used for demonstrations)exclusively to control the board hardware (like displays, serial channels and LEDs). Thesedrivers are dedicated to debug only, and are out of the certification scope.The structure and content of the package is described in detail in Table 2.Table 2. FW organization(1)DirectoryDrivers/BSPMiddleware/ SM8 SelTest LibraryProjects/STM8AS128 EVALProjects/STM8S 28 EVALProjects/STM8L101 DiscoveryCommentsSTM8128 EVALSTM8L1528 EVALincsrcincsrcCosmicIAREvaluation board specific driversCommon STL proceduresProduct integration example andproduct specific STL proceduresTool specific STL procedures(2),product and tools specific configurations1. Bold type is used to indicate the procedures that are the main focus of the certification.2. Common tool specific procedures are collected exclusively for pilot STM8AS128 EVAL project directory.8/47AN3181 Rev 4

AN3181Package structure overviewThe included projects for specific STM8 products and dedicated evaluation boards havebeen prepared and tested under two environments and tool chains: IAR -EWSTM8 version 3.10.1 Cosmic version 4.4.6 - STVD version 4.3.11The detailed structure of these projects and the list of files collecting the common andspecific STL procedures are summarized in Table 3 and Table 4, respectively.Table 3. Overview of common STL proceduresCommon STL proceduresSTLFileStart-up testRun time testHeadersDescriptionstm8 stl startup.cStart-up STL flow controlstm8 stl clockstart.cClock system initial teststm8 stl main.cRun time STL flow controlstm8 stl crcrun.cPartial Flash teststm8 stl clockrun.cPartial clock teststm8 stl transpRam.cPartial RAM teststm8 stl classB var.hDefinition of Class B variablesstm8 stl lib.hOverall STL includes controlstm8 stl startup.hInitial process STL headerstm8 stl main.hRun time process STL headerstm8 stl param.hSTL configuration filestm8 stl clockstart.hStart-up clock test headerstm8 stl clockrun.hRun time clock test headerstm8 stl cpu.hCPU test headerstm8 stl crc16Run.hFlash test headerstm8 stl fullRam Mc.hStart-up RAM test headerstm8 stl transpRam.hRun time RAM test headerAN3181 Rev 49/4746

Package structure overviewAN3181Table 4. Overview of common tool specific STL proceduresCommon STL nclassb cksumXXX.sStart-up CRC calculationblock cksumXXX.sRun time CRC calculationstm8 stl cpustart CSMC.sStart-up CPU teststm8 stl cpurun CSMC.sRun time CPU teststm8 stl fullRam CSMC.sStart-up RAM teststm8 stl cpustart IAR.asmStart-up CPU teststm8 stl cpurun IAR.asmRun time CPU teststm8 stl fullRam IAR.asmStart-up RAM teststm8 stl crc16 IAR.cStart-up CRC calculationAdditional supporting files used in the examples are listed in Table 5.Table 5. Integration support filesFile10/47Descriptioncstartup.sC start-up for IAR compilerstm8 interrupt vector.cInterrupt vector table for Cosmicmain.cMain flow of the example sourcestm8xxx it.cSTL Interrupts, clock measurement processing and configurationproceduresmain.hMain flow headerstm8xxx.hProduct specific headerstm8xxx it.cProduct specific ISR headerAN3181 Rev 4

AN31813Main differences from the product point of viewMain differences from the product point of viewThe user can find some small differences, mainly due to product hardware configuration,and to incompatibilities of compilers and debugging tools.The main differences are described in this section, they are due mainly to compatibilityaspects between different STM8 products, summarized in Table 6.AN3181 Rev 411/4746

STM8S207/208STM8AF (128K)FeatureSTM8S105/005STM8AF TM8L101STM8AL (32K and 64K) STM8AL/TL5x (8K)STM8 - ProprietaryTechnology [nm]130(1)130Frequency [MHz]24Performance [DMIPS]201010Flash memory density [KB]12832864 / 32862141.520486401282048-RAM density [KB]Data EEPROM [bytes]16(3)YesECC on Non-Volatile MemoryWindow watchdogAN3181 Rev 4Stack HW roll-over limit at RAM end [bytes]Clock systemClock cross reference SI 128 kHzHSE-16HSI-16LSI 128 kHzHSI-16LSI 128 kHzHSE-16LSE-32,768 kHzHSI-16, LSI 38 kHzHSI-16LSI 38 kHzTIM3/Ch1TIM3/Ch1TIM1/Ch1TIM2/Ch1TIM2/Ch1Main differences from the product point of view12/47Table 6. STM8 compatibility aspects1. Low power technology.2. CISC MIPS.3. Both embedded Flash and EEPROM feature internal single bit correction, hidden to the user.4. WWDG is available only on STM8STL5x devices.5. Stack is not limited for STM8TL5x devices; there is rollover (due to over/underflow) only if the stack overlaps the 4 KB.AN3181

AN31813.1Main differences from the product point of viewClock system testInternal timers are used to cross-check frequency measurements. This method is requiredto determine harmonic or sub-harmonic frequencies when the system clock is provided byan external crystal (or ceramic resonator, if applicable), or to detect any significantdiscrepancy in the application timing. Different product dependent timers are dedicated toperform such cross check measurements.The initial configuration of the specific timers is slightly different, while dedicated interruptvectors are used for the measurement in dependency of the available timers on a givendevice.CSS clock security feature is enabled for HSE quartz clock by default. The user has toensure proper setting of the HSECNT (HSE oscillator stabilization time) parameter in theoption bytes, thus ensuring sufficient time for the oscillator proper start after reset, and thuspreventing premature action of the CSS system.If the system clock doesn't use the HSE quartz clock, the user can set up the clockmeasurement HSI vs. LSI commenting out the parameter STL INCL HSECSS in thestm8 stl param.h file, or adapting the clock measurement to be based on another reliableclock source (e.g. line power frequency) to satisfy the standard requirements for the clockmonitoring.In any case, if the cross check measurement depends upon the RC clock (HSI or LSI), theuser has to consider the accuracy of this clock source over the whole temperature range.This is necessary to prevent any false clock failure detection, especially when the unit underself-test operates over a wide temperature range. The user can apply an adaptable clocktest algorithm while monitoring the trend of the ambient temperature, or consider a moreaccurate source to be taken as a clock reference.3.2RAM testBy default, a lighter Marching X algorithm is applied during run time instead of the MarchingC- one applied at start-up test of volatile memory. It depends on STL RUN USE MARCHXsymbol defined in the stm8 stl param.h file. If this symbol is defined, two middle marchingsteps are skipped and not implemented during the transparent run time test. Optionally, usercan apply Marching C- test at run time, too, by commenting out this parameter definition.The test range both at startup and during run time has to be customized according to theproduct volatile memory capacity, by proper setting of constants in the linker or in the libraryconfiguration file.3.3Flash memory integrity testDifferent methods can be applied, depending on the used compiler. Cosmic uses a lighterCRC test, which is faster but its algorithm doesn’t fully correspond to CRC standard.Moreover Cosmic has defined different procedures for different memory models.Consequently the user has to verify the applied model and if 8-bit or 16-bit CRC pattern isused.IAR uses a standard procedure, where the CRC calculation is simulated by SW or uses alook-up table. The second method is considerably faster, but needs a significant part ofcode.AN3181 Rev 413/4746

Main differences from the product point of viewAN3181When a slower method is used and/or large memory area is tested, the user has to split thememory testing in segments, and take care about the handling of watchdogs between them.3.4Start-up and system initializationStandard product start-up file dedicated to IAR is modified to call set of start-up tests atthe very first program execution. Reset vector in the interrupt vector table for Cosmic ismodified to force the program flow to startup-tests after the application reset.3.5Firmware configurationAll the STL configuration parameters and constants used in the STL code written at C-levelare collected into one file, stm8 stl param.h. Configuration differences are mainly related todifferent size of tested areas, different compilers and to small deviations of the control flow.The specific compiler and the STL configuration options are summarized, respectively, inTable 7 and Table 8.Projects for Cosmic compiler have been tested with Short Stack model, disabledoptimizations and enforced functions prototyping for C-compiler, while those for IARcompiler have bee tested with standard C-language conformance with IAR extensionsenabled, C99 dialect and low level optimizations.Table 7. Specific compiler configurationsFeatureWhere it actsTargetSet up proper peripheral configuration and physicalranges of the embedded memories(e.g. STM8S208 or STM8L15X MD).DeviceCompilationparametersOptimizationSome higher optimization settings may causeCompiler configuration unexpected removal or corruption of testingprocedures.Memories rangesLinker file, Compilerconfiguration, STLparametersSet ranges tested in volatile and non-volatilememories both at startup and during run time.Set type of program Flash memory integrity checkCompiler configuration,(8-bit, far addressing, fast or slow method) andCheck sum calculation Project configuration,include proper source files supporting the selectedSTL parameterscalculation.Table 8. STL specific configurationsFeature14/47Where it actsTargetSet testSTL parametersRemove unused tests (e.g. external quart clock if notapplied) as, by default, all the tests are included.Debug diagnosticSTL andCompilationparameterSelect included diagnostic functions (e.g. DEBUG,STL VERBOSE, EVAL BOARD CONTROL) andlimit some STL functions when debugging the library(e.g. watchdogs or Flash memory check sumevaluation).AN3181 Rev 4

AN3181Main differences from the product point of viewTable 8. STL specific configurations (continued)FeatureSafety variablesWhere it actsstm8 tl ClassB var.hheader fileRAM transparent test STL parameterTargetDefinition of safety critical variables keepingredundant information stored in the area underpermanent transparent testing during run time.Control algorithm during RAM transparent test duringrun time (enables lighter and faster March X method).For more detailed description of the FW structure configuration and integration aspects seeSection 5: Class B software package.AN3181 Rev 415/4746

Compliance with IEC, UL and CSA standards4AN3181Compliance with IEC, UL and CSA standardsIEC (International Electro technical Commission) is a not-for-profit and non-governmentalworld wide recognized authority preparing and publishing international standards for a vastrange of electrical, electronic and related technologies. IEC standards are focused mainlyon safety and performance, the environment, electrical energy efficiency and its renewablecapabilities. The IEC cooperates closely with the ISO (International Organization forStandardization) and the ITU (International Telecommunication Union). Their standardsdefine not only the recommendations for hardware but as well for software solutions dividedinto a number of safety classes in dependency of the purpose of the application.Other world wide recognized bodies in the field of electronic standards are TUV or VDE inGermany, IET in the United Kingdom and the IEEE, UL or CSA in the United States andCanada. Beyond providing expertise during standard development process, they act astesting, inspection, consultancy, auditing, education and certification bodies. Most of themtarget global market access but are primarily recognized and registered as a local NationalCertification Bodies (NCB) or National Recognized Testing Labs (NRTL). The main purposeof these institutions is to offer standards compliance and quality testing services tomanufacturers of electrical appliances.Due to globalization process, most of manufacturers push for harmonization of nationalstandards. This is contrary to the efforts of many governments, still protecting smaller localproducers by building administrative barriers to prevent easy local market access fromabroad. As a matter of fact, most of the standards are well harmonized, with negligibledifferences. This makes the certification process easier, and any cooperation with locallyrecognized bodies is fruitful.The pivotal IEC standards are IEC 60730-1 and IEC 60335-1, well harmonized with UL/CSA60730-1 and UL/CSA 60335-1 starting from their 4th edition (previous UL/CSA editions usereferences to UL1998 norm in addition). They cover safety and security of householdelectronic appliances for domestic and similar environment.Appliances incorporating electronic circuits are subject to component failure tests. The basicprinciple here is that the appliance must remain safe in case of any component failure. Themicrocontroller is an electronic component as any other one from this point of view. If safetyrelies on an electronic component, it must remain safe after two consecutive faults. Thismeans that the appliance must stay safe with one hardware failure and the microcontrollernot operating (under reset or not operating properly).The conditions required are defined in detail in Annexes Q and R of the IEC 60335-1 normand Annex H of the IEC 60730-1 norm.Three classes are defined by the 60730-1 standard:16/47 Class A: Safety does not rely on SW Class B: SW prevents unsafe operation Class C: SW is intended to prevent special hazards.AN3181 Rev 4

AN3181Compliance with IEC, UL and CSA standardsFor programmable electronic component applying a safety protection function, the 60335-1standard requires incorporation of software measures to control fault /error conditionsspecified in tables R.1 and R.2, based on Table H.11.12.7 of the 60730-1 standard: Table R.1 summarizes general conditions comparable with requirements given forClass B level in Table H.11.12.7. Table R.2 summarizes specific conditions comparable with requirements for Class Clevel of the 60730-1 standard, for particular constructions to address specific hazards.Similarly, if software is used for functional purposes only, the R.1 and R.2 requirements arenot applicable.The scope of this Application note and associated STL package is Class B specification inthe

Guidelines for obtaining UL/CSA/IEC 60730-1/60335-1 Class B certification in any STM8 application Introduction The role of safety is more and more important in electronic applications. The level of safety requirements for components

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