MCF5227x ColdFire Microprocessor - Data Sheet

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Freescale SemiconductorData Sheet: Technical DataDocument Number: MCF52277Rev. 8, 09/2009MCF52277LQFP–17624 mm x 24 mmMCF5227x ColdFire Microprocessor Data SheetFeatures Version 2 ColdFire Core with EMAC Up to 159 Dhrystone 2.1 MIPS @ 166.67 MHz 8 Kbytes configurable cache (instruction only, data only, orsplit instruction/data) 128 Kbytes internal SRAM Support for booting from SPI-compatible flash, EEPROM,and FRAM devices Crossbar switch technology (XBS) for concurrent access toperipherals or RAM from multiple bus masters 16 channel DMA controller 16- or 32-bit SDR/DDR controller USB 2.0 On-the-Go controller Liquid crystal display controller with support up to800 600 pixels ADC and touchscreen controller FlexCAN module 4 32-bit timers with DMA support DMA supported serial peripheral interface (DSPI) 3 UARTs I2C bus interface Synchronous serial interface (SSI) Plus-width modulator (PWM) Real-time clock (RTC) Two programmable interrupt controllers (PIT)Freescale reserves the right to change the detail specifications as may be required to permitimprovements in the design of its products. Freescale Semiconductor, Inc., 2009. All rights reserved.MAPBGA–19615mm x 15mm

Table of Contents12345MCF5227x Family Comparison . . . . . . . . . . . . . . . . . . . . . . . .4Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5Hardware Design Considerations . . . . . . . . . . . . . . . . . . . . . . .53.1 PLL Power Filtering. . . . . . . . . . . . . . . . . . . . . . . . . . . . .53.2 USB Power Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . .53.3 ADC Power Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . .63.4 Supply Voltage Sequencing . . . . . . . . . . . . . . . . . . . . . .63.4.1 Power Up Sequence . . . . . . . . . . . . . . . . . . . . . .63.4.2 Power Down Sequence . . . . . . . . . . . . . . . . . . . .63.5 Power Consumption Specifications. . . . . . . . . . . . . . . . .7Pin Assignments and Reset States . . . . . . . . . . . . . . . . . . . . .94.1 Signal Multiplexing . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94.2 Pinout—176 LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . .144.3 Pinout—196 MAPBGA . . . . . . . . . . . . . . . . . . . . . . . . .15Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .155.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . .165.2 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .175.3 ESD Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .185.4 DC Electrical Specifications . . . . . . . . . . . . . . . . . . . . .185.55.65.7678Oscillator and PLL Electrical Characteristics. . . . . . . .ASP Electrical Characteristics . . . . . . . . . . . . . . . . . . .External Interface Timing Specifications . . . . . . . . . . .5.7.1 FlexBus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5.7.2 SDRAM Bus . . . . . . . . . . . . . . . . . . . . . . . . . . .5.8 General Purpose I/O Timing . . . . . . . . . . . . . . . . . . . .5.9 Reset and Configuration Override Timing . . . . . . . . . .5.10 LCD Controller Timing Specifications . . . . . . . . . . . . .5.11 USB On-The-Go Specifications. . . . . . . . . . . . . . . . . .5.12 SSI Timing Specifications . . . . . . . . . . . . . . . . . . . . . .5.13 I2C Timing Specifications . . . . . . . . . . . . . . . . . . . . . .5.14 DMA Timer Timing Specifications . . . . . . . . . . . . . . . .5.15 DSPI Timing Specifications . . . . . . . . . . . . . . . . . . . . .5.16 SBF Timing Specifications. . . . . . . . . . . . . . . . . . . . . .5.17 JTAG and Boundary Scan Timing Specifications . . . .5.18 Debug AC Timing Specifications . . . . . . . . . . . . . . . . .Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Product Documentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . .Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19202121232929303334363838394042434344MCF5227x ColdFire Microprocessor Data Sheet, Rev. 82Freescale Semiconductor

MCF52277JTAGOscillatorVersion 2 ColdFire Core8KConfigurableCachePLLSerial BootFacilityBDMHardwareDivide128KSRAMEMACUSB OTGLCDControllereDMACrossbar Switch (XBS)Peripheral I2CINTC2 PITs3 UARTs4 ORTGPIOI2 CINTCJTAG– Background debug module– DMA serial peripheral interface– Enhanced direct memory access– Enchanced multiply-accumulate unit– Edge port module– General purpose input/output module– Inter-intergrated circuit– Interrupt controller– Joint Test Action Group interfaceLCDPITPLLPWMRTCSSIUARTUSB OTG– Liquid-crystal display– Programmable interrupt timer– Phase-locked loop module– Pulse-width modulator– Real time clock– Synchronous serial interface– Universal asynchronous receiver/transmitter– Universal Serial Bus On-the-Go controllerFigure 1. MCF52277 Block DiagramMCF5227x ColdFire Microprocessor Data Sheet, Rev. 8Freescale Semiconductor3

MCF5227x Family Comparison1MCF5227x Family ComparisonThe following table compares the various device derivatives available within the MCF5227x family.Table 1. MCF5227x Family ConfigurationsModuleMCF52274MCF52277 Core (System) Clockup to 120 MHzup to 166.67 MHzPeripheral and External Bus Clock(Core clock 2)up to 60 MHzup to 83.33 MHzPerformance (Dhrystone/2.1 MIPS)up to 114up to 159ColdFire Version 2 Core with EMAC(Enhanced Multiply-Accumulate Unit)Static RAM (SRAM)128 KbytesConfigurable Cache8 KbytesASP Touchscreen Controller 12-bit color18-bit colorUSB 2.0 On-the-Go FlexBus External Interface SDR/DDR SDRAM Controller FlexCAN 2.0B communication module Real Time Clock Watchdog Timer 16-channel Direct Memory Access (DMA) Interrupt Controllers (INTC)11Synchronous Serial Interface (SSI) DSPI UARTs3332-bit DMA Timers44Periodic Interrupt Timers (PIT)22PWM Module Edge Port Module (EPORT) General Purpose I/O Module (GPIO) 176 LQFP196 MAPBGALCD ControllerI2C JTAG - IEEE 1149.1 Test Access PortPackageMCF5227x ColdFire Microprocessor Data Sheet, Rev. 84Freescale Semiconductor

Ordering Information2Ordering InformationTable 2. Orderable Part NumbersFreescale 74CLU120MCF52274 RISC Microprocessor176 LQFP120 MHz–40 to 85 CMCF52277CVM160MCF52277 RISC Microprocessor196 MAPBGA166.67 MHz–40 to 85 C3Hardware Design Considerations3.1PLL Power FilteringTo further enhance noise isolation, an external filter is strongly recommended for PLL analog VDD pins. The filter shown inFigure 2 should be connected between the board VDD and the PLLVDD pins. The resistor and capacitors should be placed asclose to the dedicated PLLVDD pin as possible.10 ΩBoard IVDDPLL VDD Pin10 µF0.1 µFGNDFigure 2. System PLL VDD Power Filter3.2USB Power FilteringTo minimize noise, external filters are required for each of the USB power pins. The filter shown in Figure 3 should beconnected between the board EVDD and the USBVDD pin. The resistor and capacitors should be placed as close to the dedicatedUSBVDD pin as possible.0ΩBoard EVDDUSB VDD Pin10 µF0.1 µFGNDFigure 3. USB VDD Power FilterNOTEIn addition to the above filter circuitry, a 0.01 F capacitor is also recommended in parallelwith those shown.MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8Freescale Semiconductor5

Hardware Design Considerations3.3ADC Power FilteringTo minimize noise, an external filters is required for the ADCVDD power pin. The filter shown in Figure 4 should be connectedbetween the board EVDD and the ADCVDD pin. The resistor and capacitors should be placed as close to the dedicated ADCVDDpin as possible.0ΩBoard EVDDADC VDD Pin10 µF0.1 µFGNDFigure 4. ADC VDD Power Filter3.4Supply Voltage SequencingThe relationship between SDVDD and EVDD is non-critical during power-up and power-down sequences. Both SDVDD (2.5Vor 3.3V) and EVDD are specified relative to IVDD.3.4.1Power Up SequenceIf EVDD/SDVDD are powered up with IVDD at 0 V, then the sense circuits in the I/O pads will cause all pad output driversconnected to the EVDD/SDVDD to be in a high impedance state. There is no limit on how long after EVDD/SDVDD powers upbefore IVDD must powered up. IVDD should not lead the EVDD, SDVDD or PLLVDD by more than 0.4 V during power ramp-up,or there will be high current in the internal ESD protection diodes. The rise times on the power supplies should be slower than500 us to avoid turning on the internal ESD protection clamp diodes.3.4.2Power Down SequenceIf IVDD/PLLVDD are powered down first, then sense circuits in the I/O pads will cause all output drivers to be in a highimpedance state. There is no limit on how long after IVDD and PLLVDD power down before EVDD or SDVDD must powerdown. IVDD should not lag EVDD, SDVDD, or PLLVDD going low by more than 0.4 V during power down or there will beundesired high current in the ESD protection diodes. There are no requirements for the fall times of the power supplies.The recommended power down sequence is as follows:1.2.Drop IVDD/PLLVDD to 0 V.Drop EVDD/SDVDD supplies.MCF5227x ColdFire Microprocessor Data Sheet, Rev. 86Freescale Semiconductor

Hardware Design Considerations3.5Power Consumption SpecificationsAll application power consumption data is lab data measured on an M52277EVB running the Freescale Linux BSP.Table 3. MCF52277 Application Power Consumption1CoreFreq.160 MHz1Idle (LCDimage)Idle (audioimage)ButtonDemoSlideshowDemoMP3PlaybackUSB FSFile 34.633.4629.86SDVDD18.818.5721.823.922.6622.2Total mAmWAll voltage rails at nominal values: IVDD 1.5 V, EVDD 3.3 V, and SDVDD 1.8 V.350Total Power (mW)300250200150100500Idle (LCDimage)Idle (AudioImage)ButtonDemoSlideshowDemoMP3PlaybackUSB FSFile CopyFigure 5. Power Consumption in Various ApplicationsAll current consumption data is lab data measured on a single device using an evaluation board. Table 4 shows the typical powerconsumption in low-power modes. These current measurements are taken after executing a STOP instruction.Table 4. Current Consumption in Low-Power Modes1,2System ode)IVDD (mA)75.162.749.236.63.5Power (mW)112.6594.0573.8054.905.25IVDD (mA)61.952.842.031.72.9Power (mW)92.8579.2063.0047.554.35Voltage SupplyMCF5227x ColdFire Microprocessor Data Sheet, Rev. 8Freescale Semiconductor7

Hardware Design ConsiderationsTable 4. Current Consumption in Low-Power Modes1,2 (continued)System D (mA)57.048.838.929.72.7Power (mW)85.5073.2058.3544.554.05IVDD (mA)16.115.113.412.51.3Power (mW)24.1522.6520.1018.751.95IVDD (mA)15.914.913.212.41.3Power (mW)23.8522.3519.8018.601.95IVDD (mA)1.81.81.81.81.3Power (mW)2.702.702.702.701.95IVDD (mA)0.50.50.50.50.5Power (mW)0.750.750.750.750.75Voltage SupplyDOZESTOP 0STOP 1STOP 2STOP 31All values are measured on an M52277EVB with nominal core voltage(IVDD 1.5 V). Testsperformed at room temperature. All peripheral clocks on prior to entering low-power mode2 Refer to the Power Management chapter in the MCF52277 Reference Manual for more informationon low-power modes.IVDD Power Consumption (mW)120100RUN80WAITDOZESTOP 060STOP 1STOP 240STOP 3200806448324 (LIMP)System Frequency (MHz)Figure 6. IVDD Power Consumption in Low-Power ModesMCF5227x ColdFire Microprocessor Data Sheet, Rev. 88Freescale Semiconductor

Pin Assignments and Reset States4Pin Assignments and Reset States4.1Signal MultiplexingThe following table lists all the MCF5227x pins grouped by function. The direction column is the direction for the primaryfunction of the pin only. Refer to Section 4, “Pin Assignments and Reset States,” for package diagrams. For a more detaileddiscussion of the MCF5227x signals, consult the MCF52277 Reference Manual (MCF52277RM).NOTEIn this table and throughout this document a single signal within a group is designatedwithout square brackets (i.e., FB A23), while designations for multiple signals within agroup use brackets (i.e., FB A[23:21]) and is meant to include all signals within the twobracketed numbers when these numbers are separated by a colon.NOTEThe primary functionality of a pin is not necessarily its default functionality. Most pins thatare muxed with GPIO will default to their GPIO functionality. See Table 5 for a list of theexceptions.Table 5. Special-Case Default Signal FunctionalityPinDefault SignalFB BE/BWE[3:0]FB BE/BWE[3:0]FB CS[3:0]FB CS[3:0]FB OEFB OEFB TAFB TAFB R/WFB R/WFB TSFB TSPull-up (U)1Pull-down (D)Direction2Voltage DomainTable 6. MCF5227x Signal Information and MuxingMCF52274176 110, 109G10, H10Signal NameGPIOAlternate 1Alternate 2MCF52277196 MAPBGAResetClockEXTALXTAL————Mode SelectionBOOTMOD[1:0]———MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8Freescale Semiconductor9

Pin Assignments and Reset StatesPull-up (U)1Pull-down (D)Direction2Voltage DomainTable 6. MCF5227x Signal Information and Muxing (continued)MCF52274176 LQFPFB A[23:22]—FB CS[5:4]——OSDVDD143, 142FB A[21:16]————OSDVDD 141–139, 137–135Signal NameGPIOAlternate 1Alternate 2MCF52277196 MAPBGAC11, D11FlexBusA12, B12, C12,B13, A13, A14FB A[15:14]—SD BA[1:0]——OSDVDD131, 130B14, C13FB A[13:11]—SD A[13:11]——OSDVDD129–127C14, D12, D13FB A10———OSDVDD126D14FB A[9:0]—SD A[9:0]—OSDVDD125–116E11–E14,F11–F13, G11,G12, H11FB D[31:16]—SD D[31:16]—I/OSDVDD30–37, 49–56J4, K1–K4, L1–L3,M3, N3, P3,M4,N4, P4, L5, M5FB D[15:0]—FB D[31:16]—I/OSDVDD19–26, 60–67G1–G4, H1–H4,M6, N6, P6, L7,M7, N7, P7, L8FB CLK———OSDVDD42P1FB BE/BWE[3:0]PBE[3:0]SD DQM[3:0]——OSDVDD29, 57, 27, 59J3, N5, J1, L6FB CS[3:2]PCS[3:2]———OSDVDD—B11, A11FB CS1PCS1SD CS1——OSDVDD144D10FB CS0PCS0———OSDVDD145C10FB OEPFBCTL3———OSDVDD69N8FB TAPFBCTL2——UISDVDD115H12FB R/WPFBCTL1———OSDVDD68M8FB TSPFBCTL0DACK0——OSDVDD15F4SDRAM ControllerSD A10————OSDVDD46L4SD CAS————OSDVDD47N2SD CKE————OSDVDD17F2SD CLK————OSDVDD40M1SD CLK————OSDVDD41N1SD CS0————OSDVDD18F1SD DQS[3:2]————I/OSDVDD28, 58J2, P5SD RAS————OSDVDD48P2MCF5227x ColdFire Microprocessor Data Sheet, Rev. 810Freescale Semiconductor

Pin Assignments and Reset StatesAlternate 1Alternate 2SD SDR DQS————SD WE————Voltage DomainGPIODirection2Signal NamePull-up (U)1Pull-down (D)Table 6. MCF5227x Signal Information and Muxing (continued)MCF52274176 LQFPMCF52277196 rnal Interrupts Port4IRQ7PIRQ7———IRQ4PIRQ4DREQ0DSPI PCS45IRQ1PIRQ1USB CLKINSSI CLKIN—IEVDD160B7LCD Controller6LCD D[17:16]6PLCDDH[1:0]LCD D[11:10]——OEVDD9, 8E3, E4LCD D[15:14]6PLCDDM[7:6]LCD D[9:8]——OEVDD7, 6D1, D2LCD D13PLCDDM5CANTX——OEVDD—C1LCD D12PLCDDM4CANRX——OEVDD—C2LCD D[11:8]6PLCDDM[3:0]LCD D[7:4]——OEVDD5–2D3, C3, D4, B1LCD D7PLCDDL7PWM7——OEVDD—B2LCD D6PLCDDL6PWM5——OEVDD—A1LCD D[5:2]6PLCDDL[5:2]LCD D[3:0]——OEVDD175–172A2, A3, B3, A4LCD D1PLCDDL1PWM3——OEVDD—B4LCD D0PLCDDL0PWM1——OEVDD—C4LCD ACD/LCD OEPLCDCTL3LCD SPL SPR——OEVDD169B5LCD FLM/LCD VSYNCPLCDCTL2———OEVDD10E2LCD LP/LCD HSYNCPLCDCTL1———OEVDD11E1LCD USB On-the-GoUSB DM———VDDUSB DP————OUSBVDDReal Time ClockRTC EXTAL————IEVDD100J14RTC XTAL————OEVDD99K14MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8Freescale Semiconductor11

Pin Assignments and Reset StatesAlternate 1Alternate 2Voltage DomainGPIODirection2Signal NamePull-up (U)1Pull-down (D)Table 6. MCF5227x Signal Information and Muxing (continued)MCF52274176 LQFP—IVDD82–85, 87–90MCF52277196 MAPBGATouchscreen ControllerADC IN[7:0]———ADCP12, N12, P13,N13, P14, N14,M13, M14ADC REF————IVDD86M12ADCI2CI2C SCLPI2C1CANTXU2TXDUI/OEVDD168C5I2C DD155D8DSPI7DSPI PCS0/SSPDSPI3U2RTSDSPI SINPDSPI2U2RXDSBF DI8DSPI SOUTPDSPI1U2TXDSBF D0—OEVDD154D9DSPI SCKPDSPI0U2CTSSBF CK—I/OEVDD153C9UARTsU1CTSPUART7SSI BCLKLCD CLS—IEVDD156C8U1RTSPUART6SSI FSLCD PS—OEVDD157B8U1TXDPUART5SSI TXD——OEVDD159A7U1RXDPUART4SSI RXD——IEVDD158A8U0CTSPUART3DT1OUTUSB VBUS EN—IEVDD97K12U0RTSPUART2DT1INUSB VBUS XDPUART0CANRX——IEVDD96K13DMA TimersDT3INPTIMER3DT3OUTSSI MCLK—IEVDD163D6DT2IN/SBF CS7PTIMER2DT2OUTDSPI PCS2—IEVDD164C6DT1INPTIMER1DT1OUTLCD CONTRAST—IEVDD165B6DT0INPTIMER0DT0OUTLCD —L9, M9, N9, P9DDATA[3:0]————OEVDD—L10, M10, N10,P10MCF5227x ColdFire Microprocessor Data Sheet, Rev. 812Freescale Semiconductor

Pin Assignments and Reset StatesVoltage DomainMCF52274176 LQFPMCF52277196 IEVDD77P11—DIEVDD134E10———39, 75, 114, 138,K5, F10, E5, J10Signal NameGPIOAlternate 1Alternate 2Pull-up (U)1Pull-down (D)Direction2Table 6. MCF5227x Signal Information and Muxing (continued)ALLPST————JTAG LKTestTEST——Power SuppliesIVDD———171EVDD——————12, 72, 73, 94, 111, E6, E7, F5, F6, G5,148, 176SD VDD12345678——————H9, J9, K8, K914, 43, 44, 70, 113, E8, E9, F9, G9, H5,132, 146J5, J6, K6, K7VDD OSC——————108G13VDD PLL——————104H14VDD USB——————151B10VDD RTC——————101J13VDD ADC——————91L13VSS——————1, 13, 45, 71, 93,F7, F8, G6–G8,112, 133, 147H6–H8, J7, J8VSS OSC——————107H13VSS ADC——————92L14Pull-ups are generally only enabled on pins with their primary function, except as noted.Refers to pin’s primary function.Enabled only in oscillator bypass mode (internal crystal oscillator is disabled).GPIO functionality is determined by the edge port module. The GPIO module is only responsible for assigning the alternate functions.Pull-up when DREQ controls the pin.The 176 LQFP device only supports a 12-bit LCD data bus.DSPI or SBF signal functionality is controlled by RESET. When asserted, these pins are configured for serial boot; when negated, thepins are configured for DSPI.Pull-up when the serial boot facility (SBF) controls the pin.MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8Freescale Semiconductor13

Pin Assignments and Reset StatesIf JTAG EN is asserted, these pins default to alternate 1 (JTAG) functionality. The GPIO module is not responsible for assigning thesepins.4.2Pinout—176 9089 SD VDDFB A15FB A14FB A13FB A12FB A11FB A10FB A9FB A8FB A7FB A6FB A5FB A4FB A3FB A2FB A1FB A0FB TAIVDDSD VDDVSSEVDDBOOTMOD1BOOTMOD0VDD OSCVSS OSCEXTALXTALVDD PLLRESETRSTOUTVDD RTCRTC EXTALRTC XTALU0RTSU0CTSU0RXDU0TXDEVDDVSSVSS ADCVDD ADCADC IN0ADC 86970717273747576777879808182838485868788VSSLCD D8LCD D9LCD D10LCD D11LCD D14LCD D15LCD D16LCD D17LCD FLM/VSYNCLCD LP/HSYNCEVDDVSSSD VDDFB TSSD WESD CKESD CS0FB D15FB D14FB D13FB D12FB D11FB D10FB D9FB D8FB BE/BWE1SD DQS3FB BE/BWE3FB D31FB D30FB D29FB D28FB D27FB D26FB D25FB D24SD SDR DQSIVDDSD CLKSD CLKFB CLKSD VDDSD 44143142141140139138137136135134133EVDDLCD D5LCD D4LCD D3LCD D2IVDDLCD LSCLKLCD ACD/OEI2C SCLI2C SDSPI SINDSPI SOUTDSPI SCKDSPI PCS0VDD USBUSB DPUSB DMEVDDVSSSD VDDFB CS0FB CS1FB A23FB A22FB A21FB A20FB A19IVDDFB A18FB A17FB A16TESTVSSThe pinout for the MCF52274 package is shown below.VSSSD A10SD CASSD RASFB D23FB D22FB D21FB D20FB D19FB D18FB D17FB D16FB BE/BWE2SD DQS2FB BE/BWE0FB D7FB D6FB D5FB D4FB D3FB D2FB D1FB D0FB R/WFB OESD VDDVSSEVDDEVDDPSTCLKIVDDALLPSTDSCLKDSIJTAG ENBKPTDSOADC IN7ADC IN6ADC IN5ADC IN4ADC REFADC IN3ADC IN29Figure 7. MCF52274 Pinout (176 LQFP)MCF5227x ColdFire Microprocessor Data Sheet, Rev. 814Freescale Semiconductor

Electrical Characteristics4.3Pinout—196 MAPBGAThe pinout for the MCF52277 package is shown below.1234567891011121314ALCD D6LCD D5LCD D4LCD D2LCDLSCLKT0INU1TXDU1RXDUSB DMUSB DPFB CS2FB A21FB A17FB A16ABLCD D8LCD D7LCD D3LCD D1LCDACD/OET1INIRQ 1U1RTSDSPIPCS0VDDUSBFB CS3FB A20FB A18FB A15BCLCD D13 LCD D12 LCD D10LCD D0I2C SCLT2INIRQ 4U1CTSDSPISCKFB CS0FB A23FB A19FB A14FB A13CDLCD D15 LCD D14 LCD D11LCD D9I2C SDAT3INIRQ 7DSPI SINDSPISOUTFB CS1FB A22FB A12FB A11FB A10DELCD LP/ LCD FLM/LCD D17 LCD D16HSYNCVSYNCIVDDEVDDEVDDSDVDDSDVDDTESTFB A9FB A8FB A7FB A6EFSD CS0SD CKESD WEFB TSEVDDEVDDVSSVSSSDVDDIVDDFB A5FB A4FB A3EXTALFGFB D15FB D14FB D13FB D12EVDDVSSVSSVSSSDVDDBOOTMOD1FB A2FB A1VDDOSCXTALGHFB D11FB D10FB D9FB D8SDVDDVSSVSSVSSEVDDBOOTMOD0FB A0FB TAVSSOSCVDDPLLHJFB BE/BWE1SD DQS3FB BE/BWE3FB LJKFB D30FB D29FB D28FB D27IVDDSDVDDSDVDDEVDDEVDDU0CTSU0RXDRTCXTALKLFB D26FB D25FB D24SD A10FB D17FB BE/BWE0FB D4FB D0PST3DDATA3TDOU0TXDVDDADCVSSADCLMSD CLKSDSDR DQSFB D23FB D20FB D16FB D7FB D3FB R/WPST2DDATA2TDIADCREFNSD CLKSD CASFB D22FB D19FB BE/BWE2FB D6FB D2FB OEPST1DDATA1PFB CLKSD RASFB D21FB D18SDDQS0FB D5FB D1TCLKPST0123456789JTAG EN RSTOUTADC IN1 ADC IN0MTMSADC IN6 ADC IN4 ADC IN2NDDATA0TRSTADC IN7 ADC IN5 ADC IN3P1011121314Figure 8. MCF52277 Pinout (196 MAPBGA)5Electrical CharacteristicsThis document contains electrical specification tables and reference timing diagrams for the MCF5227x microprocessor. Thissection contains detailed information on DC/AC electrical characteristics and AC timing specifications.The electrical specifications are preliminary and are from previous designs or design simulations. These specifications may notbe fully tested or guaranteed at this early stage of the product life cycle, however for production silicon these specifications willbe met. Finalized specifications will be published after complete characterization and device qualifications have beencompleted.MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8Freescale Semiconductor15

Electrical CharacteristicsNOTEThe parameters specified in this MCU document supersede any values found in the modulespecifications.5.1Maximum RatingsTable 7. Absolute Maximum Ratings1, 2CharacteristicSymbolValueUnitCore Supply VoltageIVDD–0.5 to 2.0VCMOS Pad Supply VoltageEVDD–0.3 to 4.0VSDVDD–0.3 to 4.0VOscillator Supply VoltageOSCVDD–0.3 to 4.0VPLL Supply VoltagePLLVDD–0.3 to 2.0VRTC Supply VoltageRTCVDD–0.5 to 2.0VDigital Input Voltage 3VIN–0.3 to 3.6VInstantaneous Maximum CurrentSingle pin limit (applies to all pins) 3, 4, 5ID25mATA(TL – TH)–40 to 85 CTstg–55 to 150 CDDR/Memory Pad Supply VoltageOperating Temperature Range (Packaged)Storage Temperature Range12345Functional operating conditions are given in Section 5.4, “DC Electrical Specifications.” Absolute maximum ratingsare stress ratings only, and functional operation at the maxima is not guaranteed. Continued operation at theselevels may affect device reliability or cause permanent damage to the device.This device contains circuitry protecting against damage due to high static voltage or electrical fields; however, it isadvised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltagesto this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logicvoltage level (e.g., either VSS or EVDD).Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,calculate resistance values for positive and negative clamp voltages, then use the larger of the two values.All functional non-supply pins are internally clamped to VSS and EVDD.Power supply must maintain regulation within operating EVDD range during instantaneous and operating maximumcurrent conditions. If positive injection current (Vin EVDD) is greater than IDD, the injection current may flow out ofEVDD and could result in external power supply going out of regulation. Insure external EVDD load will shunt currentgreater than maximum injection current. This will be the greatest risk when the MCU is not consuming power (ex; noclock). Power supply must maintain regulation within operating EVDD range during instantaneous and operatingmaximum current conditions.MCF5227x ColdFire Microprocessor Data Sheet, Rev. 816Freescale Semiconductor

Electrical Characteristics5.2Thermal CharacteristicsTable 8. Thermal PUnitJunction to ambient, natural convectionFour layer board (2s2p)θJA381,2481,2 C/WJunction to ambient (@200 ft/min)Four layer board (2s2p)θJMA341,2421,2 C/W373 C/W4 C/W C/WJunction to boardθJBJunction to caseθJC1714Junction to top of packageΨjt41,531,5Maximum operating junction temperatureTj105105123453274oCθJA, θJMA and Ψjt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection.Freescale recommends the use of θJmA and power dissipation specifications in the system design to prevent devicejunction temperatures from exceeding the rated specification. System designers should be aware that devicejunction temperatures can be significantly influenced by board layout and surrounding devices. Conformance to thedevice junction temperature specification can be verified by physical measurement in the customer’s system usingthe Ψjt parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.Per JEDEC JESD51-6 with the board horizontal.Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Boardtemperature is measured on the top surface of the board near the package.Thermal resistance between the die and the case top surface as measured by the cold plate method (MILSPEC-883 Method 1012.1).Thermal characterization parameter indicating the temperature difference between package top and the junctiontemperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameteris written in conformance with Psi-JT.The average chip-junction temperature (TJ) in C can be obtained from:T J T A ( P D Θ JMA )Eqn. 1Where:TAQJMAPDPINTPI/O Ambient Temperature, CPackage Thermal Resistance, Junction-to-Ambient, C/WPINT PI/OIDD IVDD, Watts - Chip Internal PowerPower Dissipation on Input and Output Pins — User DeterminedFor most applications PI/O PINT and can be ignored. An approximate relationship between PD and TJ (if PI/O is neglected) is:KP D --------------------------------( T J 273 C )Eqn. 2Solving equations 1 and 2 for K gives:2K P D ( T A 273 C ) Q JMA P DEqn. 3where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring PD (at equilibrium)for a known TA. Using this value of K, the values of PD and TJ can be obtained by solving Equation 1 and Equation 2 iterativelyfor any value of TA.MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8Freescale Semiconductor17

Electrical Characteristics5.3ESD ProtectionTable 9. ESD Protection Characteristics1,2CharacteristicESD Target for Human Body ModelSymbolValueUnitHBM2000V1All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive GradeIntegrated Circuits.2A device is defined as a failure if after exposure to ESD pulses the device no longer meets the devicespecification requirements. Complete DC parametric and functional testing is performed perapplicable device specification at room temperature followed by hot temperature, unless specifiedotherwise in the device specification.5.4DC Electrical SpecificationsTable 10. DC Electrical SpecificationsCharacteristicSymbolMinMaxUnitCore Supply VoltageIVDD1.41.6VPLL Supply VoltagePLLVDD1.41.6VRTC Supply .6CMOS Pad Supply VoltageSDRAM and FlexBus Supply VoltageMobile DDR/Bus Pad Supply Voltage (nominal 1.8V)DDR/Bus Pad Supply Voltage (nominal 2.5V)SDR/Bus Pad Supply Voltage (nominal 3.3V)VSDVDDUSB Supply VoltageUSBVDD3.03.6VOscillator Supply VoltageOSCVDD3.03.6VCMOS Input High VoltageEVIH2EVDD 0.3VCMOS Input Low VoltageEVILVSS – 0.30.8VCMOS Output High VoltageIOH –5.0 mAEVOHEVDD – 0.4—VCMOS Output Low VoltageIOL 5.0 mAEVOL—0.4VSDRAM and FlexBus Input High VoltageMobile DDR/Bus Input High Voltage (nominal 1.8V)DDR/Bus Pad Supply Voltage (nominal 2.5V)SDR/Bus Pad Supply Voltage (nominal 3.3V)SDVIH1.351.72SDVDD 0.3SDVDD 0.3SDVDD 0.3SDRAM and FlexBus Input Low VoltageMobile DDR/Bus Input High Voltage (nominal 1.8V)DDR/Bus Pad Supply Voltage (nominal 2.5V)SDR/Bus Pad Supply Voltage (nominal 3.3V)SDVILVSS – 0.3VSS – 0.3VSS – 0.30.450.80.8VVMCF5227x ColdFire Microprocessor Data Sheet, Rev. 818Freescale Semiconductor

Electrical CharacteristicsTable 10. DC Electrical Specifications ��————0.30.30.5Iin–1.01.0μAWeak Internal Pull-Up Device Current, tested at VIL Max.1IAPU–10–130μAInput Capacitance 2All input-only pinsAll input/output (three-state) pinsCin——77SymbolMinMaxUnitfref crystalfref ext161625166.671MHzMHzfsys166.6783.33MHzMHzSDRAM and FlexBus Output High VoltageMobile DDR/Bus Input High Voltage (nominal 1.8V)DDR/Bus Pad Supply Voltage (nominal 2.5V)SDR/Bus Pad Supply Voltage (nominal 3.3V)IOH –5.0 mA for all modesSDVOHSDRAM and FlexBus Output Low VoltageMobile DDR/Bus Input High Voltage (nominal 1.8V)DDR/Bus Pad Supply Voltage (nominal 2.5V)SDR/Bus Pad Supply Voltage (nominal 3.3V)IOL 5.0 mA for all modesSDVOLInput Leakage CurrentVin VDD or VSS, Input-only pins1UnitVVpFRefer to the signals section for pins having weak internal pull-up devices.This parameter is characterized before qualification rather than 100% tested.25.5Oscillator and PLL Electrical CharacteristicsTable 11. PLL Electrical CharacteristicsNum1CharacteristicPLL Reference Frequency RangeCrystal referenceExternal referenceCore/system frequencyCLKOUT Frequencyfsys/2512 Hz2256 Hz23Crystal Start-up Time3,4tcst—10ms4EXTAL Input High VoltageCrystal Mode5All other

MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8 Hardware Design Considerations 6 Freescale Semiconductor 3.3 ADC Power Filtering To minimize noise, an external fi lters is required for the ADCV DD po

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