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ESP32 DatasheetEspressif SystemsApril 11, 2017

About This GuideThis document provides introduction to the specifications of ESP32 hardware.The document structure is as follows:ChapterTitleChapter 1OverviewChapter 2Pin DefinitionsIntroduction to the pin layout and descriptions.Chapter 3Functional DescriptionDescription of the major functional modules.Chapter 4Peripheral InterfaceDescription of the peripheral interfaces integrated on ESP32.Chapter 5Electrical CharacteristicsThe electrical characteristics and data of ESP32.Chapter 6Package InformationThe package details of ESP32.Chapter 7SubjectPart Number and Ordering InformationAn overview of ESP32, including featured solutions, basic andadvanced features, applications and development support.The part number and ordering information of the ESP32 series.Chapter 8Supported ResourcesThe ESP32-related documents and community resources.Appendix ATouch SensorThe touch sensor design and layout guidelines.Appendix BCode ExamplesInput and output code examples.Appendix CESP32 Pin ListsLists of ESP32’s GPIO Matrix, Ethernet MAC and IO MUXpins.Release NotesDateVersionRelease notes2016.08V1.0First release.Added Chapter Part Number and Ordering Information;Updated Section MCU and Advanced Features;Updated Section Block Diagram;Updated Chapter Pin Definitions;2017.02V1.1Updated Section CPU and Memory;Updated Section Audio PLL Clock;Updated Section Recommended Operating Conditions;Updated Chapter Package Information;Updated Chapter Learning Resources.2017.03V1.2Added a note to Table Pin Description;Updated the note in Section Internal Memory.Added Appendix ESP32 Pin Lists;2017.04V1.3Updated Table Wi-Fi Radio Characteristics;Updated Figure ESP32 Pin Layout (for QFN 5*5).

Disclaimer and Copyright NoticeInformation in this document, including URL references, is subject to change without notice. THIS DOCUMENT ISPROVIDED AS IS WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, NON-INFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISEARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.All liability, including liability for infringement of any proprietary rights, relating to use of information in this document is disclaimed. No licenses express or implied, by estoppel or otherwise, to any intellectual property rightsare granted herein. The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is aregistered trademark of Bluetooth SIG.All trade names, trademarks and registered trademarks mentioned in this document are property of their respectiveowners, and are hereby acknowledged.Copyright 2017 Espressif Inc. All rights reserved.

Contents1 Overview11.111.21.3Featured Solutions1.1.1 Ultra-Low-Power-Solution11.1.2 Complete Integration Solution1Basic Protocols11.2.1 Wi-Fi11.2.2 Bluetooth2MCU and Advanced Features31.3.1 CPU and Memory31.3.2 Clocks and Timers31.3.3 Advanced Peripheral Interfaces31.3.4 Security41.3.5 Development Support41.4Application41.5Block Diagram52 Pin Definitions62.1Pin Layout62.2Pin Description72.3Power Scheme102.4Strapping Pins113 Functional Description123.1123.23.33.43.5CPU and Memory3.1.1 CPU123.1.2 Internal Memory123.1.3 External Flash and SRAM133.1.4 Memory Map13Timers and Watchdogs153.2.1 64-bit Timers153.2.2 Watchdog Timers15System Clocks163.3.1 CPU Clock163.3.2 RTC Clock163.3.3 Audio PLL Clock16Radio173.4.1 2.4 GHz Receiver173.4.2 2.4 GHz Transmitter173.4.3 Clock Generator17Wi-Fi173.5.1 Wi-Fi Radio and Baseband183.5.2 Wi-Fi MAC183.5.3 Wi-Fi Firmware183.5.4 Packet Traffic Arbitration (PTA)19

3.63.7Bluetooth193.6.1 Bluetooth Radio and Baseband193.6.2 Bluetooth Interface203.6.3 Bluetooth Stack203.6.4 Bluetooth Link Controller20RTC and Low-Power Management224 Peripherals and Sensors244.1General Purpose Input / Output Interface (GPIO)244.2Analog-to-Digital Converter (ADC)244.3Ultra-Low-Noise Analog Pre-Amplifier244.4Hall Sensor244.5Digital-to-Analog Converter (DAC)244.6Temperature Sensor254.7Touch Sensor254.8Ultra-Lower-Power Coprocessor254.9Ethernet MAC Interface264.10 SD/SDIO/MMC Host Controller264.11 SDIO/SPI Slave Controller264.12 Universal Asynchronous Receiver Transmitter (UART)274.13 I2C Interface274.14 I2S Interface274.15 Infrared Remote Controller274.16 Pulse Counter284.17 Pulse Width Modulation (PWM)284.18 LED PWM284.19 Serial Peripheral Interface (SPI)284.20 Accelerator285 Electrical Characteristics295.1Absolute Maximum Ratings295.2Recommended Operating Conditions295.3RF Power Consumption Specifications305.4Wi-Fi Radio305.5Bluetooth Radio315.65.5.1 Receiver–Basic Data Rate315.5.2 Transmitter - Basic Data Rate315.5.3 Receiver–Enhanced Data Rate325.5.4 Transmitter–Enhanced Data Rate32Bluetooth LE Radio335.6.1 Receiver335.6.2 Transmitter336 Package Information357 Part Number and Ordering Information36

8 Learning Resources378.1Must-Read Documents378.2Must-Have Resources37Appendix A – Touch Sensor38A.1. Electrode Pattern38A.1. Electrode Pattern38Appendix B – Code Examples40B.1. Input40B.2. Output40Appendix C - ESP32 Pin Lists41C.1. Notes on ESP32 Pin Lists41C.2. GPIO Matrix43C.3. Ethernet MAC48C.4. IO MUX48

List of Tables1Pin Description72Strapping Pins113Memory and Peripheral Mapping144Functionalities Depending on the Power Modes225Power Consumption by Power Modes236Capacitive Sensing GPIOs Available on ESP32257Absolute Maximum Ratings298Recommended Operating Conditions299RF Power Consumption Specifications3010Wi-Fi Radio Characteristics3011Receiver Characteristics–Basic Data Rate3112Transmitter Characteristics–Basic Data Rate3113Receiver Characteristics–Enhanced Data Rate3214Transmitter Characteristics–Enhanced Data Rate3215Receiver Characteristics–BLE3316Transmitter Characteristics–BLE3317ESP32 Ordering Information3618Notes on ESP32 Pin Lists4119GPIO Matrix4320Ethernet MAC48

List of Figures1Function Block Diagram52ESP32 Pin Layout (for QFN 6*6)63ESP32 Pin Layout (for QFN 5*5)74Address Mapping Structure135QFN48 (6x6 mm) Package356QFN48 (5x5 mm) Package357ESP32 Part Number368A Typical Touch Sensor Application389Electrode Pattern Requirements3810Sensor Track Routing Requirements39

1. OVERVIEW1. OverviewESP32 is a single 2.4 GHz Wi-Fi and Bluetooth combo chip designed with TSMC ultra-low-power 40 nm technology. It is designed to achieve the best power performance and RF performance, showing robustness, versatility,excellent features and reliability in a wide variety of applications and different power profiles.The ESP32 series of chips include ESP32-D0WDQ6, ESP32-D0WD, ESP32-D2WD, and ESP32-S0WD. For detailsof part number and ordering information, please refer to Part Number and Ordering Information.1.1 Featured Solutions1.1.1 Ultra-Low-Power-SolutionESP32 is designed for mobile, wearable electronics, and Internet of Things (IoT) applications. It has many featuresof the state-of-the-art low power chips, including fine resolution clock gating, power modes, and dynamic powerscaling.For instance, in a low-power IoT sensor hub application scenario, ESP32 is woken up periodically and only whena specified condition is detected; low duty cycle is used to minimize the amount of energy that the chip expends.The output power of the power amplifier is also adjustable to achieve an optimal trade-off between communicationrange, data rate and power consumption.Note:For more information, refer to Section 3.7 RTC and Low-Power Management.1.1.2 Complete Integration SolutionESP32 is the most integrated solution for Wi-Fi Bluetooth applications in the industry with less than 10 externalcomponents. ESP32 integrates the antenna switch, RF balun, power amplifier, low noise receive amplifier, filters,and power management modules. As such, the entire solution occupies minimal Printed Circuit Board (PCB)area.ESP32 uses CMOS for single-chip fully-integrated radio and baseband, and also integrates advanced calibrationcircuitries that allow the solution to dynamically adjust itself to remove external circuit imperfections or adjust tochanges in external conditions.As such, the mass production of ESP32 solutions does not require expensive and specialized Wi-Fi test equipment.1.2 Basic Protocols1.2.1 Wi-Fi 802.11 b/g/n/e/i 802.11 n (2.4 GHz), up to 150 Mbps 802.11 e: QoS for wireless multimedia technology WMM-PS, UAPSDEspressif Systems1ESP32 Datasheet V1.3

1. OVERVIEW A-MPDU and A-MSDU aggregation Block ACK Fragmentation and defragmentation Automatic Beacon monitoring/scanning 802.11 i security features: pre-authentication and TSN Wi-Fi Protected Access (WPA)/WPA2/WPA2-Enterprise/Wi-Fi Protected Setup (WPS) Infrastructure BSS Station mode/SoftAP mode Wi-Fi Direct (P2P), P2P Discovery, P2P Group Owner mode and P2P Power Management UMA compliant and certified Antenna diversity and selectionNote:For more information, refer to Section 3.5 Wi-Fi.1.2.2 Bluetooth Compliant with Bluetooth v4.2 BR/EDR and BLE specification Class-1, class-2 and class-3 transmitter without external power amplifier Enhanced power control 10 dBm transmitting power NZIF receiver with -98 dBm sensitivity Adaptive Frequency Hopping (AFH) Standard HCI based on SDIO/SPI/UART High speed UART HCI, up to 4 Mbps BT 4.2 controller and host stack Service Discover Protocol (SDP) General Access Profile (GAP) Security Manage Protocol (SMP) Bluetooth Low Energy (BLE) ATT/GATT HID All GATT-based profile supported SPP-Like GATT-based profile BLE Beacon A2DP/AVRCP/SPP, HSP/HFP, RFCOMM CVSD and SBC for audio codec Bluetooth Piconet and ScatternetEspressif Systems2ESP32 Datasheet V1.3

1. OVERVIEW1.3 MCU and Advanced Features1.3.1 CPU and Memory Xtensa Single-/Dual-Core 32-bit LX6 microprocessor(s), up to 600 DMIPS 448 KB ROM 520 KB SRAM 16 KB SRAM in RTC QSPI flash/SRAM, up to 4 x 16 MB Power supply: 2.2V to 3.6V1.3.2 Clocks and Timers Internal 8 MHz oscillator with calibration Internal RC oscillator with calibration External 2 MHz to 40 MHz crystal oscillator External 32 kHz crystal oscillator for RTC with calibration Two timer groups, including 2 x 64-bit timers and 1 x main watchdog in each group RTC timer with sub-second accuracy RTC watchdog1.3.3 Advanced Peripheral Interfaces 12-bit SAR ADC up to 18 channels 2 8-bit D/A converters 10 touch sensors Temperature sensor 4 SPI 2 I2S 2 I2C 3 UART 1 host (SD/eMMC/SDIO) 1 slave (SDIO/SPI) Ethernet MAC interface with dedicated DMA and IEEE 1588 support CAN 2.0 IR (TX/RX) Motor PWM LED PWM up to 16 channels Hall sensor Ultra-low-noise analog pre-amplifierEspressif Systems3ESP32 Datasheet V1.3

1. OVERVIEW1.3.4 Security IEEE 802.11 standard security features all supported, including WFA, WPA/WPA2 and WAPI Secure boot Flash encryption 1024-bit OTP, up to 768-bit for customers Cryptographic hardware acceleration:– AES– HASH (SHA-2) library– RSA– ECC– Random Number Generator (RNG)1.3.5 Development Support SDK Firmware for fast on-line programming Open source toolchains based on GCCNote:For more information, please refer to Learnig Resources.1.4 Application Generic low power IoT sensor hub Generic low power IoT loggers Video streaming from camera Over The Top (OTT) devices Music players– Internet music players– Audio streaming devices Wi-Fi enabled toys– Loggers– Proximity sensing toys Wi-Fi enabled speech recognition devices Audio headsets Smart power plugs Home automation Mesh networkEspressif Systems4ESP32 Datasheet V1.3

1. OVERVIEW Industrial wireless control Baby monitors Wearable electronics Wi-Fi location-aware devices Security ID tags Healthcare– Proximity and movement-monitoring trigger devices– Temperature sensing loggers1.5 Block I2SWi-Fi MACWi-FibasebandRFtransmitSDIOUARTCore and memoryCAN2 or 1 x Xtensa 32bit LX6 llerSwitchEmbedded FlashCryptographic sensorRTCTouch sensorDACULPcoprocesserPMURecoverymemoryADCFigure 1: Function Block DiagramNote:Products in the ESP32 series differ from each other in terms of their support for embedded flash and the number of CPUsthey have. For details, please refer to Part Number and Ordering Information.Espressif Systems5ESP32 Datasheet V1.3

2. PIN DEFINITIONS2. Pin DefinitionsCAP1CAP2VDDAXTAL PXTAL NVDDAGPIO21U0TXDU0RXDGPIO22GPIO19VDD3P3 CPU4847464544434241403938372.1 Pin LayoutVDDA136GPIO23LNA IN235GPIO18VDD3P3334GPIO5VDD3P3433SD DATA 1SENSOR VP532SD DATA 0SENSOR CAPP631SD CLKSENSOR CAPN730SD CMDSENSOR VN829SD DATA 3CHIP PU928SD DATA 2ESP3249 GND192021222324MTCKMTDOGPIO2GPIO0GPIO4MTDIVDD3P3 RTC1718MTMSGPIO161625GPIO27121532K XPGPIO26VDD SDIO14GPIO1726GPIO252711131032K XNVDET 1VDET 2Figure 2: ESP32 Pin Layout (for QFN 6*6)Espressif Systems6ESP32 Datasheet V1.3

CAP1CAP2VDDAXTAL PXTAL NVDDAGPIO21U0TXDU0RXDGPIO22484746454443424140392. PIN DEFINITIONSVDDA138GPIO19LNA IN237VDD3P3 CPUVDD3P3336GPIO23VDD3P3435GPIO18SENSOR VP534GPIO5SENSOR CAPP633SD DATA 132SD DATA 031SD CLKSENSOR CAPN7SENSOR VN8CHIP PU930SD CMDVDET 11029SD DATA 3VDET 21128SD DATA 2ESP3249 GND2021222324MTCKMTDOGPIO2GPIO0GPIO4VDD3P3 RTC19GPIO161825MTDI1417GPIO25MTMSVDD SDIO16GPIO1726GPIO2727151213GPIO2632K XP32K XNFigure 3: ESP32 Pin Layout (for QFN 5*5)Note:For details on ESP32’s part number and the corresponding packaging, please refer to Part Number and Ordering Information.2.2 Pin DescriptionTable 1: Pin DescriptionNameNo.TypeFunctionAnalogVDDA1PAnalog power supply (2.3V 3.6V)LNA IN2I/ORF input and outputVDD3P33PAmplifier power supply (2.3V 3.6V)VDD3P34PAmplifier power supply (2.3V 3.6V)VDD3P3 RTCGPIO36, ADC PRE AMP, ADC1 CH0, RTC GPIO0SENSOR VP5INote: Connects 270 pF capacitor from SENSOR VP to SENSOR CAPP when used as ADC PRE AMP.Espressif Systems7ESP32 Datasheet V1.3

2. PIN DEFINITIONSNameNo.TypeFunctionGPIO37, ADC PRE AMP, ADC1 CH1, RTC GPIO1SENSOR CAPP6INote: Connects 270 pF capacitor from SENSOR VP to SENSOR CAPP when used as ADC PRE AMP.GPIO38, ADC1 CH2, ADC PRE AMP, RTC GPIO2SENSOR CAPN7INote: Connects 270 pF capacitor from SENSOR VN to SENSOR CAPN when used as ADC PRE AMP.GPIO39, ADC1 CH3, ADC PRE AMP, RTC GPIO3SENSOR VN8INote: Connects 270 pF capacitor from SENSOR VN to SENSOR CAPN when used as ADC PRE AMP.Chip Enable (Active High)CHIP PU9IHigh: On, chip works properlyLow: Off, chip works at the minimum powerNote: Do not leave CHIP PU pin floatingVDET 110IGPIO34, ADC1 CH6, RTC GPIO4VDET 211IGPIO35, ADC1 CH7, RTC GPIO532K XP12I/O32K XN13I/OGPIO2514I/OGPIO25, DAC 1, ADC2 CH8, RTC GPIO6, EMAC RXD0GPIO2615I/OGPIO26, DAC 2, ADC2 CH9, RTC GPIO7, EMAC RXD1GPIO2716I/OGPIO27, ADC2 CH7, TOUCH7, RTC GPIO17, EMAC RX DVMTMS17I/OMTDI18I/OVDD3P3 4I/OGPIO32,32K XP (32.768 kHz crystal oscillator input),ADC1 CH4, TOUCH9, RTC GPIO9GPIO33, 32K XN (32.768 kHz crystal oscillator output),ADC1 CH5, TOUCH8, RTC GPIO8GPIO14, ADC2 CH6, TOUCH6, RTC GPIO16, MTMS, HSPICLK, HS2 CLK, SD CLK, EMAC TXD2GPIO12, ADC2 CH5, TOUCH5, RTC GPIO15, MTDI, HSPIQ,HS2 DATA2, SD DATA2, EMAC TXD3RTC IO power supply input (1.8V 3.3V)GPIO13, ADC2 CH4, TOUCH4, RTC GPIO14, MTCK, HSPID,HS2 DATA3, SD DATA3, EMAC RX ERGPIO15,ADC2 CH3,TOUCH3,RTC GPIO13,MTDO,HSPICS0, HS2 CMD, SD CMD, EMAC RXD3GPIO2,ADC2 CH2,TOUCH2,RTC GPIO12,HSPIWP,HS2 DATA0, SD DATA0GPIO0, ADC2 CH1, TOUCH1, RTC GPIO11, CLK OUT1,EMAC TX CLKGPIO4,ADC2 CH0,TOUCH0,RTC GPIO10,HSPIHD,HS2 DATA1, SD DATA1, EMAC TX ERVDD SDIOGPIO1625I/OGPIO16, HS1 DATA4, U2RXD, EMAC CLK OUTVDD SDIO26P1.8V or 3.3V power supply outputGPIO1727I/OGPIO17, HS1 DATA5, U2TXD, EMAC CLK OUT 180SD DATA 228I/OGPIO9, SD DATA2, SPIHD, HS1 DATA2, U1RXDSD DATA 329I/OGPIO10, SD DATA3, SPIWP, HS1 DATA3, U1TXDSD CMD30I/OGPIO11, SD CMD, SPICS0, HS1 CMD, U1RTSSD CLK31I/OGPIO6, SD CLK, SPICLK, HS1 CLK, U1CTSEspressif Systems8ESP32 Datasheet V1.3

2. PIN DEFINITIONSNameNo.TypeFunctionSD DATA 032I/OGPIO7, SD DATA0, SPIQ, HS1 DATA0, U2RTSSD DATA 133I/OGPIO8, SD DATA1, SPID, HS1 DATA1, U2CTSVDD3P3 CPUGPIO534I/OGPIO5, VSPICS0, HS1 DATA6, EMAC RX CLKGPIO1835I/OGPIO18, VSPICLK, HS1 DATA7GPIO2336I/OGPIO23, VSPID, HS1 STROBEVDD3P3 CPU37PCPU IO power supply input (1.8V 3.3V)GPIO1938I/OGPIO19, VSPIQ, U0CTS, EMAC TXD0GPIO2239I/OGPIO22, VSPIWP, U0RTS, EMAC TXD1U0RXD40I/OGPIO3, U0RXD, CLK OUT2U0TXD41I/OGPIO1, U0TXD, CLK OUT3, EMAC RXD2GPIO2142I/OGPIO21, VSPIHD, EMAC TX ENAnalogVDDA43PAnalog power supply (2.3V 3.6V)XTAL N44OExternal crystal outputXTAL P45IExternal crystal inputVDDA46PDigital power supply for PLL (2.3V 3.6V)CAP247ICAP148IConnects with a 10 nF series capacitor to groundGND49PGroundConnects with a 3 nF capacitor and 20 kΩ resistor in parallel toCAP1Note: ESP32-D2WD’s pins GPIO16, GPIO17, SD CMD, SD CLK, SD DATA 0 and SD DATA 1 are used for connectingthe embedded flash, and are not recommended for other uses. For a quick reference guide of the IO MUX, Ethernet MAC, and GIPO Matrix pins of ESP32, please refer to AppendixC: ESP32 Pin Lists.Espressif Systems9ESP32 Datasheet V1.3

2. PIN DEFINITIONS2.3 Power SchemeESP32 digital pins are divided into three different power domains: VDD3P3 RTC VDD3P3 CPU VDD SDIOVDD3P3 RTC is also the input power supply for RTC and CPU. VDD3P3 CPU is also the input power supply forCPU.VDD SDIO connects to the output of an internal LDO, whose input is VDD3P3 RTC. When VDD SDIO is connected to the same PCB net together with VDD3P3 RTC; the internal LDO is disabled automatically.The internal LDO can be configured as 1.8V, or the same voltage as VDD3P3 RTC. It can be powered off viasoftware to minimize the current of flash/SRAM during the Deep-sleep mode.Note: It is required that the power supply of VDD3P3 RTC, VDD3P3 CPU and analog must be stable before the pinCHIP PU is set at high level. The operating voltage for ESP32 ranges from 2.3V to 3.6V. When using a single power supply, the recommendedvoltage of the power supply is 3.3V, and its recommended output current is 500 mA or more.Espressif Systems10ESP32 Datasheet V1.3

2. PIN DEFINITIONS2.4 Strapping PinsESP32 has five strapping pins: MTDI/GPIO12: internal pull-down GPIO0: internal pull-up GPIO2: internal pull-down MTDO/GPIO15: internal pull-up GPIO5: internal pull-upSoftware can read the value of these five bits from the register ”GPIO STRAPPING”.During the chip power-on reset, the latches of the strapping pins sample the voltage level as strapping bits of ”0”or ”1”, and hold these bits until the chip is powered down or shut down. The strapping bits configure the deviceboot mode, the operating voltage of VDD SDIO and other system initial settings.Each strapping pin is connected with its internal pull-up/pull-down during the chip reset. Consequently, if a strapping pin is unconnected or the connected external circuit is high-impendence, the internal weak pull-up/pull-downwill determine the default input level of the strapping pins.To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or apply the hostMCU’s GPIOs to control the voltage level of these pins when powering on ESP32.After reset, the strapping pins work as the normal functions pins.Refer to Table 2 for detailed boot modes configuration by strapping pins.Table 2: Strapping PinsVoltage of Internal LDO (VDD SDIO)PinDefaultMTDIPull-down3.3V1.8V01Booting ModePinDefaultSPI BootDownload ging Log on U0TXD During BootingPinDefaultU0TXD TogglingU0TXD SilentMTDOPull-up10Timing of SDIO ge OutputRising-edge OutputFalling-edge OutputRising-edge OutputPull-up0011Pull-up0101Note:Firmware can configure register bits to change the setting of ”Voltage of Internal LDO (VDD SDIO)” and ”Timing of SDIOSlave” after booting.Espressif Systems11ESP32 Datasheet V1.3

3. FUNCTIONAL DESCRIPTION3. Functional DescriptionThis chapter describes the functions integrated in ESP32.3.1 CPU and Memory3.1.1 CPUESP32 contains one/two low-power Xtensa 32-bit LX6 microprocessor(s) with the following features. 7-stage pipeline to support the clock frequency of up to 240 MHz 16/24-bit Instruction Set provides high code-density Support Floating Point Unit Support DSP instructions, such as 32-bit Multiplier, 32-bit Divider, and 40-bit MAC Support 32 interrupt vectors from about 70 interrupt sourcesThe single-/dual-CPU interfaces include: Xtensa RAM/ROM Interface for instruction and data Xtensa Local Memory Interface for fast peripheral register access Interrupt with external and internal sources JTAG interface for debugging3.1.2 Internal MemoryESP32’s internal memory includes: 448 KB ROM for booting and core functions 520 KB on-chip SRAM for data and instruction 8 KB SRAM in RTC, which is called RTC SLOW Memory and can be used for co-processor accessing duringthe Deep-sleep mode 8 KB SRAM in RTC, which is called RTC FAST Memory and can be used for data storage and the main CPUduring RTC Boot from the Deep-sleep mode 1 kbit of eFuse, of which 256 bits are used for the system (MAC address and chip configuration) and theremaining 768 bits are reserved for customer applications, including Flash-Encryption and Chip-ID Embedded flashNote: Products in the ESP32 series differ from each other in terms of their support for embedded flash and the size ofthe embedded flash. For details, please refer to Part Number and Ordering Information. From the ESP32 series of chips specified in this document, ESP32-D2WD has 16 Mbits of embedded flash, connected via pins GPIO16, GPIO17, SD CMD, SD CLK, SD DATA 0 and SD DATA 1. The other chips in the ESP32series have no embedded flash.Espressif Systems12ESP32 Datasheet V1.3

3. FUNCTIONAL DESCRIPTION3.1.3 External Flash and SRAMESP32 supports up to four 16-MB external QSPI flash and SRAM with hardware encryption based on AES toprotect developer’s programs and data.ESP32 can access the external QSPI flash and SRAM through high-speed caches. Up to 16 MB of external flash are memory-mapped onto the CPU code space, supporting 8-bit, 16-bit and32-bit access. Code execution is supported. Up to 8 MB of external flash/SRAM memory are mapped onto the CPU data space, supporting 8-bit, 16-bitand 32-bit access. Data-read is supported on the flash and SRAM. Data-write is supported on the SRAM.Note:ESP32 chips with embedded flash do not support the address mapping between external flash and peripherals.3.1.4 Memory MapThe structure of address mapping is shown in Figure 4. The memory and peripherals mapping of ESP32 is shownin Table 3.Figure 4: Address Mapping StructureEspressif Systems13ESP32 Datasheet V1.3

3. FUNCTIONAL DESCRIPTIONTable 3: Memory and Peripheral MappingCategoryEmbeddedTargetStart AddressEnd AddressSizeInternal ROM 00x4000 00000x4005 FFFF384 KBInternal ROM 10x3FF9 00000x3FF9 FFFF64 KBInternal SRAM 00x4007 00000x4009 FFFF192 KB0x3FFE 00000x3FFF FFFF0x400A 00000x400B FFFF0x3FFA E0000x3FFD FFFF0x3FF8 00000x3FF8 1FFF0x400C 00000x400C 1FFF0x5000 00000x5000 1FFF8 KB0x3F40 00000x3F7F FFFF4 MB0x400C 20000x40BF FFFFExternal SRAM0x3F80 00000x3FBF FFFF4 MBDPort Register0x3FF0 00000x3FF0 0FFF4 KBAES Accelerator0x3FF0 10000x3FF0 1FFF4 KBRSA Accelerator0x3FF0 20000x3FF0 2FFF4 KBSHA Accelerator0x3FF0 30000x3FF0 3FFF4 KBSecure Boot0x3FF0 40000x3FF0 4FFF4 KBCache MMU Table0x3FF1 00000x3FF1 3FFF16 KBPID Controller0x3FF1 F0000x3FF1 FFFF4 KBUART00x3FF4 00000x3FF4 0FFF4 KBSPI10x3FF4 20000x3FF4 2FFF4 KBSPI00x3FF4 30000x3FF4 3FFF4 KBGPIO0x3FF4 40000x3FF4 4FFF4 KBRTC0x3FF4 80000x3FF4 8FFF4 KBIO MUX0x3FF4 90000x3FF4 9FFF4 KBSDIO Slave0x3FF4 B0000x3FF4 BFFF4 KBUDMA10x3FF4 C0000x3FF4 CFFF4 KBI2S00x3FF4 F0000x3FF4 FFFF4 KBUART10x3FF5 00000x3FF5 0FFF4 KBI2C00x3FF5 30000x3FF5 3FFF4 KBUDMA00x3FF5 40000x3FF5 4FFF4 KBSDIO Slave0x3FF5 50000x3FF5 5FFF4 KBRMT0x3FF5 60000x3FF5 6FFF4 KBPCNT0x3FF5 70000x3FF5 7FFF4 KBSDIO Slave0x3FF5 80000x3FF5 8FFF4 KBLED PWM0x3FF5 90000x3FF5 9FFF4 KBEfuse Controller0x3FF5 A0000x3FF5 AFFF4 KBFlash Encryption0x3FF5 B0000x3FF5 BFFF4 KBPWM00x3FF5 E0000x3FF5 EFFF4 KBTIMG00x3FF5 F0000x3FF5 FFFF4 KBTIMG10x3FF6 00000x3FF6 0FFF4 KBInternal SRAM 1MemoryInternal SRAM 2RTC FAST MemoryRTC SLOW MemoryExternalExternal FlashMemoryPeripheralEspressif Systems14128 KB200 KB8 KB11 MB248 KBESP32 Datasheet V1.3

3. FUNCTIONAL DESCRIPTIONCategoryPeripheralTargetStart AddressEnd AddressSizeSPI20x3FF6 40000x3FF6 4FFF4 KBSPI30x3FF6 50000x3FF6 5FFF4 KBSYSCON0x3FF6 60000x3FF6 6FFF4 KBI2C10x3FF6 70000x3FF6 7FFF4 KBSDMMC0x3FF6 80000x3FF6 8FFF4 KBEMAC0x3FF6 90000x3FF6 AFFF8 KBPWM10x3FF6 C0000x3FF6 CFFF4 KBI2S10x3FF6 D0000x3FF6 DFFF4 KBUART20x3FF6 E0000x3FF6 EFFF4 KBPWM20x3FF6 F0000x3FF6 FFFF4 KBPWM30x3FF7 00000x3FF7 0FFF4 KBRNG0x3FF7 50000x3FF7 5FFF4 KB3.2 Timers and Watchdogs3.2.1 64-bit TimersThere are four general-purpose timers embedded in the ESP32. They are all 64-bit generic timers which are basedon 16-bit prescalers and 64-bit auto-reload-capable up/downcounters.The timers feature: A 16-bit clock prescaler, from 2 to 65536 A 64-bit time-base counter Configurable up/down time-base counter: incrementing or decrmenting Halt and resume of time-base counter Auto-reload at alarming Software-controlled instant reload Level and edge interrupt generation3.2.2 Watchdog TimersThe ESP32 has three watchdog timers: one in each of the two timer modules (called the Main Watchdog Timer,or MWDT) and one in the RTC module (called the RTC Watchdog Timer, or RWDT). These watchdog timers areintended to recover from an unforeseen fault, causing the application program to abandon its normal sequence. Awatchdog timer has 4 stages. Each stage may take one of three or four actions upon the expiry of a programmedtime period for this stage unless the watchdog is fed or disabled. The actions are: interrupt, CPU reset, and corereset, and system reset. Only the RWDT can trigger the system reset, and is able to reset the entire chip, includingthe RTC itself. A timeout value can be set for each stage individually.During flash boot the RWDT and the first MWDT start automatically in order to detect and recover from bootingproblems.The ESP32 watchdogs have the following features: 4 stages, each of which can be configured or disabled separatelyEspressif Systems15ESP32 Datasheet V1.3

3. FUNCTIONAL DESCRIPTION Programmable time period for each stage One of 3 or 4 possible actions (interrupt, CPU reset, core reset, and system reset) upon the expiry of eachstage 32-bit expiry counter Write protection, to prevent the RWDT and MWDT configuration from being inadvertently altered SPI flash boot protectionIf the boot process from an SPI flash does not complete within a predetermined time period, the watchdogwill reboot the entire system.3.3 System Clocks3.3.1 CPU ClockUpon reset, an external crystal clock source (2 MHz 60 MHz), is selected as the default CPU clock. The externalcrystal clock source also connects to a PLL to generate a high frequency clock (typically 160 MHz).In addition, ESP32 has an internal 8 MHz oscillator. The accuracy of the oscillator is guaranteed by design and isstable within the operating temperatures (with a margin error of 1%). Hence, the application can then select theclock source from the external crystal clock source, the PLL clock or the internal 8 MHz oscillator. The selectedclock source drives the CPU clock, directly or after division, depending on the application.3.3.2 RTC ClockThe RTC clock has five possible sources: external low speed (32 kHz) crystal clock external crystal clock divided by 4 internal RC oscillator (typically about 150 kHz and adjustable) internal 8 MHz oscillator internal 31.25 kHz clock (derived from the internal 8 MHz oscillator divided by 256)When the chip is in the normal power mode and needs faster CPU accessing, the application can choose theexternal high speed crystal clock divided by 4 or the internal 8 MHz oscillator. When the chip operates in the lowpower mode, the application chooses the external low speed (32 kHz) crystal clock, the internal RC clock or theinternal 31.25 kHz clock.3.3.3 Audio PLL ClockThe audio clock is generated by the ultra-low-noise fractional-N PLL. The output frequency of the audio PLL isprogrammable, from 16 MHz to 128 MHz, and is given by the following formula:sdm0f(sdm2 sdm128 216 4)fout xtal2(odiv 2)where fout is the output frequency, fxtal is the frequency of the crystal oscillator, and sdm2, sdm1, sdm0 and odivare all integer values, configurable by registers.Espressif Systems16ESP32 Datasheet V1.3

3. FUNCTIONAL DESCRIPTION3.4 RadioThe ESP32 radio consists of the following main blocks: 2.4 GHz receiver 2.4 GHz transmitter bias and regulators balun and transmit-receive switch clock generator3.4.1 2.4 GHz ReceiverThe 2.4 GHz receiver down-converts the 2.4 GHz RF signal to quadrature baseband signals and converts themto the digital domain with 2 high-resolution, high-speed ADCs. To adapt to varying signal channel conditions,RF filters, Automatic Gain Control (AGC), DC offset cancellation circuits and baseband filters are integrated withinESP32.3.4.2 2.4 GHz TransmitterThe 2.4 GHz transmitter up-converts the quadrature baseband signals to the 2.4 GHz RF signal, and drives theantenna with a high powered Complementary Metal Oxide Semiconductor (CMOS) power amplifier. The use ofdigital calibration further improves the linearity of the power amplifier, enabling state-of-the-art performance ofdelivering 20.5 dBm of average power for 802.11b transmission and 17 dBm for 802.11n transmission.Additional calibrations are integrated to cancel any imperfections of the radio, such as: Carrier leakage I/Q phase matching Baseband nonlinearities RF nonlinearities Antenna matchingThese built-in calibration routines reduce the amount of time and required for product test and render test equipment unnecessary.3.4.3 Clock GeneratorThe clock generator

ESP32 is the most integrated solution for Wi-Fi Bluetooth applications in the industry with less than 10 external components. ESP32 integrates the antenna switch, RF balun, power amplifier, low noise receive amplifier, filters, and power management modules. As such, the ent

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American Revolution Lapbook Cut out as one piece. You will first fold in the When Where side flap and then fold like an accordion. You will attach the back of the Turnaround square to the lapbook and the Valley Forge square will be the cover. Write in when the troops were at Valley Forge and where Valley Forge is located. Write in what hardships the Continental army faced and how things got .