Introduction to LTspiceAcknowledgment: LTspice material based in part byDevon Rosner (6.101 TA 2014), Engineer, Linear Technology6.101 Spring 2020Lecture 4
SPICE Simulation Program with IntegratedCircuit Emphasis Developed in 1973 by Laurence Nagel atUC Berkeley’s Electronics ResearchLaboratory Dependent on user defined devicemodels6.101 Spring 2020Lecture 42
NetlistsComponentsCommands6.101 Spring 2020Lecture 43
LTspice Developed in 1998 by Mike Engelhardt at LinearTechnology Corporation GUI, simulator, and schematic - netlist for SPICE FREE and comes with tons of modelsLtspice makes thisYou do this6.101 Spring 2020Lecture 44
Getting StartedTHAT’S IT!These buttons are where you will live6.101 Spring 2020Lecture 45
Component to Menu Item Matchup6.101 Spring 2020Lecture 46
Net LabelsBy labeling nets you can avoid a giant mess of wires. Always usethese for at least your power supplies. When you start makinglarge circuits, your power supplies will provide energy all over yourschematic.6.101 Spring 2020Lecture 47
Adding Other ComponentsDevices besides basic resistors, capacitors, andinductors are found from this button6.101 Spring 2020Lecture 48
Op-AmpsThere are no “ideal” op-amps in reality. BUT, there are in LTspice.PAY CLOSEATTENTIONTO THE TEXTYou mustliterally include.lib opamp.subin your netlistor schematicas a SPICEdirective.6.101 Spring 2020Lecture 49
Op-AmpsThough listed as “ideal” there are still 2 parametersyou can tweak.Open Loop Gain: As thisnumber approaches infinity,the Op Amp becomes more“ideal”. Look at some Op Ampdata sheets to see some realopen loop gains.Gain Bandwidth: As thisnumber approaches infinity,the Op Amp becomes more“ideal”. To check if this is highenough, multiply your desiredClosed Loop Gain by yourhighest desired outputfrequency.6.101 Spring 2020Lecture 410
Op-AmpsTo more accurately model a real Op Amp not available in LTspice,UniversalOpamp2 has many tweakable parameters.Open loop gain, gainbandwidth, slew rate, currentlimit, rail-rail voltage, inputvoltage offset, phase margin,Rin, etc.6.101 Spring 2020Lecture 411
Editing ComponentsJust right click thecomponent6.101 Spring 2020Lecture 412
Editing ComponentsBut whatabout this?This is the basic voltage source menu.Use this for DC sources such as powersupplies or bias voltages.6.101 Spring 2020Lecture 413
Editing ComponentsVoltage sources can produce many test signals.PWL can be used to construct any signal.6.101 Spring 2020Lecture 414
Selecting Device ModelThere are no “ideal” BJT’s, MOSFET’s, etc. You can select a model(provided by LTspice), download models, or create your own.6.101 Spring 2020Lecture 415
Simulation: TransientTransient simulation gives Voltage and/or Currentvs.time.These are transientparameters fora voltage source6.101 Spring 2020Lecture 416
Simulation: TransientThis is all youreally need6.101 Spring 2020Lecture 417
Random Tangent: ParametersThis is aparameter6.101 Spring 2020You MUST define all of your parameters.The “list” command allows you to choosemultiple values (simulation simulates eachvalue separately).Lecture 418
What Should My Circuit Do? The very first step to any simulation is to know howyour circuit should behave. Simulation is a verificationtool NOT A CIRCUIT SOLVER. So how should this circuit behave?6.101 Spring 2020Lecture 419
Here’s Where You Write the Solution6.101 Spring 2020Lecture 420
Here’s Where You Write the Solutioni2i1vovxi3A DOUBLE POLE!!6.101 Spring 2020Lecture 421
Expected Behavior Double pole is at: We expect frequencies up to this point to belarge, but frequencies above to quickly dropoff due to the -40 dB/decade characteristicof the double pole6.101 Spring 2020Lecture 422
Transient SimulationHover over the desiredvoltage node to be probed andclick when you see this symbol**This is the current probe6.101 Spring 2020Lecture 423
Transient Simulation1 kHz10 kHz100 kHz1 MHz6.101 Spring 2020Lecture 424
AC SimulationAC simulation gives Voltage and/or Currentvs.frequency.6.101 Spring 2020Lecture 4This is the ACparameter.Just set theamplitude to 125
AC Simulation6.101 Spring 2020Lecture 426
Extra Fun: Math in LTspiceRemember:6.101 Spring 2020Lecture 427
Transient SimulationIt’s the same as before!6.101 Spring 2020Lecture 428
Even More Fun*Note: You can try out some math functions in the simulatorwindow, too! (ex: V(Vo)/V(Vi)).6.101 Spring 2020Lecture 429
AC Simulation6.101 Spring 2020Lecture 430
Temperature as a Variable PTAT current source6.101 Spring 2020Lecture 431
Temperature as a Variable6.101 Spring 2020Lecture 432
Including External Models PFET model Includesparameters todescribe MOSdevice physics6.101 Spring 2020Lecture 433
Making Things Pretty6.101 Spring 2020Lecture 434
Making Things Pretty6.101 Spring 2020Lecture 435
Making Things PrettyBob Reay of Linear Technology has provided a nifty tool on his website togive LTspice circuits an even better /SchematicViewer.htmlBefore:6.101 Spring 2020Lecture 436
Making Things PrettyBob Reay of Linear Technology has provided a nifty tool on his website togive LTspice circuits an even better /SchematicViewer.htmlAfter:6.101 Spring 2020Lecture 437
LTspice SecretsMany aspects and functions of LTspice are not documented. Youcan learn lots of interesting undocumented capabilities of LTspicefrom:http://ltwiki.org/?title Undocumented LTspiceOf particular interest should be B-sources. These allow you tomake devices such as non-linear resistors whose value isdetermined from a function of voltage, current, if statements,constants, etc. Though you cannot build these, they may be usefulto model a part not available in LTspice, or to model a specialfunction in your circuit you have not designed yet.6.101 Spring 2020Lecture 438
Questions?6.101 Spring 2020Lecture 439
M odesViewF8 – DragF9 – UndoShift F9 – RedoCtrl Z – Zoom AreaCtrl B – Zoom BackF8 – DragF9 – UndoShift F9 – RedoCtrl Z – Zoom AreaCtrl B – Zoom BackCtrl G – Toggle Grid‘0’ – ClearCtrl W – Attribute WindowCtrl A – Attribute EditorCtrl G – Toggle GridU – Mark Unncon. PinsA – Mark Text AnchorsR – RectangleC – CircleL – LineA – ArcC – CapacitorL – InductorD – DiodeCtrl E – MirrorCtrl R – RotateCtrl E – MirrorCtrl R – RotateF4 – Label NetF2 – ComponentT – TextS – Spice DirectiveT – TextCtrl H – Halt SimulationCtrl H – Halt SimulationR – ResistorG – GNDCtrl Click - AverageCtrl Click – Attr. Editanalog.comLTspiceCtrl H – Halt SimulationCtrl R – Run SimulationCtrl G – Goto Line #Use ASCII .raw files. (Degrades performance!)Run in batch mode.-ascii-bConvert a binary .raw file to Fast Access FormatConvert a schematic to a netlistPrevent use of WINE(Linux) workaroundsConvert a schematic to a PCB netlistStore user preferences in the registryStart simulating the schematic on openAllow MOSFET’s to have up to 7 nodes in subcircuitExecutes one step of the uninstallation processForce use of WINE(Linux) egistry-Run-uninstall-wine-SOIEncrypt a model library-encrypt-big or -max Start as a maximized windowShort DescriptionFlagCommand Line SwitchesCtrl Y – Vertical AutorangeAtl Click – PowerCtrl A – Add TraceCtrl E – Zoom ExtentsSpace – Zoom FitCtrl B – Zoom BackCtrl Z – Zoom AreaShift F9 – RedoShift F9 – RedoF7 – MoveF7 – MoveF9 – UndoF6 – DuplicateF6 – Duplicate1e-9FALSE 01.602176462e-191.3806503e-23TRUE 2354Mil 25.4e-6MK1e3nu1e9GMeg 1e6PiE1e-121e-15fp1e12ConstantsWrite Selected Nodes to a .WAV fileDo a Nonlinear Transient AnalysisFind the DC Small-Signal Transfer FunctionTemperature SweepsDefine a SubcircuitParameter SweepsSave Operating Point to DiskLimit the Quantity of Saved DataUser-Defined ParametersSet Simulator OptionsFind the DC Operating PointPerform a Noise AnalysisSupply Hints for Initial DC SolutionCompute Network Parameters in a .AC AnalysisDefine a SPICE ModelEvaluate User-Defined Electrical QuantitiesLoad a Previously Solved DC SolutionInclude a LibraryInclude another FileSet Initial ConditionsDeclare Global NodesDownload a File Given the URLUser Defined FunctionsCompute a Fourier ComponentEnd of Subcircuit DefinitionEnd of NetlistPerform a DC Source Sweep AnalysisAnnotate Subcircuit Pin Names on Port CurrentsPerform a Small Signal AC ET.FUNC.FOUR.ENDS.END.BACKANNO.AC.DCF9 – UndoNetlistF5 – DeleteF5 – DeleteWaveformSimulator Directives – Dot CommandsCommandShort DescriptionF5 – DeleteESC – Exit ModeSymbolLTspice HotKeysF3 – Draw WireESC – Exit ModeSchematic 2018 Analog Devices, Inc. All rights reserved. Trademarks andregistered trademarks are the property of their respective owners.Ahead of What’s Possible is a trademark of Analog Devices.LTspice-6/18(E)Pl a ce
LTSPICE SHORTCUTS ON A MAC11/5/2013 REV 3abglstwDRAW CIRCLEBUS TERMINATIONGROUNDDRAW LINEADD SPICE DIRECTIVE (right click for HELP ME EDIT)ADD TEXT COMMENTDRAW BOXz z z z z z z HLNOQSZ z Zz M z Mz W z Wz P z PHIDE LTSPICESPICE LOGNEW SCHEMATICOPENQUIT LTSPICESAVEUNDOREDOMINIMIZEMINIMIZE ALLCLOSECLOSE ALLPRINTpage seuptF2F3F4F5F6F7F8F9COMPONENTWIRENET NAMEDELETEDUPLICATEMOVE (CNTRL-R to rotate, CNTRL-E to mirror)DRAG (CNTRL-R to rotate, CNTRL-E to mirror)UNDOREDO F9SPACE BAR2 FINGER PINCH2 FINGER SPREADZOOM TO FITZOOM INZOOM OUTHere are the modifier key symbols you may see in OS X menus:z COMMANDALT OR OPTIONSHIFT
Introduction to LTspice Acknowledgment: LTspice material based in part by Devon Rosner (6.101 TA 2014), Engineer, Linear Technology . WINE(Linux) workarounds-PCBnetlist Convert a schem a tic to a PCB
Rochester Institute of Technology Microelectronic Engineering ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Introduction to LTSPICE Dr. Lynn Fuller Electrical and Microelectronic Engineering Rochester Institute of Technology 82 Lomb Memorial Drive Roche
MOSFET Logic Revised: March 22, 2020 ECE2274 Pre-Lab for MOSFET logic LTspice NAND Logic Gate, NOR Logic Gate, and CMOS Inverter Include CRN # and schematics. 1. NMOS NMOSNAND Logic Gate Use Vdd 10Vdc. For the NMOS NAND LOGIC GATE shown below, use the 2N7000 MOSFET LTspice model that has a gate to source voltage Vgs threshold of 2V (Vto 2.0).File Size: 586KB
will use a Spice directive to add a K-Statement (“K Lp Ls 1 “) to this circuit. Click on and add “K Lp Ls 1 “. This will tell LTSpice that Lp is primary and Ls is secondary of the transformer. The last number is called mutual coupling coefficient and can be between 0 and 1. 1 means
13. Project 9: Echos on Transmission Lines 81 13.1. Transmission Lines -- only two Wires? 81 13.2. Echoes 83 3. Simulation of the Example with LTspice 85 13. 13.4. Open or Short Circuit at Cable’
How do we work together ? 1st day :Presentation of the software and its possibilitys From 2 nd to 8 th day : – First step with Ltspice –.OP, .DC, .TRAN and .AC simulation –,STEP, .PARM and .MEAS add tools For all simulations – First we perform simulation together – Second you try yourself on exercises
Getting Started using SwitcherCAD III/LTspice Use one of the 100s of demo circuits available on linear.com Reviewed by Linear Technology's Factory Applications Group Use a pre-drafted test fixture (JIG) Provides a good starting point Use the schematic editor to create your own design
PowerBook 145B/80 B1433 MIT 1370 PowerBook Duo 230/ 120 B1432 MIT 2480 ThinkPad 720/160 9552-308 MIT 3245 ThinkPad 720C/160 9552-30J MIT 4540 DeskJet 500 HP-C2106A MIT 370 LaserJet lIP Plus HP-C2007A MIT 790 Value Bundle 4MB RAM/120MB hard disk MIT 1215 Value Bundle
Adopted by the Council of The American Society of Mechanical Engineers, 1914; latest edition 2019. The American Society of Mechanical Engineers Two Park Avenue, New York, NY 10016-5990