Tutorial II: Cadence Virtuoso - Gatech.edu
Tutorial II: Cadence VirtuosoECE6133: Physical Design Automation of VLSI SystemsGeorgia Institute of TechnologyProf. Sung Kyu LimLast Updated: 2/24/2021I. Setup for Cadence Virtuoso1. Copy the following files into your working directorycds.libdisplay.drflib.defs.cdsinit (Make sure that the file name is ".cdsinit". If you copy this file from awindows machine, the file name will be "cdsinit".)calibreDRC.rulmyDesign.tar.gzYou will also need the “test.gds2” file you generated during Innovus lab2. Type the following commands to source the designated filessource /tools/cadence/ic617hf823/cshrc.RH7source /tools/mentor/calibre/aoi2019/meta137.cshrc3. Open cds.lib and replace 'your working directory' by your working directory as follows. (Typethe FULL directory name. Leave “myDesign” untouched at the end.)DEFINE myDesign /your working directory/myDesign4. Open lib.defs and replace 'your working directory' by your working directory as follows. (Typethe FULL directory name. Leave “myDesign” untouched at the end.)DEFINE myDesign /your working directory/myDesign5. Uncompress myDesign.tar.gz in your working directory.tar -xzf myDesign.tar.gz6.Run Cadence Virtuoso by typing 'virtuoso'.
II. Generation of Final Layouts1. After you have typed ‘virtuoso’, the Virtuoso window will appear as follows.2. Choose 'File' - 'Import' - 'Stream.', then 'Virtuoso(R) XStream In' window will appear asfollows.3. Choose GDS2 file in ‘Stream File’ (test.gds2 from Innovus lab)4. Choose myDesign in ‘Library’5. Choose your design name in 'Top Level Cell'. The design name is what you typed in ‘GDSStructure Name’ in Innovus. (In Innovus lab, it was “test”)6. The window should look as follows
7. Click 'Translate'. There must not be any error during translation. If you meet warningmessages, you can just click ‘No’. (you should have only 1 warning, no error)8. Choose ‘Tools’ - ‘Library Manager ’ in Virtuoso main window which will open the LibraryManager window as follows.9. Choose ‘myDesign’ in Library column.10. Choose your design in Cell column.11. Double-click ‘layout’ in View column.12. You may get messages regarding the unavailability of license. Just click on “Yes”
13. Then a layout window will be shown as follows. Maximize and click zoom-to-fit to get abetter clarity.14. The current window shows standard cells and routed metals but you cannot see the details ofstandard cells. These abstract cells are called standard cell instances. To get a final layout, weneed to load standard cells and replace standard cell instances by standard cell layouts. This iscalled 'flattening'.a. To do this, choose ‘Edit’ - ‘Select’ - ‘Select All’b. Then choose ‘Edit’ - ‘Hierarchy’ - ‘Flatten ’ and click ‘OK’ in ‘Flatten’ windowwith the default settings. Clicking the empty space in design will cancel the selection.15. Choose 'File' - 'Save' to save your flattened design.16. Compare this layout with your encounter layout. Do those look similar?17. To Capture Screenshots: Choose 'File' - 'Export Image.' in the layout editor. Supportedformats are bmp, jpg, png, and so on.
18. How to View Specific Metal Layers and Via:a. On the left of your screen, there is ‘Layers’ tab. In here you can control visibility of eachlayers.i. If you click 'NV', only the selected layer will be shownii. If you click 'AV', all layers will be showniii. Click a specific layer with your center mouse button. This will toggle thevisibility of the layeriv. After you toggle visibilities, you have to re-draw the layout to apply the changedvisibilities. (Choose 'View' - 'Redraw', or click 'Zoom to Fit' button in thetoolbar)v. Choose 'Tools' - 'Display Resource Manager' in the main Virtuoso window.When 'Display Resource Tool Box’ appears, click Edit, and Display ResourceEditor window appears. Choose any metal layer, change 'Fill Color' and 'OutlineColor', and click 'Apply'. Redraw the layout to see if the new color was appliedwell.
b. Here is the metal layer mapping. You will need this in 'Lab Problem: Generation of finallayouts and DRC' section.i. L49 - metal 1ii. L51 - metal 2iii. L62 - metal 3iv. L31 - metal 4v. L33 - metal 5vi. L37 - metal 6vii. L39 - metal 7viii. L41 - metal 8ix. L43 - metal 9x. L45 - metal 10c. Actually each metal layer has two different names. For example, metal 1 layer hastwo names - 'metal 1' and 'L49'
III. Design Rule Checking (DRC)1. After flattening, choose 'Calibre' - 'Run nmDRC'. Click 'Cancel' in 'Load Runset File' window.Just click Cancel. The caliber window would then appear as follows:2. Click 'Rules' tab, and choose 'calibreDRC.rul' for DRC Rules File Field in the 'CalibreInteractive' box.
3. Click ‘Inputs’ tab. The window would be auto-filled as follows:4. Run DRC by clicking 'Run DRC' button.5. When DRC is finished, look at the following window to check the number of DRC violations6. A check box will be red if it has any DRC violation.7. Summary of DRC would be stored in *.drc.results and *.drc.summary in your working directory.
Feb 24, 2021 · Tutorial II: Cadence Virtuoso ECE6133: Physical Design Automation of VLSI Systems Georgia Institute of Technology . Prof. Sung Kyu Lim . Last Updated: 2/24/2021 . I. Setup for Cadence Virtuoso . 1. Copy the following files into your working directory cds.lib display.drf . lib.d
CADENCE SETUP This short tutorial shows how to configure Cadence to use the NCSU Cadence Design Kit (CDK) with access to the ON Semiconductor C5 0.5-µm and the TSMC 0.35-µm CMOS processes libraries. In LINUX Right button of mouse - Open Terminal Make cadence directory ece.gatech.edu mkdir ca
Cadence Design Systems provides tools for different design styles. In this tutorial you will learn to use three Cadence products: Composer Symbol, Composer Schematic and the Virtuoso Layout Editor. This tutorial will help you to get started with Cadence and successfully
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Cadence Virtuoso Logic Gates Tutorial rev: 2013 p. 4 . New Cell windows . Virtuoso Schematic Editing window . Add Components: With the 2x1AND cell schematic generated, you can now begin to design the AND gate using components in the ECE331 library. 6. In the Schematic Editing window, select Cr
2. Cadence has many keyboard shortcuts. When the tutorial writes a letter of a command in parentheses it means that letter is the short cut. Capitalization is significant. For example i is the shortcut for (i)nstantiate. Getting Help within Cadence Here are two ways to get help within the Cadence environment. 1. Click on Help within a Cadence .
This tutorial is an introduction to the Layout Editor available from the Cadence design tools and the CMOSIS5 design kit from the Canadian Microelectronics Corporation (CMC). This tutorial is based on the current version of Cadence (2004a). The CMOSIS5 des
CS /PSY 3750- SYLLABUS Fall 2016 1 Introduction to User Interface Design Instructor: Dr. Rosa Arriaga E-mail: arriaga@cc.gatech.edu Address: TSRB 236 Teaching Assistant: Todd Park (bpark31@gatech.edu) Laurel Warrell (lwarrell@gatech.edu) Amit Garg (agarg@gatech.edu ) Instructor office hour: MW 30 minutes before/afte
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