Intel Silicon Photonic 100G PSM4 QFSP28 Transceiver .

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REVERSE COSTING – STRUCTURE, PROCESS & COST REPORTIntel Silicon Photonic 100G PSM4QFSP28 TransceiverDeep analysis of the first silicon photonic die with Intel’s unique approach forlaser integration, the outcome of 15 years of development, along with the mainoptoelectronic components in the connector.In only a few years, Intel has become thenumber two supplier for silicon photonicsbased optical transceivers. Intel hassucceeded because it put a lot of effortinto the bottleneck, which was integratingthe laser chip through InP chiplet bondingfollowed by post processing. Intelintroduced a silicon photonics Quad SmallForm-factor Pluggable (QSFP) formattransceiver that supports 100G communications in 2016. The company nowships a million units of this product peryear into data centers. Intel’s 400Gproducts are expected to enter volumeproduction in the second half of 2019. AtECOC 2018, Intel announced new 100Gsilicon photonics transceivers targeted at5G wireless fronthaul applications. Allthese innovations have been enabled byIntel’s first generation 100G series siliconphotonics QSFP transceivers, featuringlaser-on-chip integration.Title: Intel SiliconPhotonic 100GPSM4 QFSP28Pages: 200Date: March 2019Format:PDF & Excel filePrice:EUR 3,990The transceiver contains two separateblocks, each with several dies. Thetransmitter integrates several InP lasersand a CMOS die chiplets through bondingon the main silicon die in flip-chipconfiguration. On the main silicon die aMach-Zehnder modulator encodessignals. Other components focus or isolatethe signals. Data are processed using afour-channel 25G optical Clock and DataR e co v e r y ( CD R ) co m p o n e nt fro mMACOM. The receiver function is performed by four germanium (Ge) photodiode dies and a TransImpedance Amplifier (TIA) circuit. The Ge photo-diodesare manufactured on a dedicated Siliconon-Insulator substrate. A fiber-opticalcoupler with focusing lens connects thephotodiode die with the fiber optic.All of these components – described inthis report – show Intel’s potential interms of packaging and photonics. In avery small form factor, Intel manages tointegrate four lasers, a photonic driver,optical modules, CDR functionality, highperformance photodiodes, two advancedsubstrates and materials for optics. Thisreport will show how the companyimplements the chiplet configuration, andprovides a detailed description of thetransmitter and receiver line.This report is exhaustive analysis of themain components of the Intel 100G PSM4connector, including a full analysis of thesilicon photonic die, the TIA circuit, theMach-Zehnder driver circuit, the MACOMcircuit and the germanium photodiodealong with a cost analysis and priceestimate. It also describes the two fiberoptic couplers, focusing lens and theisolator and estimates their price. We alsocompare the product against Luxtera’ssilicon photonic circuit.COMPLETE TEARDOWN WITH Detailed photos Precise measurements Materials analysis Manufacturing process flow Supply chain evaluation Manufacturing cost analysis Comparison Didactic explanation of deviceoperation Estimated sales priceIC – LED – RF – MEMS – IMAGING – PACKAGING – SYSTEM – POWER - DISPLAY

INTEL SILICON PHOTONIC 100G PSM4 QFSP28 TRANSCEIVERTABLE OF CONTENTSOverview/IntroductionIntel Company ProfilePhysical Analysis Physical Analysis Methodology PSM4 Connector Teardown Transmitter Block View, dimensions, light path, crosssection MZI Driver Die Silicon Photonic Die Die overview and dimensions InP laser process and cross-section MZI process and cross-section Mirror process and cross-section Waveguide process and cross-section Die process characteristic Receiver Block View, dimensions, light path, crosssection Germanium Photodiode Die view and dimensions, process andcross-section TIA Die MACOM MG37049G DieComparison Intel – Luxtera Silicon Photonics DiesManufacturing Process Flow MZI Driver Die Front-End Process andFabrication Unit Silicon Photonic Die Process Flow Silicon Photonic Die Front-End FabricationUnit Receiver Fiber Optic coupler, Process Flowand Cost Germanium Photodiode Die Process Flowand Fabrication Unit TIA Die Front-End Process and FabricationUnit MACOM M37049G Die Front-End Processand Fabrication UnitCost Analysis Summary of the Cost Analysis Yields Explanation and Hypotheses Transmitter Block Silicon photonic die Wafer dost Step cost Die cost MZI driver die MACOM M37049G Optical elements Assembly Receiver Block Germanium photodiode die TIA die MACOM M37049G Optical element AssemblyEstimated Price Analysis: Transmitter Block andReceiver BlockAUTHORSSylvain Hallereau is in charge ofcosting analyses for IC, power andMEMS. He has more than 10 years ofexperienceinpowerdevicemanufacturing cost analysis and hasstudied a wide range of technologies.Nicolas Radufe is in charge of physicalanalysis at System Plus Consulting. Hehas a deep knowledge in chemical andphysical analyses. He previouslyworked in microelectronics R&D forCEA/LETI in Grenoble and forSTMicroelectronics in Crolles.RELATED REPORTSMobile Camera ModuleComparison 2019Physical analysis and costcomparison of seven leadingflagship smartphone cameras:Apple iPhone X/XS/XR, SamsungGalaxy S9, Huawei Mate 20 Proand P20 Pro January 2019 - EUR 6,490*Mantis Vision’s 3D Depth SensingSystem in the Xiaomi Mi8 ExplorerEditionThe first introduction of MantisVision’s technology into a mobileapplication, featuring codedstructured light.December 2018 - EUR 3,990*MOLEX – Luxtera Silicon PhotonicDieThe 1064101003 Quad SmallForm-factorPluggablePlusconnector from Molex integratesthis photonic circuit fromLuxtera.November 2012 - EUR 2,990*

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INTEL SILICON PHOTONIC 100G PSM4 QFSP28 TRANSCEIVERREVERSE COSTING – STRUCTURE, PROCESS & COST REPORTORDER FORMPlease process my order for “Intel Silicon Photonic 100G PSM4 QFSP28Transceiver” Reverse Costing – Structure, Process & Cost ReportRef: SP19407 Full Structure, Process & Cost Report :EUR 3,990* Annual Subscription offers possible from 3 reports, including thisreport as the first of the year. Contact us for more information.Return order by:FAX: 33 2 53 55 10 59MAIL: SYSTEM PLUS CONSULTING22, bd Benoni GoullinNantes Biotech44200 Nantes – FranceEMAIL: sales@systemplus.frSHIP TOName (Mr/Ms/Dr/Pr): .Job Title: .Company: .Address: .City: State: .Postcode/Zip: .Country: .VAT ID Number for EU members: .Tel: .Email: .Date: .Signature: .BILLING CONTACTFirst Name : .Last Name: .Email: .Phone: .PAYMENTBy credit card:Number: Expiration date: / Card Verification Value: By bank transfer:HSBC - CAE- Le Terminal -2 rue du Charron - 44800 St Herblain FranceBIC code: CCFRFRPP In EURBank code : 30056 - Branch code : 00955 - Account :09550003234IBAN: FR76 3005 6009 5509 5500 0323 439 In USDBank code : 30056 - Branch code : 00955 - Account :09550003247IBAN: FR76 3005 6009 5509 5500 0324 797*For price in dollars please use the day’sexchange rate*All reports are delivered electronically inpdf format*For French customer, add 20 % for VAT*Our prices are subject to change. Pleasecheck our new releases and pricechanges on www.systemplus.fr. Thepresent document is valid 6 months afterits publishing date: March 2019ANNUAL SUBSCRIPTIONSEach year System Plus Consultingreleases a comprehensive collectionof new reverse engineering andcosting analyses in various domains.You can choose to buy over 12months a set of 3, 4, 5, 7, 10 or 15Reverse Costing reports.Up to 47% discount!More than 60 reports released eachyear on the following topics(considered for 2018): MEMS & Sensors: Accelerometer– Environment - Fingerprint - Gas- Gyroscope - IMU/Combo Microphone - Optics - Oscillator Pressure Power: GaN - IGBT - MOSFET - SiDiode - SiC Imaging: Camera - Spectrometer LED and Laser: UV LED – VCSEL White/blue LED Packaging: 3D Packaging Embedded - SIP - WLP Integrated Circuits: IPD –Memories – PMIC - SoC RF: FEM - Duplexer Systems: Automotive - Consumer- Energy - Telecom

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Intel’sfirst generation 100G series silicon photonics QSFP transceivers, featuring laser-on-chip integration. The transceiver contains two separate blocks, each with several dies. The transmitter integrates several InP lasers and a CMOS die chiplets through bonding on the main silicon die in flip-chip configuration. On the main silicon die a

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