PSoC Mixed-Signal Array Final Data Sheet

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PSoC Mixed-Signal ArrayFinal Data SheetCY8C27143, CY8C27243,CY8C27443, CY8C27543, and CY8C27643Features Powerful Harvard Architecture Processor M8C Processor Speeds to 24 MHz 8x8 Multiply, 32-Bit Accumulate Low Power at High Speed 3.0 to 5.25V Operating Voltage Operating Voltages Down to 1.0V Using OnChip Switch Mode Pump (SMP) Industrial Temperature Range: -40 C to 85 C Advanced Peripherals (PSoC Blocks) 12 Rail-to-Rail Analog PSoC Blocks Provide:- Up to 14-Bit ADCs- Up to 9-Bit DACs- Programmable Gain Amplifiers- Programmable Filters and Comparators 8 Digital PSoC Blocks Provide:- 8- to 32-Bit Timers, Counters, and PWMs- CRC and PRS Modules- Up to 2 Full-Duplex UARTs- Multiple SPI Masters or Slaves- Connectable to all GPIO Pins Complex Peripherals by Combining BlocksPort 5Port 4 Port 3Port 2 Precision, Programmable Clocking Internal 2.5% 24/48 MHz Oscillator 24/48 MHz with Optional 32 kHz Crystal Optional External Oscillator, up to 24 MHz Internal Oscillator for Watchdog and Sleep Flexible On-Chip Memory 16K Flash Program Storage 50,000 Erase/Write Cycles 256 Bytes SRAM Data Storage In-System Serial Programming (ISSP) Partial Flash Updates Flexible Protection Modes EEPROM Emulation in Flash Programmable Pin Configurations 25 mA Sink on all GPIO Pull up, Pull down, High Z, Strong, or OpenDrain Drive Modes on all GPIO Up to 12 Analog Inputs on GPIO Four 30 mA Analog Outputs on GPIO Configurable Interrupt on all GPIOPort 1Port 0System BusSRAM256 BytesGlobal Analog InterconnectSROMFlash 16KCPUCore (M8C)InterruptControllerSleep andWatchdogMultiple Clock Sources(Includes IMO, ILO, PLL, and ECO)DIGITAL lockArrayPOR and LVDDecimatorI 2CSystem ResetsSYSTEM RESOURCESAugust 5, 2008AnalogInputMuxingInternalVoltageRef. Complete Development Tools Free Development Software(PSoC Designer ) Full-Featured, In-Circuit Emulator andProgrammer Full Speed Emulation Complex Breakpoint Structure 128K Trace MemoryThe PSoC family consists of many Mixed-Signal Array withOn-Chip Controller devices. These devices are designed toreplace multiple traditional MCU-based system componentswith one, low cost single-chip programmable device. PSoCdevices include configurable blocks of analog and digital logic,as well as programmable interconnects. This architectureallows the user to create customized peripheral configurationsthat match the requirements of each individual application.Additionally, a fast CPU, Flash program memory, SRAM datamemory, and configurable IO are included in a range of convenient pinouts and packages.The PSoC architecture, as illustrated on the left, is comprised offour main areas: PSoC Core, Digital System, Analog System,and System Resources. Configurable global busing allows allthe device resources to be combined into a complete customsystem. The PSoC CY8C27x43 family can have up to five IOports that connect to the global digital and analog interconnects,providing access to 8 digital blocks and 12 analog blocks.ANALOG SYSTEMDigitalBlockArray I2C Slave, Master, and Multi-Master to400 kHz Watchdog and Sleep Timers User-Configurable Low Voltage Detection Integrated Supervisory Circuit On-Chip Precision Voltage ReferencePSoC Functional OverviewAnalogDriversPSoCCOREGlobal Digital Interconnect Additional System ResourcesThe PSoC CoreSwitchModePumpThe PSoC Core is a powerful engine that supports a rich feature set. The core includes a CPU, memory, clocks, and configurable GPIO (General Purpose IO).The M8C CPU core is a powerful processor with speeds up to24 MHz, providing a four MIPS 8-bit Harvard architecture micro- Cypress Semiconductor Corp. 2002 - 2008 — Document No. 38-12012 Rev. *L1[ ] Feedback

CY8C27x43 Final Data SheetPSoC Overviewprocessor. The CPU utilizes an interrupt controller with 17 vectors, to simplify programming of real time embedded events.Program execution is timed and protected using the includedSleep and Watch Dog Timers (WDT).Memory encompasses 16K of Flash for program storage, 256bytes of SRAM for data storage, and up to 2K of EEPROMemulated using the Flash. Program Flash utilizes four protection levels on blocks of 64 bytes, allowing customized softwareIP protection.The PSoC device incorporates flexible internal clock generators, including a 24 MHz IMO (internal main oscillator) accurateto 2.5% over temperature and voltage. The 24 MHz IMO canalso be doubled to 48 MHz for use by the digital system. A lowpower 32 kHz ILO (internal low speed oscillator) is provided forthe Sleep timer and WDT. If crystal accuracy is desired, theECO (32.768 kHz external crystal oscillator) is available for useas a Real Time Clock (RTC) and can optionally generate a crystal-accurate 24 MHz system clock using a PLL. The clocks,together with programmable clock dividers (as a SystemResource), provide the flexibility to integrate almost any timingrequirement into the PSoC device.PSoC GPIOs provide connection to the CPU, digital and analogresources of the device. Each pin’s drive mode may be selectedfrom eight options, allowing great flexibility in external interfacing. Every pin also has the capability to generate a system interrupt on high level, low level, and change from last read.The Digital SystemThe Digital System is composed of 8 digital PSoC blocks. Eachblock is an 8-bit resource that can be used alone or combinedwith other blocks to form 8, 16, 24, and 32-bit peripherals, whichare called user module references. PWMs with Dead band (8 to 32 bit) Counters (8 to 32 bit) Timers (8 to 32 bit) UART 8 bit with selectable parity (up to 2) SPI slave and master (up to 2) I2C slave and multi-master (1 available as a SystemResource) Cyclical Redundancy Checker/Generator (8 to 32 bit) IrDA (up to 2) Pseudo Random Sequence Generators (8 to 32 bit)The digital blocks can be connected to any GPIO through aseries of global buses that can route any signal to any pin. Thebuses also allow for signal multiplexing and for performing logicoperations. This configurability frees your designs from the constraints of a fixed peripheral controller.Digital blocks are provided in rows of four, where the number ofblocks varies by PSoC device family. This allows you the optimum choice of system resources for your application. Familyresources are shown in the table titled “PSoC Device Characteristics” on page 3.The Analog SystemThe Analog System is composed of 12 configurable blocks,each comprised of an opamp circuit allowing the creation ofcomplex analog signal flows. Analog peripherals are very flexible and can be customized to support specific applicationrequirements. Some of the more common PSoC analog functions (most available as user modules) are listed below.Analog-to-digital converters (up to 4, with 6- to 14-bit resolution, selectable as Incremental, Delta Sigma, and SAR) Filters (2, 4, 6, and 8 pole band-pass, low-pass, and notch) Amplifiers (up to 4, with selectable gain to 48x) Instrumentation amplifiers (up to 2, with selectable gain to93x)DIGITAL SYSTEM Comparators (up to 4, with 16 selectable thresholds)Digital PSoC Block Array DACs (up to 4, with 6- to 9-bit resolution) Multiplying DACs (up to 4, with 6- to 9-bit resolution) High current output drivers (four with 30 mA drive as a CoreResource) 1.3V reference (as a System Resource) DTMF Dialer Modulators Correlators Peak detectors Many other topologies possiblePort 3Port 4Port 1Port 2Port 0To System BusDigital ClocksFromCoreRow 0DBB00DBB01DCB02ToAnalogSystem4Row OutputConfigurationRow InputConfigurationPWMs (8 to 32 bit) Port 5DCB034888Row 1DBB10DBB11DCB1284Row OutputConfigurationRow InputConfigurationDigital peripheral configurations include those listed below. DCB134GIE[7:0]GIO[7:0]Global DigitalInterconnectGOE[7:0]GOO[7:0]Digital System Block DiagramAugust 5, 2008Document No. 38-12012 Rev. *L2[ ] Feedback

CY8C27x43 Final Data SheetPSoC OverviewAnalog blocks are provided in columns of three, which includesone CT (Continuous Time) and two SC (Switched Capacitor)blocks, as shown in the figure below.P0[6]P0[5]P0[4]P0[3]P0[2]P0[1]P0[0]AGNDIn RefInP0[7]P2[3]P2[1]P2[6]P2[4]Additional System ResourcesSystem Resources, some of which have been previously listed,provide additional capability useful to complete systems. Additional resources include a multiplier, decimator, switch modepump, low voltage detection, and power on reset. Statementsdescribing the merits of each system resource are below. Digital clock dividers provide three customizable clock frequencies for use in applications. The clocks can be routed toboth the digital and analog systems. Additional clocks can begenerated using digital PSoC blocks as clock dividers. Multiply accumulate (MAC) provides fast 8-bit multiplier with32-bit accumulate, to assist in general math and digital filters. The decimator provides a custom hardware filter for digitalsignal processing applications including the creation of DeltaSigma ADCs. The I2C module provides 100 and 400 kHz communicationover two wires. Slave, master, and multi-master modes areall supported. Low Voltage Detection (LVD) interrupts can signal the application of falling voltage levels, while the advanced POR(Power On Reset) circuit eliminates the need for a systemsupervisor. An internal 1.3V reference provides an absolute reference forthe analog system, including ADCs and DACs. An integrated switch mode pump (SMP) generates normaloperating voltages from a single 1.2V battery cell, providing alow cost boost converter.P2[2]P2[0]Array Input lock ArrayACB00ACB01ACB02ACB03PSoC Device ASC23Depending on your PSoC device characteristics, the digital andanalog systems can have 16, 8, or 4 digital blocks and 12, 6, or4 analog blocks. The following table lists the resourcesavailable for specific PSoC device groups.The PSoC devicecovered by this data sheet is highlighted below.Analog DDigitalIOInterface toDigital SystemPSoC Device CharacteristicsCY8C29x66up to644161244122K32KCY8C27x43up 24x23up to241412226256Bytes4KCY8C24x23Aup to241412226256Bytes4KCY8C21x34up CY8C20x34up to280028003b512Bytes8KPSoC PartNumberM8C Interface (Address Bus, Data Bus, Etc.)Analog System Block Diagrama. Limited analog functionality.b. Two analog blocks and one CapSense.August 5, 2008Document No. 38-12012 Rev. *L3[ ] Feedback

CY8C27x43 Final Data SheetPSoC OverviewGetting StartedDevelopment ToolsThe quickest path to understanding the PSoC silicon is by reading this data sheet and using the PSoC Designer IntegratedDevelopment Environment (IDE). This data sheet is an overview of the PSoC integrated circuit and presents specific pin,register, and electrical specifications. For in-depth information,along with detailed programming information, reference thePSoC Mixed-Signal Array Technical Reference Manual.PSoC Designer is a Microsoft Windows-based, integrateddevelopment environment for the Programmable System-onChip (PSoC) devices. The PSoC Designer IDE and applicationruns on Windows NT 4.0, Windows 2000, Windows Millennium(Me), or Windows XP. (Reference the PSoC Designer Functional Flow diagram below.)Development KitsDevelopment Kits are available from the following distributors:Digi-Key, Avnet, Arrow, and Future. The Cypress Online Storecontains development kits, C compilers, and all accessories forPSoC development. Go to the Cypress Online Store web site athttp://www.cypress.com, click the Online Store shopping carticon at the bottom of the web page, and click PSoC (Programmable System-on-Chip) to view a current list of available items.PSoC Designer helps the customer to select an operating configuration for the PSoC, write application code that uses thePSoC, and debug the application. This system provides designdatabase management by project, an integrated debugger withIn-Circuit Emulator, in-system programming support, and theCYASM macro assembler for the CPUs.PSoC Designer also supports a high-level C language compilerdeveloped specifically for the devices in the tified PSoC Consultants offer everything from technicalassistance to completed PSoC designs. To contact or become aPSoC Consultant go to http://www.cypress.com, click on DesignSupport located on the left side of the web page, and selectCYPros Consultants.ResultsTechnical TrainingFree PSoC technical training is available for beginners and istaught by a marketing or application engineer over the phone.PSoC training classes cover designing, debugging, advancedanalog, as well as application-specific classes covering topicssuch as PSoC and the LIN bus. Go to http://www.cypress.com,click on Design Support located on the left side of the webpage, and select Technical Training for more details.ContextSensitiveHelpGraphical DesignerInterfacePSoCDesignerCommandsFor up-to-date Ordering, Packaging, and Electrical Specificationinformation, reference the latest PSoC device data sheets onthe web at ulesLibraryTechnical SupportPSoC application engineers take pride in fast and accurateresponse. They can be reached with a 4-hour guaranteedresponse at PodApplication NotesIn-CircuitEmulatorDeviceProgrammerPSoC Designer SubsystemsA long list of application notes will assist you in every aspect ofyour design effort. To view the PSoC application notes, go tothe http://www.cypress.com web site and select ApplicationNotes under the Design Resources list located in the center ofthe web page. Application Notes are sorted by date by default.August 5, 2008Document No. 38-12012 Rev. *L4[ ] Feedback

CY8C27x43 Final Data SheetPSoC OverviewPSoC Designer Software SubsystemsDevice EditorDebuggerThe Device Editor subsystem allows the user to select differentonboard analog and digital components called user modulesusing the PSoC blocks. Examples of user modules are ADCs,DACs, Amplifiers, and Filters.The PSoC Designer Debugger subsystem provides hardwarein-circuit emulation, allowing the designer to test the program ina physical system while providing an internal view of the PSoCdevice. Debugger commands allow the designer to read andprogram and read and write data memory, read and write IOregisters, read and write CPU registers, set and clear breakpoints, and provide program run, halt, and step control. Thedebugger also allows the designer to create a trace buffer ofregisters and memory locations of interest.The device editor also supports easy development of multipleconfigurations and dynamic reconfiguration. Dynamic configuration allows for changing configurations at run time.PSoC Designer sets up power-on initialization tables forselected PSoC block configurations and creates source codefor an application framework. The framework contains softwareto operate the selected components and, if the project usesmore than one operating configuration, contains routines toswitch between different sets of PSoC block configurations atrun time. PSoC Designer can print out a configuration sheet fora given project configuration for use during application programming in conjunction with the Device Data Sheet. Once theframework is generated, the user can add application-specificcode to flesh out the framework. It’s also possible to change theselected components and regenerate the framework.Online Help SystemThe online help system displays online, context-sensitive helpfor the user. Designed for procedural and quick reference, eachfunctional subsystem has its own context-sensitive help. Thissystem also provides tutorials and links to FAQs and an OnlineSupport Forum to aid the designer in getting started.Hardware ToolsIn-Circuit EmulatorDesign BrowserThe Design Browser allows users to select and import preconfigured designs into the user’s project. Users can easily browsea catalog of preconfigured designs to facilitate time-to-design.Examples provided in the tools include a 300-baud modem, LINBus master and slave, fan controller, and magnetic card reader.Application EditorIn the Application Editor you can edit your C language andAssembly language source code. You can also assemble, compile, link, and build.A low cost, high functionality ICE (In-Circuit Emulator) is available for development support. This hardware has the capabilityto program single devices.The emulator consists of a base unit that connects to the PC byway of the parallel or USB port. The base unit is universal andwill operate with all PSoC devices. Emulation pods for eachdevice family are available separately. The emulation pod takesthe place of the PSoC device in the target board and performsfull speed (24 MHz) operation.Assembler. The macro assembler allows the assembly codeto be merged seamlessly with C code. The link libraries automatically use absolute addressing or can be compiled in relativemode, and linked with other software modules to get absoluteaddressing.C Language Compiler. A C language compiler is availablethat supports Cypress MicroSystems’ PSoC family devices.Even if you have never worked in the C language before, theproduct quickly allows you to create complete C programs forthe PSoC family devices.The embedded, optimizing C compiler provides all the featuresof C tailored to the PSoC architecture. It comes complete withembedded libraries providing port and bus operations, standardkeypad and display support, and extended math functionality.August 5, 2008Document No. 38-12012 Rev. *L5[ ] Feedback

CY8C27x43 Final Data SheetPSoC OverviewDesigning with User ModulesThe development process for the PSoC device differs from thatof a traditional fixed function microprocessor. The configurableanalog and digital hardware blocks give the PSoC architecturea unique flexibility that pays dividends in managing specificationchange during development and by lowering inventory costs.These configurable resources, called PSoC Blocks, have theability to implement a wide variety of user-selectable functions.Each block has several registers that determine its function andconnectivity to other blocks, multiplexers, buses, and to the IOpins. Iterative development cycles permit you to adapt the hardware as well as the software. This substantially lowers the riskthat you will have to select a different part to meet the finaldesign requirements.Device EditorUserModuleSelectionThe API functions are documented in user module data sheetsthat are viewed directly in the PSoC Designer IDE. These datasheets explain the internal operation of the user module andprovide performance specifications. Each data sheet describesthe use of each user module parameter and documents the setting of each register controlled by the user module.The development process starts when you open a new projectand bring up the Device Editor, a graphical user interface (GUI)for configuring the hardware. You pick the user modules youneed for your project and map them onto the PSoC blocks withpoint-and-click simplicity. Next, you build signal chains by interconnecting user modules to each other and the IO pins. At thisstage, you also configure the clock source connections andenter parameter values directly or by selecting values fromdrop-down menus. When you are ready to test the hardwareconfiguration or move on to developing code for the project, youperform the “Generate Application” step. This causes PSoCDesigner to generate source code that automatically configuresthe device to your specification and provides the high-level usermodule API functions.August 5, ion EditorTo speed the development process, the PSoC Designer Integrated Development Environment (IDE) provides a library ofpre-built, pre-tested hardware peripheral functions, called “UserModules.” User modules make selecting and implementingperipheral devices simple, and come in analog, digital, andmixed signal varieties. The standard User Module library contains over 50 common peripherals such as ADCs, DACs Timers, Counters, UARTs, and other not-so common peripheralssuch as DTMF Generators and Bi-Quad analog filter sections.Each user module establishes the basic register settings thatimplement the selected function. It also provides parametersthat allow you to tailor its precise configuration to your particularapplication. For example, a Pulse Width Modulator User Module configures one or more digital PSoC blocks, one for each 8bits of resolution. The user module parameters permit you toestablish the pulse width and duty cycle. User modules alsoprovide tested software to cut your development time. The usermodule application programming interface (API) provides highlevel functions to control and respond to hardware events atrun-time. The API also provides optional interrupt service routines that you can adapt as aceto ICEStorageInspectorEvent &BreakpointManagerUser Module and Source Code Development FlowsThe next step is to write your main program, and any sub-routines using PSoC Designer’s Application Editor subsystem.The Application Editor includes a Project Manager that allowsyou to open the project source code files (including all generated code files) from a hierarchal view. The source code editorprovides syntax coloring and advanced edit features for both Cand assembly language. File search capabilities include simplestring searches and recursive “grep-style” patterns. A singlemouse click invokes the Build Manager. It employs a professional-strength “makefile” system to automatically analyze allfile dependencies and run the compiler and assembler as necessary. Project-level options control optimization strategiesused by the compiler and linker. Syntax errors are displayed ina console window. Double clicking the error message takes youdirectly to the offending line of source code. When all is correct,the linker builds a HEX file image suitable for programming.The last step in the development process takes place inside thePSoC Designer’s Debugger subsystem. The Debugger downloads the HEX image to the In-Circuit Emulator (ICE) where itruns at full speed. Debugger capabilities rival those of systemscosting many times more. In addition to traditional single-step,run-to-breakpoint and watch-variable features, the Debuggerprovides a large trace buffer and allows you define complexbreakpoint events that include monitoring address and data busvalues, memory locations and external signals.Document No. 38-12012 Rev. *L6[ ] Feedback

CY8C27x43 Final Data SheetPSoC OverviewDocument ConventionsTable of ContentsAcronyms UsedFor an in depth discussion and more information on your PSoCdevice, obtain the PSoC Mixed-Signal Array Technical Reference Manual on http://www.cypress.com. This document isorganized into the following chapters and sections.The following table lists the acronyms that are used in this document.AcronymDescriptionACalternating currentADCanalog-to-digital converterAPIapplication programming interfaceCPUcentral processing unitCTcontinuous timeDACdigital-to-analog converterDCdirect currentECOexternal crystal oscillatorEEPROMelectrically erasable programmable read-only memoryFSRfull scale rangeGPIOgeneral purpose IOGUIgraphical user interfaceHBMhuman body modelICEin-circuit emulatorILOinternal low speed oscillatorIMOinternal main oscillatorIOinput/outputIPORimprecise power on resetLSbleast-significant bitLVDlow voltage detectMSbmost-significant bitPCprogram counterPLLphase-locked loopPORpower on resetPPORprecision power on resetPSoC Programmable System-on-Chip PWMpulse width modulatorSCswitched capacitorSLIMOslow IMOSMPswitch mode pumpSRAMstatic random access memory1.Pin Information . 81.1Pinouts . 81.1.18-Pin Part Pinout . 81.1.220-Pin Part Pinout . 91.1.328-Pin Part Pinout . 101.1.444-Pin Part Pinout . 111.1.548-Pin Part Pinouts . 121.1.656-Pin Part Pinout . 142.Register Reference . 162.1Register Conventions . 162.2Register Mapping Tables . 163.Electrical Specifications . 193.1Absolute Maximum Ratings . 203.2Operating Temperature . 203.3DC Electrical Characteristics . 213.3.1DC Chip-Level Specifications . 213.3.2DC General Purpose IO Specifications . 213.3.3DC Operational Amplifier Specifications . 223.3.4DC Low Power Comparator Specifications . 233.3.5DC Analog Output Buffer Specifications . 243.3.6DC Switch Mode Pump Specifications . 253.3.7DC Analog Reference Specifications . 263.3.8DC Analog PSoC Block Specifications . 283.3.9DC POR and LVD Specifications . 283.3.10 DC Programming Specifications . 293.4AC Electrical Characteristics . 303.4.1AC Chip-Level Specifications . 303.4.2AC General Purpose IO Specifications . 323.4.3AC Operational Amplifier Specifications . 333.4.4AC Low Power Comparator Specifications . 353.4.5AC Digital Block Specifications . 353.4.6AC Analog Output Buffer Specifications . 363.4.7AC External Clock Specifications . 373.4.8AC Programming Specifications . 373.4.9AC I2C Specifications . 384.Packaging Information . 394.1Packaging Dimensions . 394.2Thermal Impedances . 444.3Capacitance on Crystal Pins . 444.4Solder Reflow Peak Temperature . 445.Development Tool Selection . 455.1Software . 455.1.1PSoC Designer . 455.1.2PSoC Express . 455.1.3PSoC Programmer . 455.1.4CY3202-C iMAGEcraft C Compiler . 455.2Development Kits . 455.2.1CY3215-DK Basic Development Kit . 455.2.2CY3210-ExpressDK Development Kit . 465.3Evaluation Tools . 465.3.1CY3210-MiniProg1 . 465.3.2CY3210-PSoCEval1 . 465.3.3CY3214-PSoCEvalUSB . 465.4Device Programmers . 465.4.1CY3216 Modular Programmer . 465.4.2CY3207ISSP Serial Programmer (ISSP) . 465.5Accessories (Emulation and Programming) . 475.63rd-Party Tools . 475.7Build a PSoC Emulator into Your Board . 476.Ordering Information . 486.1Ordering Code Definitions . 497.Sales and Service Information . 507.1Revision History . 507.2Copyrights and Code Protection . 51Units of MeasureA units of measure table is located in the Electrical Specifications section. Table 3-1 on page 19 lists all the abbreviationsused to measure the PSoC devices.Numeric NamingHexadecimal numbers are represented with all letters in uppercase with an appended lowercase ‘h’ (for example, ‘14h’ or‘3Ah’). Hexadecimal numbers may also be represented by a ‘0x’prefix, the C coding convention. Binary numbers have anappended lowercase ‘b’ (e.g., 01010100b’ or ‘01000

August 5, 2008 Document No. 38-12012 Rev. *L 4 CY8C27x43 Final Data Sheet PSoC Overview Getting Started The quickest path to understanding the PSoC silicon is by read-ing this data sheet and using the PSoC Designer Integrated Development Environment (IDE). This data sheet is an over-view of the PS

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