L6208 - STMicroelectronics

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L6208DMOS driver for bipolar stepper motorDatasheet - production data Decoding logic for stepper motor full and halfstep drive Cross conduction protection Thermal shutdown Undervoltage lockout Integrated fast freewheeling diodesApplications3RZHU62 Bipolar stepper motorDescriptionThe L6208 device is a DMOS fully integratedstepper motor driver with non-dissipativeovercurrent protection, realized in BCDtechnology, which combines isolated DMOSpower transistors with CMOS and bipolar circuitson the same chip. The device includes all thecircuitry needed to drive a two phase bipolarstepper motor including: a dual DMOS full bridge,the constant off time PWM current controller thatperforms the chopping regulation and the phasesequence generator, that generates the steppingsequence. Available in PowerSO36 and SO24(20 2 2) packages, the L6208 device featuresa non-dissipative overcurrent protection on thehigh-side power MOSFETs and thermalshutdown.62 2UGHULQJ QXPEHUV/ 1 3RZHU',3 / 3' 3RZHU62 / ' 62 Features Operating supply voltage from 8 to 52 V 5.6 A output peak current (2.8 A RMS) RDS(ON) 0.3 typ. value at Tj 25 C Operating frequency up to 100 KHz Non-dissipative overcurrent protection Dual independent constant tOFF PWM currentcontrollers Fast/slow decay mode selection Fast decay quasi-synchronous rectificationOctober 2018This is information on a product in full production.DocID7514 Rev 31/34www.st.com

ContentsL6208Contents1Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125.1Power stages and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125.2Logic inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136PWM current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147Decay modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1889102/347.1Stepping sequence generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197.2Half step mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197.3Normal drive mode (full step two phase on) . . . . . . . . . . . . . . . . . . . . . . . 197.4Wave drive mode (full step one phase on) . . . . . . . . . . . . . . . . . . . . . . . . 197.5Non-dissipative overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . 217.6Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248.1Output current capability and IC power dissipation . . . . . . . . . . . . . . . . . 258.2Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 309.1PowerSO36 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 309.2SO24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33DocID7514 Rev 3

L6208Block diagram1Block diagramFigure 1. Block diagram9%2279%2279%2279&32&' 2&'%29(5 &855(17'(7(&7,21287 97 (50 /3527(&7,216(16( 3:0 /) )8//5(6(7287 9* 7(/2*,&(1&21752/&/2&.96 9%227& 5*(380367(33,1*6(48(1&(*(1(5 7,2121( 6 27021267 %/(&: &&:0 6.,1*7,0( 6(16(&203 5 725%5,'*( 92/7 *(5(*8/ 725 9 995() 5& 96%29(5 &855(17'(7(&7,21287 %287 %6(16(%* 7(/2*,&95()%%5,'*( %5&%' ,1 9 DocID7514 Rev 33/3434

Maximum ratings2L6208Maximum ratingsTable 1. Absolute maximum ratingsSymbolTest conditionsValueUnitVSA VSB VS60VVSA VSB VS 60 V;VSENSEA VSENSEB GND60VVSA VSB VSVS 10VInput and enable voltage range--0.3 to 7VVREFA,VREFBVoltage range at pins VREFA and VREFB--0.3 to 7VVRCA,VRCBVoltage range at pins RCA and RCB--0.3 to 7VVSENSEA,VSENSEBVoltage range at pins SENSEA and SENSEB--1 to 4VIS(peak)Pulsed supply current (for each VS pin),internally limited by the overcurrent protectionVSA VSB VS;tPULSE 1 ms7.1ARMS supply current (for each VS pin)VSA VSB VS2.8A--40 to 150 CVSVODVBOOTVIN, VENISTstg, TOPParameterSupply voltageDifferential voltage betweenVSA, OUT1A, OUT2A, SENSEA andVSB, OUT1B, OUT2B, SENSEBBootstrap peak voltageStorage and operating temperature rangeTable 2. Recommended operating conditionsSymbolVSVODVREFA,VREFBParameterSupply voltageDifferential voltage betweenVSA, OUT1A, OUT2A, SENSEA andVSB, OUT1B, OUT2B, SENSEBTest conditionsMin.Max.UnitVSA VSB VS852VVSA VSB VS;VSENSEA VSENSEB-52V--0.15V(pulsed tW trr)(DC)-6-161VVVoltage range at pins VREFA and VREFBVSENSEA,Voltage range at pins SENSEA and SENSEBVSENSEBIOUTRMS output current--2.8AfswSwitching frequency--100KHz4/34DocID7514 Rev 3

L6208Maximum ratingsTable 3. Thermal dataSymbolDescriptionRth-j-pinsMaximum thermal resistance junction pinsRth-j-caseMaximum thermal resistance junction case(1)SO24PowerSO36Unit14- C/W-1 C/W51- C/WRth-j-amb1Maximum thermal resistance junction ambientRth-j-amb1Maximum thermal resistance junction ambient(2)-35 C/WRth-j-amb1(3)-15 C/W(4)7762 C/WRth-j-amb2Maximum thermal resistance junction ambientMaximum thermal resistance junction ambient1. Mounted on a multilayer FR4 PCB with a dissipating copper surface on the bottom side of 6 cm2(with a thickness of 35 µm).2. Mounted on a multilayer FR4 PCB with a dissipating copper surface on the top side of 6 cm2(with a thickness of 35 µm).3. Mounted on a multilayer FR4 PCB with a dissipating copper surface on the top side of 6 cm2(with a thickness of 35 µm), 16 via holes and a ground layer.4. Mounted on a multilayer FR4 PCB without any heat sinking surface on the board.DocID7514 Rev 35/3434

Pin connections3L6208Pin connectionsFigure 2. Pin connections (top 36(1)1. The slug is internally connected to pins 1, 18, 19 and 36 (GND pins).Table 4. Pin descriptionPackageSO24PowerSO36Pin no.Pin no.110TypeFunctionCLOCKLogic inputStep clock input. The state machine makes one step oneach rising edge.211CW/CCWLogic inputSelects the direction of the rotation. HIGH logic levelsets clockwise direction, whereas LOW logic level setscounterclockwise direction.If not used, it has to be connected to GND or 5 V.312SENSEAPower supplyBridge A source pin. This pin must be connected topower ground through a sensing power resistor.413RCARC pinRC network pin. A parallel RC network connectedbetween this pin and ground sets the current controllerOFF-time of the bridge A.515OUT1APower outputBridge A output 1.GNDGround terminals. In SO24 package, these pins arealso used for heat dissipation toward the PCB. OnPowerSO36 package the slug is connected to thesepins.6, 7, 18, 196/34Name1, 18, 19, 36GNDDocID7514 Rev 3

L6208Pin connectionsTable 4. Pin description (continued)PackageSO24PowerSO36NameTypeFunctionPin no.Pin no.822OUT1BPower outputBridge B output 1.924RCBRC pinRC network pin. A parallel RC network connectedbetween this pin and ground sets the current controllerOFF-time of the bridge B.1025SENSEBPower supplyBridge B source pin. This pin must be connected topower ground through a sensing power resistor.1126VREFBAnalog inputBridge B current controller reference voltage.Do not leave this pin open or connected to GND.1227HALF/FULLLogic inputStep mode selector. HIGH logic level sets HALF STEPmode, LOW logic level sets FULL STEP mode.If not used, it has to be connected to GND or 5 V.Logic inputDecay mode selector. HIGH logic level sets SLOWDECAY mode. LOW logic level sets FAST DECAYmode.If not used, it has to be connected to GND or 5 V.1328CONTROL1429ENLogic input(1)Chip enable. LOW logic level switches OFF all powerMOSFETs of both bridge A and bridge B. This pin isalso connected to the collector of the overcurrent andthermal protection to implement overcurrent protection.If not used, it has to be connected to 5 V througha resistor.1530VBOOTSupplyvoltageBootstrap voltage needed for driving the upper powerMOSFETs of both bridge A and bridge B.1632OUT2BPower outputBridge B output 2.1733VSBPower supplyBridge B power supply voltage. It must be connected tothe Supply Voltage together with pin VSA.204VSAPower supplyBridge A power supply voltage. It must be connected tothe supply voltage together with pin VSB.215OUT2APower outputBridge A output 2.227VCPOutputCharge pump oscillator output.238RESETLogic inputReset pin. LOW logic level restores the home state(state 1) on the phase sequence generator statemachine.If not used, it has to be connected to 5 V.249VREFAAnalog inputBridge A current controller reference voltage.Do not leave this pin open or connected to GND.1. Also connected at the output drain of the overcurrent and thermal protection MOSFET. Therefore, it has to be driven puttingin series a resistor with a value in the range of 2.2 K - 180 K , recommended 100 K DocID7514 Rev 37/3434

Electrical characteristics4L6208Electrical characteristicsTable 5. Electrical characteristics(Tamb 25 C, Vs 48 V, unless otherwise specified)SymbolParameterTest conditionsMin.Typ.Max.UnitVSth(ON)Turn-on threshold-6.677.4VVSth(OFF)Turn-off threshold-5.666.4VAll bridges OFF;Tj -25 C to 125 C(1)-510mA--165- CTj 25 C-0.340.4WTj 125 C(1)-0.530.59WTj 25 C-0.280.34W-0.470.53WEN low; OUT VS--2mAEN low; OUT GND-0.15--mAISD 2.8 A, EN LOW-1.151.3VISTj(OFF)Quiescent supply currentThermal shutdown temperatureOutput DMOS transistorsHigh-side switch ON resistanceRDS(ON)Low-side switch ON resistanceIDSSTj 125Leakage current C(1)Source drain diodesVSDForward ON voltagetrrReverse recovery timeIf 2.8 A-300-nstfrForward recovery time--200-nsLogic inputs (EN, CONTROL, HALF/FULL, CLOCK, RESET, CW/CCW)VILLow level logic input voltage--0.3-0.8VVIHHigh level logic input voltage-2-7VIILLow level logic input currentGND logic input voltage-10--µAIIHHigh level logic input current7 V logic input voltage--10µAVth(ON)Turn-on input threshold--1.82.0VVth(OFF)Turn-off input threshold-0.81.3-VVth(HYS)Input threshold hysteresis-0.250.5-VSwitching characteristicstD(ON)ENEnable to output turn-on delay time(2)ILOAD 2.8 A, resistive load100250400nstD(OFF)ENtime(2)ILOAD 2.8 A, resistive load300550800nsILOAD 2.8 A, resistive load40-250nsILOAD 2.8 A, resistive load40-250nsILOAD 2.8 A, resistive le to output turn-off delayOutput rise time(2)Output falltime(2)Clock to output delayMinimum clocktime(3)time(4)DocID7514 Rev 3

L6208Electrical characteristicsTable 5. Electrical characteristics(Tamb 25 C, Vs 48 V, unless otherwise specified) (continued)SymbolParameterTest RCA VRCB 2.5 V3.55.5-mAVREFA, VREFB 0.5 V- 5-mV--500-nsfCLKtS(MIN)tH(MIN)tR(MIN)Minimum clock timeClock frequencyMinimum setup timeMinimum hold time(5)(5)Minimum reset time(5)tRCLK(MIN) Minimum reset to clock delay time(5)tDTfCPDeadtime protectionCharge pump frequencyTj -25 C to 125 C(1)PWM comparator and monostableIRCA, IRCB Source current at pins RCA and RCBVoffsetOffset voltage on sense comparatordelay(6)tPROPTurn OFF propagationtBLANKInternal blanking time on SENSE pins--1-µstON(MIN)Minimum On time--1.52µsROFF 20 K COFF 1 nF-13-µsROFF 100 K COFF 1 nF-61-µs---10µATj -25 C to 125 C(1)45.67.1AtOFFPWM recirculation timeIBIASInput bias current at pins VREFA andVREFBOvercurrent protectionISOVERInput supply overcurrent protectionthresholdROPDROpen drain ON resistancetOCD(ON)tOCD(OFF)I 4 mA-4060WOCD turn-on delaytime(7)I 4 mA; CEN 100 pF-200-nsOCD turn-off delaytime(7)I 4 mA; CEN 100 pF-100-ns1. Tested at 25 C in a restricted range and guaranteed by characterization.2. See Figure 3: Switching characteristic definition.3. See Figure 4: Clock to output delay time.4. See Figure 5: Minimum timing definition; clock input.5. See Figure 6: Minimum timing definition; logic inputs.6. Measured applying a voltage of 1 V to pin SENSE and a voltage drop from 2 V to 0 V to pin VREF.7. See Figure 7: Overcurrent detection timing definition.DocID7514 Rev 39/3434

Electrical characteristicsL6208Figure 3. Switching characteristic ISEtFALLtD(OFF)ENtD(ON)ENFigure 4. Clock to output delay timeCLOCKVth(ON)tIOUTtD01IN1317tDCLKFigure 5. Minimum timing definition; clock inputCLOCKVth(OFF)Vth(ON)tCLK(MIN)L10/34DocID7514 Rev 3Vth(OFF)tCLK(MIN)HD01IN1318

L6208Electrical characteristicsFigure 6. Minimum timing definition; logic inputsCLOCKVth(ON)LOGIC LK(MIN)D01IN1319Figure 7. Overcurrent detection timing cID7514 Rev 3tOCD(OFF)D02IN139911/3434

Circuit descriptionL62085Circuit description5.1Power stages and charge pumpThe L6208 integrates two independent power MOS full bridges. Each power MOS has anRDS(ON) 0.3 (typical value at 25 C), with intrinsic fast freewheeling diode. Switchingpatterns are generated by the PWM current controller and the phase sequence generator(see Section 6: PWM current control). Cross conduction protection is achieved usinga deadtime (tDT 1 s typical value) between the switch off and switch on of two powerMOSFETs in one leg of a bridge.Pins VSA and VSB MUST be connected together to the supply voltage VS. The deviceoperates with a supply voltage in the range from 8 V to 52 V. It has to be noticed that theRDS(ON) increases of some percents when the supply voltage is in the range from 8 V to 12 V(see Figure 37: Typical low-side RDS(ON) vs. supply voltage on page 29 and Figure 34:Typical high-side RDS(ON) vs. supply voltage on page 29).Using N-channel power MOS for the upper transistors in the bridge requires a gate drivevoltage above the power supply voltage. The bootstrapped supply voltage VBOOT is obtainedthrough an internal oscillator and few external components to realize a charge pump circuitas shown in Figure 8. The oscillator output (VCP) is a square wave at 600 KHz (typical) with10 V amplitude. Recommended values/part numbers for the charge pump circuit are shownin Table 6.Table 6. Charge pump external components valuesComponentValueCBOOT220 nFCP10 nFRP100 D11N4148D21N4148Figure 8. Charge pump circuitVSD1CBOOTD2RPCPVCP12/34VBOOTVSA VSBDocID7514 Rev 3D01IN1328

L62085.2Circuit descriptionLogic inputsPins CONTROL, HALF/FULL, CLOCK, RESET and CW/CCW are TTL/CMOS compatiblelogic inputs. The internal structure is shown in Figure 9. Typical value for turn-on and turn-offthresholds are respectively Vth(ON) 1.8 V and Vth(OFF) 1.3 V.Pin EN (“Enable”) has identical input structure with the exception that the drain of theovercurrent and thermal protection MOSFET is also connected to this pin. Due to thisconnection some care needs to be taken in driving this pin. The EN input may be driven inone of two configurations as shown in Figure 10 or Figure 11. If driven by an open drain(collector) structure, a pull-up resistor REN and a capacitor CEN are connected as shown inFigure 10. If the driver is a standard Push-Pull structure the resistor REN and the capacitorCEN are connected as shown in Figure 11. The resistor REN should be chosen in the rangefrom 2.2 K to 180 K . Recommended values for REN and CEN are respectively 100 K and5.6 nF. More information on selecting the values is found in Section 7.5: Non-dissipativeovercurrent protection on page 21.Figure 9. Logic inputs internal structure 9(6'3527(&7,21' ,1 9 Figure 10. EN pin open collector driving 9 95(123(1&2//(&725287387(1&(1(6'3527(&7,21' ,1 9 Figure 11. EN pin push-pull driving 9386 38//2873875(1(1&(1(6'3527(&7,21' ,1 9 DocID7514 Rev 313/3434

PWM current control6L6208PWM current controlThe L6208 device includes a constant off time PWM current controller for each of the twobridges. The current control circuit senses the bridge current by sensing the voltage dropacross an external sense resistor connected between the source of the two lower powerMOS transistors and ground, as shown in Figure 12. As the current in the motor builds upthe voltage across the sense resistor increases proportionally. When the voltage dropacross the sense resistor becomes greater than the voltage at the reference input (VREFAor VREFB) the sense comparator triggers the monostable switching the bridge off. Thepower MOS remains off for the time set by the monostable and the motor currentrecirculates as defined by the selected decay mode, described in Section 7: Decay modeson page 18. When the monostable times out the bridge will again turn on. Since the internaldeadtime, used to prevent cross conduction in the bridge, delays the turn on of the powerMOS, the effective off time is the sum of the monostable time plus the deadtime.Figure 12. PWM current controller simplified schematic96 RU %%/ 1.,1* 7,0(021267 %/(72 * 7( /2*,& PV)520 7 (/2: 6,'(* 7( '5,9(56 P 64 021267 %/(6(7 %/ 1.(5,2875287 RU %'5,9(56 '( '7,0( '5,9(56 '( '7,0( 9 3 6(67(33(5 02725287 RU % 96(16(&203 5 725 / &203 5 7252873875& RU %&2)) / 6(16( RU %95() RU %52))56(16(' ,1 9 Figure 13 shows the typical operating waveforms of the output current, the voltage dropacross the sensing resistor, the RC pin voltage and the status of the bridge. More detailsregarding the synchronous rectification and the output stage configuration are included inSection 7: Decay modes on page 18.Immediately after the power MOS turns on, a high peak current flows through the sensingresistor due to the reverse recovery of the freewheeling diodes. The L6208 device providesa 1 s blanking time tBLANK that inhibits the comparator output so that this current spikecannot prematurely retrigger the monostable.14/34DocID7514 Rev 3

L6208PWM current controlFigure 13. Output current regulation waveforms,28795()56(16(W2))W21W2)) PV W%/ 1.96(16( PV W%/ 1.95()6ORZ GHFD\ 6ORZ GHFD\FD\FD\)DVW GH)DVW GHW5&5,6(95&W5&5,6( 9 9W5&) //W5&) // PV W'7 PV W'7212))6 1& 521286 25 48 6, 6 1& 521286 5(&7,),& 7,21%&' %&'' ,1 9 Figure 14 shows the magnitude of the Off time tOFF versus COFF and ROFF values. It can beapproximately calculated from the equations:Equation 1tRCFALL 0.6 · ROFF · COFFtOFF tRCFALL tDT 0.6 · ROFF · COFF tDTwhere ROFF and COFF are the external component values and tDT is the internally generateddeadtime with:Equation 220 K ROFF 100 K 0.47 nF COFF 100 nFtDT 1 µs (typical value)DocID7514 Rev 315/3434

PWM current controlL6208Therefore:Equation 3tOFF(MIN) 6.6 µstOFF(MAX) 6 msThese values allow a sufficient range of tOFF to implement the drive circuit for most motors.The capacitor value chosen for COFF also affects the rise time tRCRISE of the voltage at thepin RCOFF. The rise time tRCRISE will only be an issue if the capacitor is not completelycharged before the next time the monostable is triggered. Therefore, the on time tON, whichdepends by motors and supply parameters, has to be bigger than tRCRISE for allowinga good current regulation by the PWM stage. Furthermore, the on time tON can not besmaller than the minimum on time tON(MIN).Equation 4 t ON t ON MIN 1.5 s (typ. value) t ON t RCRISE – t DTtRCRISE 600 · COFFFigure 15 shows the lower limit for the on time tON for having a good PWM currentregulation capacity. It has to be said that tON is always bigger than tON(MIN) because thedevice imposes this condition, but it can be smaller than tRCRISE - tDT. In this last case thedevice continues to work but the off time tOFF is not more constant.So, small COFF value gives more flexibility for the applications (allows smaller on time and,therefore, higher switching frequency), but, the smaller is the value for COFF, the moreinfluential will be the noises on the circuit performance.Figure 14. tOFF versus COFF and ROFF 5 2)) N )W2)) V@ N5 2))) N5 2))) &R)) Q)@ 0 16/34DocID7514 Rev 3

L6208PWM current controlFigure 15. Area where tON can vary maintaining the PWM regulationWRQ PLQ V@ V W\S YDOXH &2)) Q)@ 0 DocID7514 Rev 317/3434

Decay modes7L6208Decay modesThe CONTROL input is used to select the behavior of the bridge during the off time. Whenthe CONTROL pin is low, the fast decay mode is selected and both transistors in the bridgeare switched off during the off time. When the CONTROL pin is high, the slow decay modeis selected and only the low-side transistor of the bridge is switched off during the off time.Figure 16 shows the operation of the bridge in the fast decay mode. At the start of the offtime, both of the power MOS are switched off and the current recirculates through the twoopposite freewheeling diodes. The current decays with a high di/dt since the voltage acrossthe coil is essentially the power supply voltage. After the deadtime, the lower power MOS inparallel with the conducting diode is turned on in synchronous rectification mode. Inapplications where the motor current is low it is possible that the current can decaycompletely to zero during the off time. At this point if both of the power MOS were operatingin the synchronous rectification mode, it would then be possible for the current to build in theopposite direction. To prevent this only the lower power MOS is operated in synchronousrectification mode. This operation is called “Quasi-synchronous rectification mode”. Whenthe monostable times out, the power MOS are turned on again after some delay set by thedeadtime to prevent cross conduction.Figure 17 shows the operation of the bridge in the slow decay mode. At the start of the offtime, the lower power MOS is switched off and the current recirculates around the upper halfof the bridge. Since the voltage across the coil is low, the current decays slowly. After thedeadtime the upper power MOS is operated in the synchronous rectification mode. Whenthe monostable times out, the lower power MOS is turned on again after some delay set bythe deadtime to prevent cross conduction.Figure 16. Fast decay mode output stage configurations 21 7,0(& 48 6, 6 1& 521286 5(&7,),& 7,21' ,1 9 Figure 17. Slow decay mode output stage configurations 21 7,0(& 6 1& 521286 5(&7,),& 7,21' ,1 9 18/34DocID7514 Rev 3

L62087.1Decay modesStepping sequence generationThe phase sequence generator is a state machine that provides the phase and enableinputs for the two bridges to drive a stepper motor in either full step or half step. Two full stepmodes are possible, the normal drive mode where both phases are energized each stepand the wave drive mode where only one phase is energized at a time. The drive mode isselected by the HALF/FULL input and the current state of the sequence generator asdescribed below. A rising edge of the CLOCK input advances the state machine to the nextstate. The direction of rotation is set by the CW/CCW input. The RESET input resets thestate machine to state.7.2Half step modeA HIGH logic level on the HALF/FULL input selects half step mode. Figure 18 shows themotor current waveforms and the state diagram for the phase sequencer generator. Atstartup or after a RESET the phase sequencer is at state 1. After each clock pulse the statechanges following the sequence 1, 2, 3, 4, 5, 6, 7, 8, etc. if CW/CCW is high (clockwisemovement) or 1, 8, 7, 6, 5, 4, 3, 2, etc. if CW/CCW is low (counterclockwise movement).7.3Normal drive mode (full step two phase on)A LOW level on the HALF/FULL input selects the full step mode. When the low level isapplied when the state machine is at an ODD numbered state the normal drive mode isselected. Figure 19 shows the motor current waveform state diagram for the state machineof the phase sequencer generator. The normal drive mode can easily be selected by holdingthe HALF/FULL input low and applying a RESET. At startup or after a RESET the statemachine is in state 1. While the HALF/FULL input is kept low, state changes following thesequence 1, 3, 5, 7, etc. if CW/CCW is high (clockwise movement) or 1, 7, 5, 3, etc. ifCW/CCW is low (counterclockwise movement).7.4Wave drive mode (full step one phase on)A LOW level on the pin HALF/FULL input selects the full step mode. When the low level isapplied when the state machine is at an EVEN numbered state the wave drive mode isselected. Figure 20 shows the motor current waveform and the state diagram for the statemachine of the phase sequence generator. To enter the wave drive mode the state machinemust be in an EVEN numbered state. The most direct method to select the wave drive modeis to first apply a RESET, then while keeping the HALF/FULL input high apply one pulse tothe clock input then take the HALF/FULL input low. This sequence first forces the statemachine to state 1. The clock pulse, with the HALF/FULL input high advances the statemachine from state 1 to either state 2 or 8 depending on the CW/CCW input. Starting fromthis point, after each clock pulse (rising edge) will advance the state machine following thesequence 2, 4, 6, 8, etc. if CW/CCW is high (clockwise movement) or 8, 6, 4, 2, etc. ifCW/CCW is low (counterclockwise movement).DocID7514 Rev 319/3434

Decay modesL6208Figure 18. Half step mode,287 ,287% &/2&.67 5783 25 5(6(7 ' ,1 9 Figure 19. Normal drive mode,287 ,287% &/2&.67 5783 25 5(6(7 ' ,1 9 Figure 20. Wave drive mode,287 ,287% &/2&.67 5783 25 5(6(7 ' ,1 9 20/34DocID7514 Rev 3

L62087.5Decay modesNon-dissipative overcurrent protectionThe L6208 device integrates an “Overcurrent Detection” circuit (OCD). This circuit providesprotection against a short-circuit to ground or between two phases of the bridge. With thisinternal overcurrent detection, the external current sense resistor normally used and itsassociated power dissipation are eliminated. Figure 21 shows a simplified schematic of theovercurrent detection circuit.To implement the overcurrent detection, a sensing element that delivers a small but precisefraction of the output current is implemented with each high-side power MOS. Since thiscurrent is a small fraction of the output current there is very little additional powerdissipation. This current is compared with an internal reference current IREF. When theoutput current reaches the detection threshold (typically 5.6 A), the OCD comparator signalsa fault condition. When a fault condition is detected, the EN pin is pulled below the turn offthreshold (1.3 V typical) by an internal open drain MOS with a pull down capability of 4 mA.By using an external R-C on the EN pin, the off time before recovering normal operation canbe easily programmed by means of the accurate thresholds of the logic inputs.Figure 21. Overcurrent protection simplified schematic287 96 287 32:(5 6(16( FHOO ,* 6,'( '026V 2)7 ( %5,'*( , 32:(5 '026Q FHOOV72 * 7(/2*,&32:(5 '026Q FHOOV32:(5 6(16( FHOO 2&'&203 5 7259'', , Q, Q, , Q5(1 (1,5(),17(51 /23(1 '5 ,1&(1 29(57(03(5 785(2&'&203 5 725)520 7 (%5,'*( %' ,1 9 Figure 22 shows the overcurrent detection operation. The disable time tDISABLE beforerecovering normal operation can be easily programmed by means of the accuratethresholds of the logic inputs. It is affected whether by CEN and REN values and itsmagnitude is reported in Figure 23. The delay time tDELAY before turning off the bridge whenan overcurrent has been detected depends only by CEN value. Its magnitude is reported inFigure 24.CEN is also used for providing immunity to the pin EN against fast transient noises.Therefore the value of CEN should be chosen as big as possible according to the maximumDocID7514 Rev 321/3434

Decay modesL6208tolerable delay time and the REN value should be chosen according to the desired disabletime.The resistor REN should be chosen in the range from 2.2 K to 180 K . Recommendedvalues for REN and CEN are respectively 100 K and 5.6 nF that allow obtaining 200 sdisable time.Figure 22. Overcurrent protection CD(OFF)tD(OFF)EN22/34DocID7514 Rev 3tEN(RISE)tD(ON)END02IN1400

L6208Decay modesFigure 23. tDISABLE versus CEN and REN (VDD 5 V)5(1 W ',6 %/( V@ N5(1 N5 (1 N5 (1 N5 (1 N & ( 1 Q ) @ 0 Figure 24. tDELAY versus CEN (VDD 5 V)W'(/ V@ &(1 Q)@ 0 7.6Thermal protectionIn addition to the overcurrent protection, the L6208 device integrates a thermal protectionfor preventing the device destruction in case of junction overtemperature. It works sensingthe die temperature by means of a sensible element integrated in the die. The deviceswitches-off when the junction temperature reaches 165 C (typ. value) with 15 Chysteresis (typ. value).DocID7514 Rev 323/3434

Application information8L6208Application informationA typical bipolar stepper

Cross conduction protection Thermal shutdown Undervoltage lockout Integrated fast freewheeling diodes Applications Bipolar stepper motor Description The L6208 device is a DMOS fully integrated stepper motor driver with non-dissipative overcurrent protection,

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