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VLSI Design

VLSI DesignAbout the TutorialOver the past several years, Silicon CMOS technology has become the dominant fabricationprocess for relatively high performance and cost effective VLSI circuits. The revolutionarynature of these developments is understood by the rapid growth in which the number oftransistors integrated on circuit on single chip. In this tutorial we are providing concept ofMOS integrated circuits and coding of VHDL and Verilog language.AudienceThis reference has been prepared for the students who want to know about the VLSITechnology. The students will be able to know about the VHDL and Verilog program coding.PrerequisitesBefore you start proceeding with this tutorial, we make an assumption that you are alreadyaware of the basic concepts of basic concept of Digital Electronics.Copyright & Disclaimer Copyright 2015 by Tutorials Point (I) Pvt. Ltd.All the content and graphics published in this e-book are the property of Tutorials Point (I)Pvt. Ltd. The user of this e-book is prohibited to reuse, retain, copy, distribute or republishany contents or a part of contents of this e-book in any manner without written consentof the publisher.We strive to update the contents of our website and tutorials as timely and as precisely aspossible, however, the contents may contain inaccuracies or errors. Tutorials Point (I) Pvt.Ltd. provides no guarantee regarding the accuracy, timeliness or completeness of ourwebsite or its contents including this tutorial. If you discover any errors on our website orin this tutorial, please notify us at contact@tutorialspoint.comi

VLSI DesignTable of ContentsAbout the Tutorial . iAudience . iPrerequisites . iCopyright & Disclaimer . iTable of Contents . iiPART 1 – VLSI BASICS . 11.VLSI – Digital System . 2VLSI Design Flow . 2Y Chart . 4Design Hierarchy-Structural . 42.VLSI – FPGA Technology . 7FPGA – Introduction . 7Gate Array Design . 8Standard Cell Based Design . 9Full Custom Design . 103.VLSI – MOS Transistor . 11Structure of a MOSFET . 11Working of a MOSFET . 14MOSFET Current – Voltage Characteristics . 164.VLSI – MOS Inverter . 19Principle of Operation . 19Resistive Load Inverter . 20Inverter with N type MOSFET Load . 22Enhancement Load NMOS. 22Depletion Load NMOS . 23CMOS Inverter – Circuit, Operation and Description . 245.VLSI – Combinational MOS Logic Circuits . 28CMOS Logic Circuits . 28Complex Logic Circuits . 31Complex CMOS Logic Gates . 326.VLSI – Sequential MOS Logic Circuits . 36CMOS Logic Circuits . 37CMOS Logic Circuits . 40PART 2 – VHDL . 447.VHDL – Introduction. 45Data Flow Modeling . 46Behavioral Modeling . 46Structural Modeling . 46Logic Operation – AND GATE . 47Logic Operation – OR Gate . 48Logic Operation – NOT Gate . 48ii

VLSI DesignLogic Operation – NAND Gate . 49Logic Operation – NOR Gate. 50Logic Operation – XOR Gate . 51Logic Operation – X-NOR Gate . 528.VHDL – Programming for Combinational Circuits . 54VHDL Code for a Half-Adder . 54VHDL Code for a Full Adder . 54VHDL Code for a Half-Subtractor . 55VHDL Code for a Full Subtractor . 56VHDL Code for a Multiplexer . 56VHDL Code for a Demultiplexer . 57VHDL Code for a 8 x 3 Encoder: . 58VHDL Code for a 3 x 8 Decoder . 58VHDL Code – 4 bit Parallel adder . 59VHDL Code – 4 bit Parity Checker . 61VHDL Code – 4 bit Parity Generator . 619.VHDL – Programming for Sequential Crcuits . 63VHDL Code for an SR Latch . 63VHDL Code for a D Latch. 63VHDL Code for an SR Flip Flop . 64VHDL code for a JK Flip Flop . 65VHDL Code for a D Flip Flop . 66VHDL Code for a T Flip Flop . 67VHDL Code for a 4 - bit Up Counter . 68VHDL Code for a 4-bit Down Counter . 69PART 3 – VERILOG . 7110. Verilog – Introduction . 72Behavioral level . 72Register Transfer Level . 72Gate Level . 72Lexical Tokens . 72Gate Level Modelling . 73Data Types . 75Operators . 77Operands . 81Modules . 8211. Verilog – Behavioral Modelling & Timing Control . 84Procedural Assignments . 84Delay in Assignment (not for synthesis) . 85Blocking Assignments . 86Nonblocking (RTL) Assignments . 86Conditions. 87Delay Controls . 91Procedures: Always and Initial Blocks . 92iii

VLSI DesignPart 1 – VLSI Basics1

1. VLSI – Digital SystemVLSI DesignVery-large-scale integration (VLSI) is the process of creating an integrated circuit (IC)by combining thousands of transistors into a single chip. VLSI began in the 1970s whencomplex semiconductor and communication technologies were being developed. Themicroprocessor is a VLSI device.Before the introduction of VLSI technology, most ICs had a limited set of functions theycould perform. An electronic circuit might consist of a CPU, ROM, RAM and other gluelogic. VLSI lets IC designers add all of these into one chip.The electronics industry has achieved a phenomenal growth over the last few decades,mainly due to the rapid advances in large scale integration technologies and system designapplications. With the advent of very large scale integration (VLSI) designs, the numberof applications of integrated circuits (ICs) in high-performance computing, controls,telecommunications, image and video processing, and consumer electronics has beenrising at a very fast pace.The current cutting-edge technologies such as high resolution and low bit-rate video andcellular communications provide the end-users a marvelous amount of applications,processing power and portability. This trend is expected to grow rapidly, with veryimportant implications on VLSI design and systems design.VLSI Design FlowThe VLSI IC circuits design flow is shown in the figure below. The various levels of designare numbered and the blocks show processes in the design flow.Specifications comes first, they describe abstractly, the functionality, interface, and thearchitecture of the digital IC circuit to be designed.2

VLSI DesignFigure: Simplified VLSI Design FlowBehavioral description is then created to analyze the design in terms of functionality,performance, compliance to given standards, and other specifications.RTL description is done using HDLs. This RTL description is simulated to test functionality.From here onwards we need the help of EDA tools.RTL description is then converted to a gate-level netlist using logic synthesis tools. A gatelevel netlist is a description of the circuit in terms of gates and connections between them,which are made in such a way that they meet the timing, power and area specifications.Finally, a physical layout is made, which will be verified and then sent to fabrication.3

VLSI DesignY ChartThe Gajski-Kuhn Y-chart is a model, which captures the considerations in designingsemiconductor devices.The three domains of the Gajski-Kuhn Y-chart are on radial axes. Each of the domains canbe divided into levels of abstraction, using concentric rings.At the top level (outer ring), we consider the architecture of the chip; at the lower levels(inner rings), we successively refine the design into finer detailed implementation:Creating a structural description from a behavioral one is achieved through the processesof high-level synthesis or logical synthesis.Creating a physical description from a structural one is achieved through layout synthesis.Figure: Y ChartDesign Hierarchy-StructuralThe design hierarchy involves the principle of "Divide and Conquer." It is nothing butdividing the task into smaller tasks until it reaches to its simplest level. This process ismost suitable because the last evolution of design has become so simple that itsmanufacturing becomes easier.We can design the given task into the design flow process's domain (Behavioral, Structural,and Geometrical). To understand this, let’s take an example of designing a 16-bit adder,as shown in the figure below.4

VLSI DesignFigure: Structural hierarchy of 16 bit adder circuitHere, the whole chip of 16 bit adder is divided intodividing the 4-bit adder into 1-bit adder or halfdesigning process and its internal circuit is alsoconnecting all the last four adders, we can designdesign a 16-bit adder.four modules of 4-bit adders. Further,adder. 1 bit addition is the simplesteasy to fabricate on the chip. Now,a 4-bit adder and moving on, we can5

VLSI DesignFigure: Decomposition of a 4 bit adder6

2. VLSI – FPGA TechnologyVLSI DesignFPGA – IntroductionThe full form of FPGA is “Field Programmable Gate Array”. It contains ten thousand tomore than a million logic gates with programmable interconnection. Programmableinterconnections are available for users or designers to perform given functions easily. Atypical model FPGA chip is shown in the given figure. There are I/O blocks, which aredesigned and numbered according to function. For each module of logic level composition,there are CLB’s (Configurable Logic Blocks).CLB performs the logic operation given to the module. The inter connection between CLBand I/O blocks are made with the help of horizontal routing channels, vertical routingchannels and PSM (Programmable Multiplexers).The number of CLB it contains only decides the complexity of FPGA. The functionality ofCLB’s and PSM are designed by VHDL or any other hardware descriptive language. Afterprogramming, CLB and PSM are placed on chip and connected with each other with routingchannels.Figure: Interconnection between routing and CLBAdvantages It requires very small time; starting from design process to functional chip.No physical manufacturing steps are involved in it.The only disadvanta

VLSI Design 2 Very-large-scale integration (VLSI) is the process of creating an integrated circuit (IC) by combining thousands of transistors into a single chip. VLSI began in the 1970s when complex semiconductor and communication technologies were being developed. The microprocessor is a VLSI device.

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