Application Note: CPLDRDriving LEDs with Xilinx CPLDsXAPP805 (v1.0) April 8, 2005SummaryLight-Emitting Diodes (LEDs) are commonplace on the modern day Printed Circuit Board(PCB). Whether they are indicating status, activity or some other function, they need to bedriven by a device that can provide sufficient current to illuminate them. Traditionally, LEDdriver devices have been used for this purpose, but this application note aims to demonstratehow that functionality can be incorporated into Xilinx CPLDs to save both cost and valuableboard space.IntroductionSpecific driver devices are commonly used to drive common-anode LEDs, including sevensegment displays. Figure 1 shows a typical configuration. The output pin of the driver deviceconnects to the cathode of the LED, and the anode is connected to VCC. When a low signal isapplied to the output, the driver sinks current and the LED illuminates. Each LED will require adifferent threshold current to illuminate, but some common examples are found in Table 1below. As discrete LED Driver ICs integrate more features, their costs rise.VccLEDLEDDriverSeriesResistorFigure 1: Traditional LED Driver SetupTable 1: Partial List of Available LED DriversLED Driver ChipFeaturesAD8240Automotive LED Driver with Lamp Failure Detection and PWM InputADM8846LED Driver for White LED LCD Backlights (Cell Phone)FAN5609LED Driver with DC/DC ConverterLT1932Constant Current DC/DC LED DriverMAX6956LED Static Display DriverICM7218C8-digit 7-segment Display DriverTB6270116-digit LED Driver with SIPO ShifterTB627058-digit LED Driver with SIPO Shifter 2005 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc.All other trademarks are the property of their respective owners.XAPP805 (v1.0) April 8, 2005www.xilinx.com1
RUsing XilinxCPLDs to DriveLEDsUsing Xilinx CPLDs to Drive LEDsTypical CircuitXilinx CPLDs can be used instead of traditional LED driver devices to save both cost and boardspace. Figure 2 shows a typical circuit diagram. A current limiting resistor is typically placedbetween the output of the CPLD and the cathode of the LED. When the CPLD drives low, theLED illuminates.VccLEDXilinxCPLDSeriesResistorFigure 2: Xilinx CPLD Driving an LEDCPLD Output DriveTable 2 shows the current that can be delivered by a single output of a Xilinx CPLD whendriving low. The values are taken from the individual data sheets of each Xilinx CPLD family.You will find the information under the DC Electrical Characteristics sections.Table 2: Xilinx CPLD Drive StrengthsXilinx CPLD FamilyCurrent Drive StrengthXC9500 (5V)24 mAXC9500 (3.3V)10 mAXC9500XL8 mAXC9500XV8 mACoolRunner XPLA38 mACoolRunner -II8 mAFrom Table 2, it is clear that Xilinx CPLDs are ideal for driving LEDs that require up to 8-10 mAto illuminate.2www.xilinx.comXAPP805 (v1.0) April 8, 2005
RUsing Xilinx CPLDs to Drive LEDsGanged Output CircuitsIn cases where 8 mA is insufficient to illuminate an LED, multiple outputs can be tied togetherto offer double or triple the current sink of a single output. See Figure re 3: Gang Multiple Outputs Together for Greater Drive StrengthDisplay DriversUsing the example of an 8-digit 7-segment display driver, we can see a typical circuit design inFigure 4.Segment Select8Digit Select8Figure 4: 8-digit 7-segment Display Driver with Data InterfaceFigure 5 shows how a Xilinx CPLD can be used instead of a discrete display driver. It is verylikely that a Xilinx CPLD will have spare capacity after implementing an LED display driver; thiscapacity can be used for other board functions. For example, the functions of other discretecomponents on the board can be incorporated into the CPLD. The logic that fills the remainingcapacity of the CPLD does not have to interface at the same level. Because of the split railVCCIO available on all CoolRunner-II devices, the CPLD can interface with components of atXAPP805 (v1.0) April 8, 2005www.xilinx.com3
RUsing Xilinx CPLDs to Drive LEDsleast two voltages simultaneously (1.5V, 1.8V, 2.5V or 3.3V). For more information on how toincorporate discrete components, see White Paper 202. For more information on the use ofsplit rail I/O banking, see the CoolRunner-II Family Data Sheet.8Discrete LogicAbsorptionVCCIO22.5VI/O Bank 1I/O Bank 2VCCIO13.3VLevel ShiftingXilinx CPLD8Digit SelectSegment SelectFigure 5: Xilinx CPLD Used as an 8-digit 7-segment Display Driver with RemainingCapacity Used to Incorporate Discrete Logic and Interface to Different Voltage LevelsTypical Versus Worst Case Drive ValuesThe values of VOL for the different Xilinx CPLD devices are mentioned in the data sheets in aformat similar to Table 3.Table 3: Output Low Voltage for the XC2C64A (LVCMOS 3.3V and LVTTL 3.3V DC Voltage Specifications Shown)SymbolVOLParameterTest ConditionsMin.Max.UnitsLow Level Output VoltageIOL 8 mA, VCCIO 3V-0.4VIOL 0.1 mA, VCCIO 3V-0.2VThese numbers are taken under worst case conditions and, therefore, we can guarantee thatthe devices will be able to meet this specification. However, it should also be noted that theoutput buffers can probably drive significantly more current than worst case conditions.To find out how much current the output buffers can typically supply, the I/V curves for thedevices are needed. They can be found in XAPP150 for the XC9500/, XC9500XL, XC9500XV4www.xilinx.comXAPP805 (v1.0) April 8, 2005
Guidelines for Driving Multiple LEDs with the Same CPLDRand CoolRunner XPLA3 families. For CoolRunner-II device I/V curves, look in the individualCoolRunner-II datasheets. They appear as shown in Figure 6.Figure 6: I/V Curve for the XC9500XL FamilyUnder the typical conditions shown above, it is evident that at 0.4V the output low current (IOL)is as high as 20 mA. Of course, these numbers are typical and cannot be guaranteed underall circumstances.Guidelines forDriving MultipleLEDs with theSame CPLDConclusionXAPP805 (v1.0) April 8, 2005As mentioned earlier, it is possible to tie two or more outputs together to double or triple (and etcetera) the drive strength for power hungry LEDs.If multiple LEDs are to be driven by individual pins on the same CPLD, there are a fewguidelines that may be helpful. These help to reduce the effect of ground bounce due tomultiple outputs switching simultaneously, and hence avoid corrupting the operation of otherdevices driven by the CPLD. Try to stagger the switching of the outputs. LEDs are almost always used for indicatingstatus to a human. Human reactions are sufficiently slow that delaying the outputswitching by a small amount of time will not be noticable Try to skew the switching of the LEDs slightly using the adjustable fast/slow slew rate ofthe outputs If using an XC9500, XC9500XL, or XC9500XV device, try putting some of the macrocellsinto low power mode, and leave others in high frequency mode. This will have the effect ofskewing the switching outputs slightly Try to distribute the pins driving LEDs evenly around the device package so as to locatethem next to Ground pins. The individual device datasheet has a listing of the pin locationson each package.Xilinx CPLDs can easily take the place of discrete LED driver devices. They can deliversufficient current to illuminate most LEDs, but if more current is required, multiple outputs canbe tied together. The current drive strength of the different Xilinx CPLDs can be found in thedevice data sheets available on the Xilinx website. However, under typical conditions, the XilinxCPLDs can output more current.www.xilinx.com5
RAdditionalInformationAdditional InformationCoolRunner-II Data Sheets, Application Notes, and White PapersOther CPLD Data Sheets, Application Notes and White PapersDevice PackagesRevisionHistory6The following table shows the revision history for this document.DateVersion04/08/051.0RevisionInitial Xilinx release.www.xilinx.comXAPP805 (v1.0) April 8, 2005
ICM7218C 8-digit 7-segment Display Driver TB62701 16-digit LED Driver with SIPO Shifter TB62705 8-digit LED Driver with SIPO Shifter LED Driver Series Resistor LED Vcc . 2 www.xilinx.com XAPP805 (v1.0) April 8, 2005 R Using Xilinx CPLDs t
PG300 (v3.0) November 10, 2021 www.xilinx.com DisplayPort 1.4 RX Subsystem v3.0 6. Se n d Fe e d b a c k. Performance and Resource Use web page. Xilinx Design Tools: Release Notes Guide. 70294. 72775. Xilinx Support web page. Xilinx Wiki page. page. Xilinx Design Tools: Rele
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