6.012 Microelectronic Devices And Circuits, Final Exam
16.012 Microelectronic Devices and CircuitsFormula Sheet for the Final Exam, Fall 2009Parameter Values:Periodic Table:q 1.6x10"19 Coul#o 8.854 x10"14 F/cm#r,Si 11.7, #Si 10"12 F/cmn i [ Si@R.T ] 1010 cm "3kT /q 0.025 V; ( kT /q) ln10 0.06 V1µm 1x10"4 cmDrift/Diffusion:!Conductivity :" q(µ e n µ h p) CFm #Dm m xDm kT µmqThe Five Basic Equations:Electron continuity :!!sx µ m E xEinstein relation :IVVBAlGaInCSiGeSnNPAsSbElectrostatics:Drift velocity :Diffusion flux :IIIHole continuity :Electron current density :Hole current density :Poisson's equation :dE(x) # (x)dxd& (x)% E(x)dxd 2& (x)%" # (x)dx 2"E(x) 1" #(x)dx& (x) % E(x)dx& (x) %1" #(x)dxdx"n(x,t) 1!"Je (x,t)# gL (x,t) # [ n(x,t) p(x,t) # n i2 ] r(T)"tq "x"p(x,t) 1 "Jh (x,t) gL (x,t) # [ n(x,t) p(x,t) # n i2 ] r(T)"tq "x"n(x,t)J e (x,t) qµ e n(x,t)E(x,t) qDe"x"p(x,t)J h (x,t) qµ h p(x,t)E(x,t) # qDh"x"E(x,t) q [ p(x,t) # n(x,t) N d (x) # N a# (x)]"x%Uniform doping, full ionization, TEn - type, N d N a!no " N d # N a N D ,kT N Dlnqnipo n i2 n o ,%n n o n i2 po ,%p #p - type, N a N dpo " N a # N d N A ,kT N AlnqniUniform optical excitation, uniform doping!n n o n'p po p'Low level injection, n',p' p o n o :n' p'dn' gl (t) " ( po n o n') n' rdtdn'n' gl (t)dt # minwith # min ( po r)"1
2Flow problems (uniformly doped quasi-neutral regions with quasi-static excitation and lowlevel injection; p-type example):d 2 n'(x)n'(x)1Minority carrier excess :" "gL (x)Le # De e22dxLeDeMinority carrier current density :Majority carrier current density :Electric field :Majority carrier excess :dn'(t)dxJ h (x) JTot " J e (x))1 &DhE x (x) %J e (x) (J h (x) qµ h po 'De*, dE x (x)p'(x) % n'(x) q dxJ e (x) % qDeShort base, infinite lifetime limit:d 2 n'(x)11Minority carrier excess :" #gL (x), n'(x) " #2dxDeDe! g (x)dxdxLNon-uniformly doped semiconductor sample in thermal equilibriumd 2" (x)q {n i [e q" (x ) kT e q" (x ) kT ] [ N d (x) N a (x)]}2dx#n o (x) n ie q" (x ) kT , po (x) n ie q" (x ) kT , po (x)n o (x) n i2!Depletion approximation for abrupt p-n junction:! 0&&#qN Ap"(x) %& qN Dn&' 0w(v AB ) forx #x pfor #x p x 0for 0 x x nforxn xN Ap x p N Dn x n(b ) (n # ( p 2*Si (( b # v AB ) ( N Ap N Dn )qN Ap N Dn2q (( b # v AB ) N Ap N Dn*Si(N Ap N Dn )E pk qDP (v AB ) #AqN Ap x p (v AB ) #A 2q*Si (( b # v AB )Ideal p-n junction diode i-v relation:n2n2! n(-x p ) i e qv AB / kT , n'(-x p ) i (e qv AB / kT "1);N ApN ApiD# DDe & qv AB / kTh Aq n i2 % -1]( [e N Dn w n,eff N Ap w p,eff '-x pqQNR,p -side Aq- n'(x)dx,-w pp(x n ) w m,eff) * ,kT N Dn N Aplnqn i2N Ap N Dn(NAp N Dn )n i2 qv AB / kTn2e, p'(x n ) i (e qv AB / kT "1)N DnN Dnwm " x mif L m w mLm tanh [( w m " x m ) Lm ] if L m w mLmif L m w mwnqQNR,n -side Aq - p'(x)dx,xnNote : p'(x) . n'(x) in QNRs
3Large signal BJT Model in Forward Active Region (FAR):(npn with base width modulation)iB (v BE ,vCE ) IBS (e qv BE / kT "1)iC (v BE ,v BC ) # F iB (v BE ,vCE ) [1 vCE ] # F IBS (e qv BE / kT "1) [1 vCE ]with :IESAqn i2 & DhDe )IBS % (( ,(# F 1) (# F 1) ' N DE w E ,eff N AB w B,eff *Also,(1" -B ),F (1 -E )and # F .When -B . 0 then , F .(1" -B ),F, and(1" , F )and # F . %1VAw B2 ,effand -B 2 L2eBwD Nwith -E h / AB / B ,effDe N DE w E ,eff(-E -B )1(1 -E )#F %1-EMOS Capacitor:![%# 0Flat - band voltage : VFB " vGB at which # (0) # p Siin Si]VFB # p Si # m[%# 2#Threshold voltage : VT " vGC at which # (0) # p Si v BCVT (v BC ) VFB 2# p Si 12&Si qN A 2# p Si v BC*Cox{[Depletion region width at threshold :x DT (v BC ) *Cox Oxide capacitance per unit area : v BC]in Si1/ 2]}[2&Si 2# p Si v BC]qN A&oxt ox[& 3.9,r,SiO2&SiO2 ' 3.5x10 13 F /cm]*q*N Cox[vGC VT (v BC )]Inversion layer sheet charge density :*q*P Cox[vGB VFB )]Accumulation layer sheet charge density :!p SiGradual Channel Approximation for MOSFET Characteristics:(n-channel; strong inversion; with channel length modulation; no velocity saturation)Only valid for vBS 0, vDS 0.iG (vGS ,v DS ,v BS ) 0,iB (vGS ,v DS ,v BS ) 0% 0for K2iD (vGS ,v DS ,v BS ) &[vGS " VT (v BS )] [1 (v DS " v DS,sat )] for 2#%v DS ( Kv"V(v)"#for&) v DSGSTBS ''2 *with VT (v BS ) , VFB " 2- p"Si K,W*µe Cox,L*Cox,12.SiqN A 2- p"Si " v BS*Cox.ox,t ox{[[vGS " VT (v BS )] 0 # v DS0 [vGS " VT (v BS )] # v DS0 # v DS [vGS " VT (v BS )]1/ 2]}, v DS,sat ,%1 .SiqN A# , 1 * &Cox 2 2- p"Si " v BS'[1[vGS " VT (v BS )]#1/ 2]( ) , * ,1VA
4Large Signal Model for MOSFETs Operated below Threshold (weak inversion):(n-channel) Only valid for for vGS VT, vDS 0, vBS 0.iG (vGS ,v DS ,v BS ) 0,iB (vGS ,v DS ,v BS ) " 0iD,s#t (vGS ,v DS ,v BS ) " IS,s#t eq { vGS #VT (v BS )} n kTwith Vt (1# e#qv DS / kT)% kT ( 2 2 SiqN AWK o Vt2 where IS,s#t µe ' * 2 L & q ) 2, p # v BS2 2, p # v BS2 SiqN AkTW*, K o µe Cox, - , n " 1 *qLCox2 2, p # v BSLarge Signal Model for MOSFETs Reaching Velocity Saturation at Small vDS:(n-channel) Only valid for vBS 0, vDS 0. Neglects vDS/2 relative to (vGS-VT).!Saturation model : sy (E y ) µe E y if E y " E crit , sy (E y ) µe E crit # ssat if E y E critiG (vGS ,v DS ,v BS ) 0,iB (vGS ,v DS ,v BS ) 0) 0for(vGS & VT ) 0 v DS *iD (vGS ,v DS ,v BS ) % *W ssat Cox [vGS & VT (v BS )][1 '(v DS & ( crit L)] for 0 (vGS & VT ), ( crit L v DS W*µe Coxfor 0 (vGS & VT ), v DS ( crit L[vGS & VT (v BS )]v DS ,Lwith ' # 1 VACMOS PerformanceTransfer characteristic:!In general : VLO 0,VSymmetry : VM DD2V HI VDD ,ION 0,and NM LO NM HI"IOFF 0K n K p and VTp VTnMinimum size gate : Ln L p Lmin , W n W min , W p (µn µ p )W n![or W (sSwitching times and gate delay (no velocity saturation):2CLVDD" Ch arg e " Disch arg e 2K n [VDD # VTn ]**CL n (W n Ln W p L p )Cox 3nW min Lmin Cox" Min.Cycle " Ch arg e " Disch arg e assumes µe 2µh12nL2minVDD2µe [VDD # VTn ]Dynamic power dissipation (no velocity saturation):2DDPdyn @ f max CLV!PDdyn @ f max !2µ W V [V % VTn ]CLVDDf max "" e min ox DD DD# Min.Cyclet ox LminPdyn @ f maxInverterArea"Pdyn @ f maxW min Lmin2µ V [V % VTn ]" e ox DD 2DDt ox Lmin2psat,nssat, p )W n]
5Switching times and gate delay (full velocity saturation):" Ch arg e " Disch arg e CLVDD*W min ssat Cox[VDD # VTn ]**CL n (W n Ln W p L p )Cox 2nW min Lmin Cox" Min.Cycle " Ch arg e " Disch arg e assumes ssat,e ssat,h4nLminVDDssat [VDD # VTn ]Dynamic power dissipation per gate (full velocity saturation):!2Pdyn @ f max CLVDDf max "PDdyn @ f max 2s W V [V % VTn ]CLVDD" sat min ox DD DD# Min.Cyclet oxPdyn @ f maxInverterArea"Pdyn @ f maxW min Lmin"ssat oxVDD [VDD % VTn ]t ox L2Static power dissipation per gate!Pstatic VDD ID,off " VDDPDstatic W min# qNµe Vt2 Si A e{ VT } nVtLmin2 VBSPstaticV# qN VnV% 2DD µe Vt2 Si A e{ T } tInverter AreaLmin2 VBSCMOS Scaling Rules - Constant electric field scaling! Scaled Dimensions : Lmin " Lmin sScaled Voltages : VDD " VDD sConsequences :**Cox" sCox# "# sW "W sVBS " VBS sK " sKPdyn " Pdyn sPDstatic " s2 e( s 1)VTs n Vtt ox " t ox sNA " s NAVT " VT s2PDdyn @ f max " PDdyn @ f maxPDstaticDevice transit timesw B2w B2Short Base Diode transit time : " b 2Dmin,B 2µmin,BVthermal!!Channel transit time, MOSFET w.o. velocity saturation : " Ch 2L23 µCh VGS # VTChannel transit time, MOSFET with velocity saturation : " Ch Lssat
6Small Signal Linear Equivalent Circuits: p-n Diode (n -p doping assumed for Cd)gd "#iD#v AB Qqq IDIS e qVAB / kT ,kTkTCd Cdp Cdf ,2q%Si N Apq I [w p ' x p ]where Cdp (VAB ) A, and Cdf (VAB ) D gd ( d2 (& b ' VAB )kT2De BJT (in FAR)qqIgq ICgm " o IBS e qVBE kT [1 #VCE ] C ,g% m kTkT"o" o kT&I )go " o IBS [e qVBE kT 1] # # IC ( or C VA *'!w B2C% gm , b B-E depletion cap. with , b ,2De p' xp]2DeCµ : B-C depletion cap.MOSFET (strong inversion; in saturation, no velocity saturation)gm K [VGS " VT (VBS )] [1 #VDS ] !with ( d[w"go K2[VGS " VT (VBS )] # # ID2gmb gm 2K ID2K ID%ID (' or *VA )&with , "-VT-v BS Q1*Cox.SiqN Aq/ p " VBS2*Cgs W L Cox,Csb ,Cgb ,Cdb : depletion capacitances3**Cgd W Cgd, where Cgdis the G-D fringing and overlap capacitance per unit gate length (parasitic) !MOSFET (strong inversion; in saturation with full velocity saturation)*gm W ssat Cox,go " ID *oxCgs W L C ,ID,VAgmb # gmwith # %&VT&v BS Q1*Cox'SiqN Aq( p % VBSCsb ,Cgb ,Cdb : depletion capacitances**Cgd W Cgd, where Cgdis the G-D fringing and overlap capacitance per unit gate length (parasitic) !MOSFET (operated sub-threshold; in forward active region; only valid for vbs 0)gm q ID,n kT#Cgs W L Coxgo " ID 1 IDVA#22Cox(VGS VFB ) ,%SiqN ACdb :drain region depletion capacitance**Cgd W Cgd, where Cgdis the G-D fringing and overlap capacitance per unit gate length (parasitic)!2
7Single transistor analog circuit building block stagesVoltagegain, AvBIPOLARCurrentgain, Ai gl"[go gl ]gm# "gm rl' )([ go gl ]gmCommon base# gm rl' )([ go gl ][gm g% ]Emitter follower#1[gm g% go gl ]rEmitter degeneracy#" lRF[g " GF ] # "g RShunt feedback" mm F[go GF ]Common emitter"Common source"[gm go gl ]Source degeneracy(series feedback)Shunt feedback*""r%[ 1]# [ 1] rort r%[ 1]# # r% [ 1] RF# roglGF1&1 )ro RF ( ' go GF *"g% GF [1" Av ]Currentgain, AiInputresistance, R i##*1*1rlRF[gm " GF ][go GF ]#r% [ 1] rl'gm "gm rl' )([ go gl ][gm ]Source followerr%Outputresistance, R o& 1)ro ( ' go * gl# [go gl ]* [ gm gmb ] rl'Common gateInputresistance, R i#1Voltagegain, AvMOSFET!Note: gl gsl gel,; gl’ go gl* "gm RF"*1[ gm gmb ]Outputresistance, R o 1'ro & )% go ( [ g gmb go ] .* ro ,1 m/gt011*[gm go gl ] gm####* roglGF1GF [1" Av ] '1ro RF & )% [ go GF ] (OCTC/SCTC Methods for Estimating Amplifier Bandwidth!-1OCTC estimate of " HI:!" HI-1&)&) 1# (% [" i ] (% RiCi ' i*' i*with Ri defined as the equivalent resistance in parallel with Ci with all other parasiticdevice capacitors (Cπ's, Cµ's, Cgs's, Cgd's, etc.) open circuited.SCTC estimate of " LO:" LO # " [ R C ]jjj%1jjwith Rj defined as the equivalent resistance in parallel with Cj with all other baisingand coupling capacitors (CΙ's, CO's, CE's, CS's, etc.) short circuited.!
8Difference- and Common-mode signalsGiven two signals, v1 and v2, we can decompose them into two new signals, one (vC)that is common to both v1 and v2, and the other (vD) that makes an equal, but oppositepolarity contribution to v1 and v2:v D " v1 # v 2andvC "[v1 v 2 ]2 %v1 vC Short circuit current gain unity gain frequency, fT!(gm Cgs 3µCh (VGS VT ) 2L2 3sCh 2L***"t # )gm Cgs W ssat CoxW LCox ssat L*2 gm (C% Cµ ) ; limI c &' gm (C% Cµ ) # 2Dmin,B w B[]vD2andv1 vC #vD2MOSFET, no vel. sat.,*1MOSFET, w. vel. sat.- / tr*BJT, large I C.!Revised 12/9/09
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Dec 09, 2009 · 1 6.012 Microelectronic Devices and Circuits Formula Sheet for the Final Exam, Fall 2009 Parameter Values: Periodic Table: ! q 1.6x10"19Coul o "8.854x10
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