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MPIC16F84AData Sheet18-pin Enhanced FLASH/EEPROM8-bit Microcontroller 2001 Microchip Technology Inc.DS35007B

Note the following details of the code protection feature on PICmicro MCUs. The PICmicro family meets the specifications contained in the Microchip Data Sheet.Microchip believes that its family of PICmicro microcontrollers is one of the most secure products of its kind on the market today,when used in the intended manner and under normal conditions.There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the PICmicro microcontroller in a manner outside the operating specifications contained in the data sheet.The person doing so may be engaged in theft of intellectual property.Microchip is willing to work with the customer who is concerned about the integrity of their code.Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does notmean that we are guaranteeing the product as “unbreakable”.Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features ofour product.If you have any further questions about this matter, please contact the local sales office nearest to you.Information contained in this publication regarding deviceapplications and the like is intended through suggestion onlyand may be superseded by updates. It is your responsibility toensure that your application meets with your specifications.No representation or warranty is given and no liability isassumed by Microchip Technology Incorporated with respectto the accuracy or use of such information, or infringement ofpatents or other intellectual property rights arising from suchuse or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except withexpress written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual propertyrights.TrademarksThe Microchip name and logo, the Microchip logo, PIC, PICmicro,PICMASTER, PICSTART, PRO MATE, KEELOQ, SEEVAL,MPLAB and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in theU.S.A. and other countries.Total Endurance, ICSP, In-Circuit Serial Programming, FilterLab, MXDEV, microID, FlexROM, fuzzyLAB, MPASM,MPLINK, MPLIB, PICC, PICDEM, PICDEM.net, ICEPIC,Migratable Memory, FanSense, ECONOMONITOR, SelectMode and microPort are trademarks of Microchip TechnologyIncorporated in the U.S.A.Serialized Quick Term Programming (SQTP) is a service markof Microchip Technology Incorporated in the U.S.A.All other trademarks mentioned herein are property of theirrespective companies. 2001, Microchip Technology Incorporated, Printed in theU.S.A., All Rights Reserved.Printed on recycled paper.Microchip received QS-9000 quality systemcertification for its worldwide headquarters,design and wafer fabrication facilities inChandler and Tempe, Arizona in July 1999. TheCompany’s quality system processes andprocedures are QS-9000 compliant for itsPICmicro 8-bit MCUs, KEELOQ code hoppingdevices, Serial EEPROMs and microperipheralproducts. In addition, Microchip’s qualitysystem for the design and manufacture ofdevelopment systems is ISO 9001 certified.DS35007B - page ii 2001 Microchip Technology Inc.

MPIC16F84A18-pin Enhanced FLASH/EEPROM 8-Bit MicrocontrollerHigh Performance RISC CPU Features: 13 I/O pins with individual direction control High current sink/source for direct LED drive- 25 mA sink max. per pin- 25 mA source max. per pin TMR0: 8-bit timer/counter with 8-bitprogrammable prescalerSpecial Microcontroller Features: 10,000 erase/write cycles Enhanced FLASHProgram memory typical 10,000,000 typical erase/write cycles EEPROMData memory typical EEPROM Data Retention 40 years In-Circuit Serial Programming (ICSP ) - viatwo pins Power-on Reset (POR), Power-up Timer (PWRT),Oscillator Start-up Timer (OST) Watchdog Timer (WDT) with its own On-Chip RCOscillator for reliable operation Code protection Power saving SLEEP mode Selectable oscillator options 2001 Microchip Technology Inc.RA2 0RB4RA2 RB5RB31011RB4SSOP5PIC16F84APeripheral Features:PDIP, SOICPIC16F84A Only 35 single word instructions to learn All instructions single-cycle except for programbranches which are two-cycle Operating speed: DC - 20 MHz clock inputDC - 200 ns instruction cycle 1024 words of program memory 68 bytes of Data RAM 64 bytes of Data EEPROM 14-bit wide instruction words 8-bit wide data bytes 15 Special Function Hardware registers Eight-level deep hardware stack Direct, indirect and relative addressing modes Four interrupt sources:- External RB0/INT pin- TMR0 timer overflow- PORTB 7:4 interrupt-on-change- Data EEPROM write completePin DiagramsCMOS Enhanced FLASH/EEPROMTechnology: Low power, high speed technology Fully static design Wide operating voltage range:- Commercial: 2.0V to 5.5V- Industrial:2.0V to 5.5V Low power consumption:- 2 mA typical @ 5V, 4 MHz- 15 µA typical @ 2V, 32 kHz- 0.5 µA typical standby current @ 2VDS35007B-page 1

PIC16F84ATable of Contents1.0 Device Overview . 32.0 Memory Organization . 53.0 Data EEPROM Memory . 134.0 I/O Ports . 155.0 Timer0 Module . 196.0 Special Features of the CPU . 217.0 Instruction Set Summary . 358.0 Development Support. 439.0 Electrical Characteristics . 4910.0 DC/AC Characteristic Graphs . 6111.0 Packaging Information. 71Appendix A: Revision History . 75Appendix B: Conversion Considerations. 76Appendix C: Migration from Baseline to Mid-Range Devices . 78Index . 79On-Line Support. 83Reader Response . 84PIC16F84A Product Identification System . 85TO OUR VALUED CUSTOMERSIt is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchipproducts. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined andenhanced as new volumes and updates are introduced.If you have any questions or comments regarding this publication, please contact the Marketing Communications Department viaE-mail at docerrors@mail.microchip.com or fax the Reader Response Form in the back of this data sheet to (480) 792-4150.We welcome your feedback.Most Current Data SheetTo obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:http://www.microchip.comYou can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000).ErrataAn errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for currentdevices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revisionof silicon and revision of document to which it applies.To determine if an errata sheet exists for a particular device, please check with one of the following: Microchip’s Worldwide Web site; http://www.microchip.com Your local Microchip sales office (see last page) The Microchip Corporate Literature Center; U.S. FAX: (480) 792-7277When contacting a sales office or the literature center, please specify which device, revision of silicon and data sheet (include literature number) you are using.Customer Notification SystemRegister on our web site at www.microchip.com/cn to receive the most current information on all of our products.DS35007B-page 2 2001 Microchip Technology Inc.

PIC16F84A1.0DEVICE OVERVIEWThe program memory contains 1K words, which translates to 1024 instructions, since each 14-bit programmemory word is the same width as each device instruction. The data memory (RAM) contains 68 bytes. DataEEPROM is 64 bytes.This document contains device specific information forthe operation of the PIC16F84A device. Additionalinformation may be found in the PICmicro MidRange Reference Manual, (DS33023), which may bedownloaded from the Microchip website. The Reference Manual should be considered a complementarydocument to this data sheet, and is highly recommended reading for a better understanding of thedevice architecture and operation of the peripheralmodules.There are also 13 I/O pins that are user-configured ona pin-to-pin basis. Some pins are multiplexed with otherdevice functions. These functions include: External interrupt Change on PORTB interrupt Timer0 clock inputThe PIC16F84A belongs to the mid-range family of thePICmicro microcontroller devices. A block diagram ofthe device is shown in Figure 1-1.FIGURE 1-1:Table 1-1 details the pinout of the device with descriptions and details for each pin.PIC16F84A BLOCK DIAGRAMData Bus138Program CounterEEPROM Data MemoryFLASHProgramMemory8 Level Stack(13-bit)1K x 14ProgramBus14RAMFile Registers68 x 87EEDATARAM AddrEEPROMData Memory64 x 8EEADRAddr MuxInstruction Register7Direct Addr5TMR0IndirectAddrFSR regRA4/T0CKISTATUS reg8MUXPower-upTimerInstructionDecode &ControlOscillatorStart-up nI/O PortsRA3:RA0W regRB7:RB1RB0/INTOSC2/CLKOUTOSC1/CLKINMCLR 2001 Microchip Technology Inc.VDD, VSSDS35007B-page 3

PIC16F84ATABLE 1-1:PIC16F84A PINOUT N161618IOSC2/CLKOUT151519O—Oscillator crystal output. Connects to crystal orresonator in Crystal Oscillator mode. In RC mode,OSC2 pin outputs CLKOUT, which has 1/4 thefrequency of OSC1 and denotes the instructioncycle rate.MCLR444I/PSTMaster Clear (Reset) input/programming voltageinput. This pin is an active low RESET to the device.Pin NameBufferTypeDescriptionST/CMOS(3) Oscillator crystal input/external clock source input.PORTA is a bi-directional I/O 222I/OTTLRA4/T0CKI333I/OSTCan also be selected to be the clock input to theTMR0 timer/counter. Output is open drain type.PORTB is a bi-directional I/O port. PORTB can besoftware programmed for internal weak pull-up onall INT can also be selected as an externalinterrupt pin.Interrupt-on-change pin.Interrupt-on-change pin.(2)RB6121213I/OTTL/STInterrupt-on-change pin.Serial programming clock.RB7131314I/OTTL/ST(2)Interrupt-on-change pin.Serial programming data.VSS555,6P—Ground reference for logic and I/O pins.VDD141415,16P—Positive supply for logic and I/O pins.Legend: I inputO OutputI/O Input/OutputP Power— Not usedTTL TTL inputST Schmitt Trigger inputNote 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.3: This buffer is a Schmitt Trigger input when configured in RC oscillator mode and a CMOS input otherwise.DS35007B-page 4 2001 Microchip Technology Inc.

PIC16F84AMEMORY ORGANIZATIONThere are two memory blocks in the PIC16F84A.These are the program memory and the data memory.Each block has its own bus, so that access to eachblock can occur during the same oscillator cycle.The data memory can further be broken down into thegeneral purpose RAM and the Special FunctionRegisters (SFRs). The operation of the SFRs thatcontrol the “core” are described here. The SFRs usedto control the peripheral modules are described in thesection discussing each individual peripheral module.The data memory area also contains the dataEEPROM memory. This memory is not directly mappedinto the data memory, but is indirectly mapped. That is,an indirect address pointer specifies the address of thedata EEPROM memory to read/write. The 64 bytes ofdata EEPROM memory have the address range0h-3Fh. More details on the EEPROM memory can befound in Section 3.0.FIGURE 2-1:PROGRAM MEMORY MAPAND STACK - PIC16F84APC 12:0 13CALL, RETURNRETFIE, RETLWStack Level 1 Stack Level 8RESET Vector0000hPeripheral Interrupt Vector0004hUser MemorySpace2.0Additional information on device memory may be foundin the PICmicro Mid-Range Reference Manual,(DS33023).3FFh2.1Program Memory OrganizationThe PIC16FXX has a 13-bit program counter capableof addressing an 8K x 14 program memory space. Forthe PIC16F84A, the first 1K x 14 (0000h-03FFh) arephysically implemented (Figure 2-1). Accessing a location above the physically implemented address willcause a wraparound. For example, for locations 20h,420h, 820h, C20h, 1020h, 1420h, 1820h, and 1C20h,the instruction will be the same.1FFFhThe RESET vector is at 0000h and the interrupt vectoris at 0004h. 2001 Microchip Technology Inc.DS35007B-page 5

PIC16F84A2.2Data Memory OrganizationThe data memory is partitioned into two areas. The firstis the Special Function Registers (SFR) area, while thesecond is the General Purpose Registers (GPR) area.The SFRs control the operation of the device.Portions of data memory are banked. This is for boththe SFR area and the GPR area. The GPR area isbanked to allow greater than 116 bytes of generalpurpose RAM. The banked areas of the SFR are for theregisters that control the peripheral functions. Bankingrequires the use of control bits for bank selection.These control bits are located in the STATUS Register.Figure 2-2 shows the data memory map organization.Instructions MOVWF and MOVF can move values fromthe W register to any location in the register file (“F”),and vice-versa.The entire data memory can be accessed eitherdirectly using the absolute address of each register fileor indirectly through the File Select Register (FSR)(Section 2.5). Indirect addressing uses the presentvalue of the RP0 bit for access into the banked areas ofdata memory.Data memory is partitioned into two banks whichcontain the general purpose registers and the specialfunction registers. Bank 0 is selected by clearing theRP0 bit (STATUS 5 ). Setting the RP0 bit selects Bank1. Each Bank extends up to 7Fh (128 bytes). The firsttwelve locations of each Bank are reserved for theSpecial Function Registers. The remainder are General Purpose Registers, implemented as static RAM.2.2.1FIGURE 2-2:REGISTER FILE MAP PIC16F84AFile AddressFile Address00hIndirect addr.(1)Indirect addr.(1)80h01hTMR0OPTION AM)Mapped(accesses)in Bank 04Fh50hCFhD0hGENERAL PURPOSE REGISTERFILEEach General Purpose Register (GPR) is 8-bits wideand is accessed either directly or indirectly through theFSR (Section 2.5).The GPR addresses in Bank 1 are mapped toaddresses in Bank 0. As an example, addressing location 0Ch or 8Ch will access the same GPR.DS35007B-page 67FhFFhBank 0Bank 1Unimplemented data memory location, read as ’0’.Note 1: Not a physical register. 2001 Microchip Technology Inc.

PIC16F84A2.3Special Function RegistersThe special function registers can be classified into twosets, core and peripheral. Those associated with thecore functions are described in this section. Thoserelated to the operation of the peripheral features aredescribed in the section for that specific feature.The Special Function Registers (Figure 2-2 andTable 2-1) are used by the CPU and Peripheralfunctions to control the device operation. Theseregisters are static RAM.TABLE 2-1:AddrSPECIAL FUNCTION REGISTER FILE SUMMARYNameBit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0Value onPower-onRESETDetailson pageBank 000hINDFUses contents of FSR to address Data Memory (not a physical register)---- ----1101hTMR08-bit Real-Time Clock/Counterxxxx xxxx2002hPCLLow Order 8 bits of the Program Counter (PC)0000 RP0TOPDZDCCIndirect Data Memory Address Pointer 007h—08hEEDATAEEPROM Data Register09hEEADREEPROM Address e Buffer for upper 5 bits of the PCINTERBIET0IF16RB0/INT xxxx xxxx18(1)INTF811---x xxxxUnimplemented location, read as '0'0Ah0001 1xxxxxxx xxxxRBIF——xxxx xxxx13,14xxxx xxxx13,14---0 0000110000 000x10---- ----111111 111190000 0000110001 1xxx8Bank 180hINDF81hOPTION REG82hPCL83hUses Contents of FSR to address Data Memory (not a physical 1PS0PDZDCCLow order 8 bits of Program Counter (PC)STATUS85hRBPU(2)IRPRP1RP0TOIndirect data memory address pointer 0———PORTA Data Direction RegisterPORTB Data Direction Register87h—88hEECON189hEECON2Unimplemented location, read as '0'———EEIFWRERRWRENWRRDEEPROM Control Register 2 (not a physical Write buffer for upper 5 bits of the PCINTERBIET0IFINTFRBIFxxxx xxxx11---1 1111161111 111118——---0 x00013---- ----14---0 0000110000 000x

Title: PIC16F84A Data Sheet Author: Microchip Technology Subject: 18-Pin Enhanced FLASH/EEPROM 8-Bit MCU Keywords: Enhanced FLASH, EEPROM Created Date

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