Sequential Digital Design Laboratory Manual Experiment #5 .
The Islamic University of GazaEngineering FacultyDepartment of Computer EngineeringSpring 2018ECOM 2022Khaleel I. ShaheenSequential Digital DesignLaboratory ManualExperiment #5Sequential Logic Circuits Design, Contd
Objectives To become familiar with sequential circuits design process. To implement and observe the operation of different sequential circuits.Theoretical BackgroundThe procedure for designing synchronous sequential circuits can be summarized by a list ofrecommended steps:1. Understand the verbal description of the problem and create a state diagram and/or astate table. Note that the states may have only symbolic names at this point.2. Reduce the number of states, if possible (state reduction). This may yield a circuit withfewer flip-flops.3. Perform state assignment which means assigning binary codes to the symbolic statenames.4. Obtain the binary-coded state table.5. Select a flip-flop type (e.g., DFF, TFF, JKFF, or some combination thereof ).6. Derive the simplified flip-flop input equations and output equations.7. Draw the logic diagram.Example 1A vending machine dispenses a package of gum which costs 15 cents. The machine has a singleslot that accepts nickels and dimes only and a sensor indicates the type of coin deposited.Make a controller that sends a signal to a chute release once enough change has beendeposited. Note that the machine does not give change or credits.Solution:Getting from the verbal problem description to a state diagram and/or a state table is likelythe hardest part of the design procedure.We can illustrate the verbal problem description as a block diagram.2
Our controller has two inputs, n and d, to indicate the coin deposited. It also has a clock and areset input. It produces one output, release, once enough change has been deposited.We can make some observations about the problem: Once 15 or more cents has been deposited we assert the release signal so the gum isdispensed. When a nickel is deposited, n is set to 1. When a dime is deposited, d is set to 1. Inputs n and d are both 0 when no coin deposited. Both n and d are never set to 1 simultaneously.We need to detect sequences of deposited nickels and dimes that add up to 15 cents.3
It then makes sense to define a state and the amount of money deposited so far. We can thendraw a state diagram.Note that the states are symbolic (e.g., “S0” represents “0 cents deposited so far,” “S1”represents “5 cents deposited so far”, “S2” represents “10 cents deposited so far”, and “S3”represents 15 cents deposited”).From the state diagram, we can write the state table immediately.4
Presently, our states have symbolic names (S0, S1, etc.) and we need to encode them as bitstrings.In our example, we have 4 states, so we need a minimum of 2 bits to encode the states (andtherefore a minimum of 2 flip-flops).With binary codes assigned, we can redo our state table with binary values instead of symbolicnames:Need to select a type of flip-flop to serve as the storage element for the state information andto hold the current state information.We have different possibilities, including DFF, TFF and JKFF.The selection of flip-flop type will influence the complexity of the logic required to generate theflip-flop input equations (i.e., the complexity of the next state logic).5
For our example, we will choose DFF.With DFF, the output Q(t 1) equals input D(t) once the active clock edge arrives.Finally, we can draw our schematic with two DFF, and logic equations to produce the flip-flopinputs and the output equation.6
Example 2Design a counter that counts in 0-1-2-3-4-5 sequence and has a single control input X. WhenX 0 count up by one, when X 1 count up by two. Use T type flip-flop.7
Lab WorkEquipments required Circuit Wizard Simulation Software. KL-31001 trainer kit. Connecting wires and Breadboard. The Datasheets of the IC’s.ImplementationUse Circuit Wizard to design, test and simulate the circuits in the examples above, thenimplement the circuits practically in the laboratory.Good Luck 8
The Islamic University of Gaza Engineering Faculty Department of Computer Engineering Spring 2018 ECOM 2022 Khaleel I. Shaheen Sequential Digital Design Laboratory Manual Experiment #5 Sequential Logic Circuits Design, Contd. 2 Objectives . Implementation Use Circuit Wizard to design, test and simulate the circuits in the examples above, then .
The University of Texas at Arlington Sequential Logic - Intro CSE 2340/2140 – Introduction to Digital Logic Dr. Gergely Záruba The Sequential Circuit Model x 1 Combinational z1 x n zm (a) y y Y Y Combinational logic logic x1 z1 x n z m Combinational logic with n inputs and m switching functions: Sequential logic with n inputs, m outputs, r .
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Design of Synchronous Sequential Circuits The design of a clocked sequential circuit starts from a set of specifications and ends with a logic diagram (Analysis reversed!) Building blocks: flip-flops, combinational logic Need to choose type and number of flip-flops Need to design
Sequential Logic Theoutput ofsequentiallogicdepends not onlyonits input, but alsoonits state which may reflect the history of the input. We form a sequential logic circuit via feedback - feeding state variables computed by a block of combinational logic back to its input. General sequential logic, with asynchronous feedback, can
A rigorous analysis of sequential problems is a large part of this course. Interestingly, most research on sequential prediction (or, onlinelearning) has been algorithmic: given a problem, one would present a method and prove a guarantee for its performance. In this course, we present a thorough study of inherent complexities of sequential .
complexity is assumed to be independent from the sequen-tial scheduling chosen. Furthermore, different types of se-quential schedules such as sequential check-node updat-ing, sequential variable-node updating and sequential mes-sage updating have very similar performance results [9]. Given their similarities, the different types of sequential
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