ADS127L01 Evaluation Module User's Guide (Rev. B)
User's GuideSBAU261B – May 2016 – Revised April 2017ADS127L01EVMFigure 1. ADS127L01EVMThe ADS127L01EVM is an evaluation module that provides hardware and software support for evaluationof the ADS127L01 delta-sigma ADC. The EVM utilizes the TM4C1294NCPDT processor to communicatewith the ADC via SPI and provide communication with a PC over USB interface. The EVM also includes asoftware application that runs on a PC to allow for register manipulation and data collection from the ADC.Table 1. Related DocumentationDeviceLiterature NumberADS127L01SBAS607Microsoft, Windows are registered trademarks of Microsoft Corporation.All other trademarks are the property of their respective owners.SBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackADS127L01EVMCopyright 2016–2017, Texas Instruments Incorporated1
www.ti.com1234567ContentsEVM Overview . 31.1Description . 31.2Requirements . 31.3Software Reference . 31.4Supported Functionality . 3Quick Start . 52.1Default Jumper and Switch Configuration . 52.2Power Connection . 62.3Startup. 6Hardware Reference . 73.1Jumper and Switch Configuration Reference . 73.2Headers, Connectors, and Test Points . 8ADS127L01EVM Software . 104.1Installing the Software . 104.2Connecting to the EVM Hardware . 114.3Using the Software With the ADS127L01EVM . 12ADS127L01EVM Hardware . 155.1Analog Inputs . 155.2Hardware Mode Pins . 165.3ADC Reference . 175.4Power-Down Mode . 175.5Digital Inputs . 175.6Clock Inputs . 18Power Supply Connections . 196.1Powering the EVM . 196.2ADC Power Supplies . 19ADS127L01EVM Bill of Materials, PCB Layout, and Schematic . 207.1Bill of Materials . 207.2PCB Layout . 267.3Schematic . 30List of Figures1ADS127L01EVM . 12ADS127L01EVM Default Jumper and Switch Configuration . 53Delta-Sigma ADC EvaluaTIon Software Installation Instructions . 104.ADS127L01 Device Tab and Register Map .Register Controls for the ADS127L01 .Hardware Controls for the ADS127L01 Mode Pins .Analog Input Connections (Schematic) .Analog Input Connections (PCB).Modifications to Bypass Driver Stage .Hardware Mode Input Controls (Schematic).Hardware Mode Input Controls (PCB) .Reference Input Selection.Debug Header for Logic Analyzer (Schematic) .Debug Header for Logic Analyzer (PCB) .Clock Tree (Schematic) .Clock Tree (PCB) .Top Silkscreen .Top Layer (Positive) .56789101112131415161718192ADS127L01 Device Package Installation 182626SBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackCopyright 2016–2017, Texas Instruments Incorporated
EVM ower (Negative) .Bottom Layer (Positive).Bottom Silkscreen .Bottom Silkscreen (Mirrored) .TM4C Main Schematic .TM4C Miscellaneous and Power Schematic .ADS127L01EVM Digital Header Schematic .ADS127L01EVM USB Power Schematic .ADS127L01EVM External Power Schematic .ADS127L01EVM Clock Tree Schematic .ADS127L01EVM ADC Main Schematic .ADS127L01EVM ADC Input Driver Schematic.ADS127L01EVM ADC Reference Schematic .ADS127L01EVM ADC Power Schematic .Ground (Negative)1EVM 39This user guide describes the operation and use of the ADS127L01 evaluation module (ADS127L01EVM).The ADS127L01 is a 24-Bit, high-speed, wide-bandwidth delta-sigma analog-to-digital converter (ADC) forprecision industrial applications. This platform is intended for evaluating the ADS127L01 performance andfunctionality. The ADS127L01EVM kit includes the ADS127L01EVM, USB mini cable, and supportingsoftware (SW).This document includes a detailed description of the hardware (HW) and software, bill of materials, andschematic for the ADS127L01EVM.Throughout this document, the terms ADS127L01EVM, demonstration kit, evaluation module, and EVMare synonymous with the ADS127L01EVM. Also, the term GUI is synonymous with Delta-Sigma ADCEvaluaTIon Software, core application, and EVM software, and Tiva is synonymous with theTM4C1294NCPDT.1.2Requirements1.2.1Software RequirementsPC with Microsoft Windows 7 or higher operating system.1.2.2Hardware RequirementsPC with available USB connection.1.3Software ReferenceSee the Delta-Sigma ADC EvaluaTIon Software User Manual (SBAU260) for the core softwaredocumentation or navigate to File - About from within the GUI.1.4Supported Functionality1.4.1Supported Hardware Functionality Unipolar 3-V analog supply (AVDD)Unipolar 1.8-V and 3.3-V digital supply (DVDD)External LVDD supplySBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackADS127L01EVMCopyright 2016–2017, Texas Instruments Incorporated3
EVM Overview 1.4.2Fully-differential or single-ended input driverHardware control over device mode pins:– High-resolution (HR), low-power (LP), and very-low-power (VLP) mode– All OSR [1:0] and FILTER[1:0] settingsSPI and frame-sync interface (frame-sync mode requires external processor)Digital header for debug or connection to external processorOn-board ADC clock options (CLK): 16 MHz, 8 MHz, 4 MHzOn-board or external ADC reference voltage (REFN always shorted to GND)Power-down modeSupported Software Functionality 4www.ti.comSoftware control over device mode pins:– High-resolution (HR), low-power (LP), and very-low-power (VLP) mode– All OSR [1:0] and FILTER[1:0] settingsSPI mode onlySPI serial interface commands:– RESET– START– STOP– RDATA– RREG– WREGDoes not support:– Frame-sync master mode or frame-sync slave mode– STATUS word readbackADS127L01EVMSBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackCopyright 2016–2017, Texas Instruments Incorporated
Quick Startwww.ti.com2Quick StartThis section provides a guide to quickly begin using the EVM.2.1Default Jumper and Switch ConfigurationThe EVM should come configured with the settings listed in Table 2 and illustrated in Figure 2.Table 2. Default Settings(1)JumperDefault PositionJP1UninstalledCommentUse on-board processorJP2UninstalledUSB-derived supplies enabledJP31-2AVDD and DVDD derived from regulated USB supplyJP4N/ANot nable on-board crystal oscillator (Y1)CLK 16 MHzADS127L01 powered-onREXT 60.4 kΩJP9InstalledJP10UninstalledInternal LDO used for LVDD supplyJP111-2SwitchDefault PositionS1OpenGPIO input pulled highS2OpenTiva RST pulled highS3HR 1FORMAT 0OSR [1:0] 00FSMODE 0 (1)FILTER [1:0] 01Input amplifier enabled (U30)DVDD 1.8 VCommentHigh-resolution modeSPI modeOSR 32Frame-sync slave mode (1)Wideband 2 filter (transition: 0.4 FDATA to 0.5 FDATA)Ignored when FORMAT 0Figure 2. ADS127L01EVM Default Jumper and Switch ConfigurationSBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackADS127L01EVMCopyright 2016–2017, Texas Instruments Incorporated5
Quick Start2.2www.ti.comPower ConnectionThe EVM is powered via the USB interface with the PC. Connect the EVM to an available USB port topower the board.2.3StartupUse the following steps at startup:1. Install the core application onto your PC.2. Install the ADS127L01 device package onto your PC.3. Ensure all jumpers and switches are configured in the default configuration per Table 2 and Figure 2.4. Connect the EVM to your PC using a USB cable.5. If prompted, install any required drivers.6. Start the software on your PC.NOTE: The EVM has powered on correctly if D4 turns on.6ADS127L01EVMSBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackCopyright 2016–2017, Texas Instruments Incorporated
Hardware Referencewww.ti.com3Hardware Reference3.1Jumper and Switch Configuration ReferenceTable 3 provides all jumper and switch configuration settings for the EVM.Table 3. Hardware Item DescriptionsJumperPositionJP1Select on-board vs. external controller (U1 talledHold on-board Tiva in reset and disable level shifters to allow external digital interfaceUninstalledNormal operation with on-board TivaEnable USB-derived power supplies (U11 EN)InstalledUSB-derived power supplies disabledUninstalledUSB-derived power supplies enabledSelect 5-V supply to derive AVDD 5V and DVDD 3.3V1-2AVDD 5V and DVDD 3.3V derived from regulated USB supply (U12)2-3Not usedPower-down external supplies (U16 EN)InstalledExternal supplies disabledUninstalledExternal supplies enabledDisable on-board crystal oscillator Y1 (CLKEN)InstalledY1 output is disabledUninstalledY1 output is enabledSelect ADS127L01 CLK frequency (CLKSEL)1-216 MHz3-48 MHz5-64 MHzPlace ADS127L01 in Power-Down Mode (RESET/PWDN)InstalledADS127L01 held in Power-Down ModeUninstalledNormal operationSelect REXT pull-down resistor (U26 REXT)1-260.4 kΩ (HR and LP Mode)2-3120 kΩ (VLP Mode)Select source for ADS127L01 LVDD supply (U26 INTLDO)InstalledInternal LDO enabled (LVDD sourced from AVDD)UninstalledInternal LDO disabled (LVDD sourced from external supply connected to TP17)Power-down input driver amplifier (U26 PD)InstalledAmplifier held in power-downUninstalledNormal operationSelect DVDD supply for ADS127L01 (U26 DVDD)1-2DVDD 1.8 V2-3DVDD 3.3 VSwitchPositionDescriptionS1BSL Mode for Device Firmware Update (DFU)S2Closed (on RESET)Total Tiva FLASH erasure (Tiva enumerates as a DFU device on release)Open (on RESET)Normal operationReset on-board Tiva controller (U1 RST)ClosedTiva held in RESETOpenNormal operationSBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackADS127L01EVMCopyright 2016–2017, Texas Instruments Incorporated7
Hardware Referencewww.ti.comTable 3. Hardware Item Descriptions (continued)3.2SwitchPositionS3Hardware Mode inputsDescriptionOpenLogic ‘1’ClosedLogic ‘0’Headers, Connectors, and Test PointsThis section provides details for all of the headers, connectors, and test points on the EVM.3.2.1JTAG Header (not installed)The J2 header is provided for programming the on-board processor with firmware updates or userfirmware. Exercise care when using the JTAG since it is possible to erase the EVM firmware and losecommunication with the EVM software. Table 4 describes the J2 header functions.Table 4. JTAG Header, J2Function3.2.2Signal NamePinProcessor RESET SignalRESET1JTAG test data out signalTDO2JTAG test data in signalTDI3JTAG test mode select signalTMS4JTAG test clock signalTCK5Debug UART receive signalRX6Debug UART transmit signalTX7Analog InputsAnalog input signals can be connected through the SMA connectors (J7 and J9) or through the terminalblock (J8). Table 5 lists the analog input connections.Table 5. Analog Inputs, J7–J9Function3.2.3SMA ConnectorTerminal BlockAnalog input to AINNJ7J8[1]Analog input to AINPJ9J8[2]Test PointsThe test points listed in Table 6 may be used to probe on-board voltage supplies or to connect externalvoltage supplies. See the ADS127L01EVM Hardware section for any required hardware modificationswhen connecting an external supply.Table 6. Test Points, TP17 – TP24FunctionTest PointInput RestrictionsADC Modulator SupplyLVDDTP171.7 V LVDD 1.9 VInput Common-Mode VoltageVOCMTP180.55 V VOCM 1.8 VADC Reference VoltageREFPTP190.5 V VREF 3.0 V2.7 V AVDD 3.6 VADC Analog SupplyAVDDTP20ADC Digital SupplyDVDDTP211.7 V DVDD 3.6 VTP6-10, TP22-24Connect to external source groundSystem Ground8Signal NameGNDADS127L01EVMSBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackCopyright 2016–2017, Texas Instruments Incorporated
Hardware Referencewww.ti.com3.2.4Digital Interface HeaderTable 7 lists the functions and pin numbers for all signals used on the digital interface header.Table 7. Digital Interface Header, J3FunctionProcessor SideGPIO Inputs for ADCHardware Mode PinsADC SidePin Number (1)Pin Number (2)I2C0 SDA12FILTER1I2C0 SCL34FILTER0TIVA 16MHz LT56TIVA 16MHzGPIO 478FSMODEGPIO 3910OSR1GPIO 21112OSR0GPIO 11314FORMATSignal NameSignal NameGPIO 01516HRIOVDD Supply for LevelTranslator (U5)DIG VOLT21718DVDDGPIOI2C1 SDA1920DRDYSPI PortSPI1 MISO/DATA12728MISOSPI1 MOSI/DATA02930MOSISPI1 FS3132CSSPI1 SCLK3334SCLKDIG VOLT33536DVDDIOVDD Supply for LevelTranslator (U7)(1)(2)Odd numbered pins not included are connected to Tiva inputs whose functionality is not used for this EVM. See Figure 27 for connectiondetails.Even numbered pins not included are not connected to the ADS127L01.3.2.5Debug HeaderThe debug header (J6) information is presented in Table 8.Table 8. Debug Header, J6FunctionDigital Signals for Logic Analyzer or External Processor(1)Signal NamePin Number (1)CS1SCLK3DIN5DOUT7DRDY9Pins 2 – 10 (even) are tied to GND.SBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackADS127L01EVMCopyright 2016–2017, Texas Instruments Incorporated9
ADS127L01EVM Softwarewww.ti.com4ADS127L01EVM Software4.1Installing the Software4.1.1Delta-Sigma ADC EvaluaTIon SoftwareDownload the Delta-Sigma EvaluaTIon Software installer from the ADS127L01EVM tool page and save toa known folder. Run the installer and follow the on-screen prompts. Note that future software versions mayshow slightly different screens.Figure 3. Delta-Sigma ADC EvaluaTIon Software Installation Instructions10ADS127L01EVMSBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackCopyright 2016–2017, Texas Instruments Incorporated
ADS127L01EVM Softwarewww.ti.com4.1.2ADS127L01 Device PackageDownload the ADS127L01 Device Package installer from the ADS127L01EVM tool page and save to aknown folder. Run the installer and follow the on-screen prompts. Note that future software versions mayshow slightly different screens.Figure 4. ADS127L01 Device Package Installation Instructions4.2Connecting to the EVM HardwareAfter the Delta-Sigma ADC EvaluaTIon Software and the ADS127L01 Device Package are installed,ensure that all jumpers and switches are in their default positions per Table 2, and then connect thehardware with the provided USB mini cable. Start the Delta-Sigma ADC EvaluaTIon Software. The GUIautomatically detects the connected hardware and displays the device register map under the Main tab asshown in Figure 5.SBAU261B – May 2016 – Revised April 2017Submit Documentation FeedbackADS127L01EVMCopyright 2016–2017, Texas Instruments Incorporated11
ADS127L01EVM Software4.3www.ti.comUsing the Software With the ADS127L01EVMThis section covers the functionality of the ADS127L01 device package only. For more information aboutthe core application, see the Delta-Sigma ADC Eval
This user guide describes the operation and use of the ADS127L01 evaluation module (ADS127L01EVM). The ADS127L01 is a 24-Bit, high-speed, wide-bandwidth delta-sigma analog-to-digital converter (ADC) for
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