Moving Forward With Strategy For Innovation And Success
Global Semiconductor AllianceDRIVING PACKAGING INNOVATIONSEMICONDUCTOR COST REDUCTION STRATEGIESMACRO-ECONOMIC TRENDS IN THE FABLESS INDUSTRYSEMICONDUCTOR INNOVATION IN AN INVESTMENT-CONSTRAINED ECONOMYINNOVATION THROUGH COLLABORATION: GUIDING PRINCIPLE FOR THE 21ST CENTURYMoving Forward with Strategyfor Innovation and SuccessVol.16 No.4 Dec. 2009Published by GSA 60 (U.S.)1
A Powerful Platform for Amazing PerformancePerformance. To get it right, you need a foundry with an Open Innovation Platform and process technologies thatprovides the flexibility to expertly choreograph your success. To get it right, you need TSMC.Whether your designs are built on mainstream or highly advanced processes, TSMC ensures your products achievemaximum value and performance.Product Differentiation. Increased functionality and better system performance drive product value. So you needa foundry partner who keeps your products at their innovative best. TSMC’s robust platform provides the options youneed to increase functionality, maximize system performance and ultimately differentiate your products.Faster Time-to-Market. Early market entry means more product revenue. TSMC’s DFM-driven design initiatives,libraries and IP programs, together with leading EDA suppliers and manufacturing data-driven PDKs, shorten your yieldramp. That gets you to market in a fraction of the time it takes your competition.Investment Optimization. Every design is an investment. Function integration and die size reduction help drive yourmargins. It’s simple, but not easy. We continuously improve our process technologies so you get your designs producedright the first time. Because that’s what it takes to choreograph a technical and business success.Find out how TSMC can drive your most important innovations with a powerful platform to create amazing performance.Visit www.tsmc.comCopyright 2008 Taiwan Semiconductor Manufacturing Company Ltd. All rights reserved. Open Innovation Platform is a trademark of TSMC.
ARTICLESCONTENTS2 Driving Packaging InnovationBob Warren, Director, Packaging Engineering and Assembly Manufacturing, Conexant Systems Inc.ACCELERATE THE6 Semiconductor Cost Reduction StrategiesGROWTH ANDBob Scarborough, Chief Executive Officer, Tensoft Inc.Regis Bescond, Corporate Controller, AmlogicINCREASE THE10 Macro-economic Trends in the Fabless IndustryAnthony Simon, Vice President, Marketing, Zoran Corporation14 Semiconductor Innovation in an Investment-Constrained EconomySteve Z. Szirom, President, InsideChips.com18 Innovation through Collaboration: Guiding Principle for the 21st CenturyKatrien Marent, Corporate Communications Director, Business Development, IMEC22 The Benefits and Architecture of IP Test Program Re-use in an ATE EnvironmentRETURN ONINVESTED CAPITALOF THE GLOBALSEMICONDUCTORINDUSTRY BYFOSTERING A MOREDonald W. Blair, Principal Consultant, Verigy Ltd.26 Design Quality Closure: Enabling Less Iteration at Every Handover in a DesignProcessMichel Tabusse, Ph.D., Chief Executive Officer, Satin IP TechnologiesEFFECTIVE FABLESSECOSYSTEMTHROUGH30 Semiconductor Commoditization: The 250 Billion QuestionSanjay Krishnan, Business Manager, High-Performance Analog Group, Maxim Integrated Products32 Funding for Innovation in Challenging TimesBob Strasser, Partner, Technology Practice, BDO SeidmanCOLLABORATION,INTEGRATION ANDINNOVATION.35 Part 3 of 4: Immigration: Finding the Good in the Bad EconomyIrina Plumlee, Partner, Gardere Wynne Sewell LLP Address theenable industry-widesolutions withinthe supply chain,including intellectualIN EVERY ISSUEproperty (IP),electronic design4 Semiconductor Member Newsautomation8 Foundry Focus(EDA)/design, wafermanufacturing, test12 Back-End Alleyand packaging16 Supply Chain Chronicles20 Global Market Trends for meaningful24 Industry Reflections28 Global InsightsProvide a platformglobal collaboration Identify andarticulate market34 Private Showingopportunities37 Innovator Spotlight Encourageand supportentrepreneurshipINTERESTED IN CONTRIBUTING TO THE GSA FORUM?To contribute an article or submit product or company announcements, contact: Chelsea Boone, Managing Editor,cboone@gsaglobal.org. To advertise, contact: Monica Dominguez, Advertising Executive, mdominguez@gsaglobal.org. Provide memberswith comprehensiveF O R M O R E I N F O R M AT I O N C O N TA C TLisa Tafoya, VP, Global Research, GSA Forum Executive Editor, ltafoya@gsaglobal.org GSA 12400 Coit Road, Suite 650,Dallas, TX 75251 phone 888.322.5195 fax 972.239.2292and unique marketintelligenceM I S S I O N A N D V I S I O N S TAT E M E N Tchallenges and
Driving Packaging InnovationBob Warren, Director, Packaging Engineering and Assembly Manufacturing, Conexant Systems Inc.he number of fabless semiconductor companies has grownat a 20 percent compounded annual growth rate (CAGR)over the last decade. At present, more than eight out of 10semiconductor companies are outsourcing some or all of theirsemiconductor fabrication and assembly. While use of the outsourcedbusiness model has allowed companies to lower costs, specialize andfocus on core competencies, and reduce time-to-market, it has alsocreated challenges for achieving and maintaining technology andproduct alignment. Selection of the right IC assembly and packagingtechnology is important to meet product cost, size, thermal, electrical,reliability and time-to-market requirements. Often, companiesare faced with the dilemma of not having the right technology orcapability available from their existing offshore assembly and test(OSAT) provider.the fastest followers will need about a year to design and qualifytheir products with a new technology, giving the leader the ability tocommand more market share and possibly a higher selling price.TFigure 1. Common Package Technology GapsThe Changing Dynamics for Packaging R&DJust over a decade ago, new package technology was driven largely byvertically integrated original equipment manufacturers (OEMs) andintegrated device manufacturers (IDMs) with their own foundries,assembly manufacturing facilities, and internal research anddevelopment (R&D) teams. The trend of outsourcing manufacturingcontinues today, and many companies have eliminated or drasticallyreduced internal prototyping or manufacturing R&D staff, relyingon existing off-the-shelf technology from assembly subcontractors.Scarce R&D dollars are now spent largely on design, with theexpectation that technology for manufacturing will be availablefrom the subcontractors and will meet current and future productneeds. Unfortunately, package technology has historically lagged ICadvancements and transistor scaling, putting significant constraintson the ability to meet size, cost, electrical and thermal performance(Figure 1). This has created a technology gap that requires marketingand design engineers to make undesired product compromises, suchas eliminating product features to reduce package size, pin counts,interconnect density or power dissipation. Today, packaging canaccount for 25 percent or more of overall chip costs, which is creatinga significant entry barrier for many new products. Innovative packagetechnology is required to keep pace with the rapid scaling of waferprocess technology and allow the full true potential to be realized fornew emerging products.Many companies have leveraged packaging technology as aproduct enabler, while others have leveraged it to differentiate theirproducts. While there are risks associated with being an early adopterof new technology, it can also be a competitive advantage by enablingcompanies to be the first out of the gate with a smaller, cheaper orhigher performing device due to a superior package solution. EvenDriving Innovation through OSAT ProvidersOne of the most effective and efficient ways for a product companyto have the right packaging technology at the right time and at theright cost is to work proactively with OSAT providers, sharing keyattributes and requirements of its future products. Examining details,such as the product application, technology node, process technology,die size, wire or ball count, pin count, device thermal dissipation,electrical requirements, package form factor requirements, productenvironmental conditions (operating ambient temperature, airflow,etc.), assembly and test cost budget, and tester and test configurationrequirements, will help OSAT providers understand whether theirtechnology roadmap can provide the necessary solutions at the righttime for their customers. It is also important to remember that OSATproviders have a limited amount of R&D money and resources, andmust make tough decisions about development priorities, oftenin the absence of frequent and detailed inputs from many of theircustomers. Most are more than happy to spend time to reviewtheir customers’ product roadmaps, share their package technologydevelopment roadmaps, identify any gaps and generate actions plansto address them if the return on their investment is acceptable.2
OSAT providers are often looking for beta customers who arewilling to use their product as the lead qualification vehicle for anew package technology. They generally look for a customer who canfurnish a suitable amount of wafers so they can fully characterize theirprocesses and packages, run component and board-level reliabilitytesting, and develop board-level assembly processes and applicationnotes. The risks for being a beta customer include an increasedlikelihood of encountering manufacturing, yield or quality issuesduring the initial production ramp-up, but the reward is being thefirst to market with a differentiated product that can provide the betacustomer with a competitive edge.Depending on the scope of the new package technology required,there are a number of viable paths that can be taken to get a desiredsolution developed, validated and qualified (Figure 2). In many cases,only an incremental change to a package or assembly process may beneeded to meet a product requirement, as opposed to changing toa more complex, higher cost technology (e.g., transitioning from aconventional wire bonded package to a flip-chip package requiringa more expensive substrate with a stiffener and heat spreader.) Forexample, a conventional wire bonded package may not have thethermal performance needed for a device, and may be just shortof meeting the thermal dissipation requirement, even when all theknown solutions are designed into the package. The engineer mayhave worked with the OSAT provider and done everything possible tospread the heat away from the device, such as using a larger body size,increasing the number of substrate layers, increasing the number ofthermal vias and thermal balls, using thicker copper planes, openingthe solder mask under the device, using a die attach epoxy with amore thermally conductive filler and using a drop-in heat spreader. Ifthe package still cannot meet the product requirements, and there areno other known qualified solutions available (within the cost budgetfor that product), undeveloped and unqualified alternatives may thenbe looked at (e.g., a higher thermal conductivity mold compoundand filled vias). This is the stage where it helps to be aware of the latestR&D efforts in the industry. Microelectronic material and equipmentsuppliers are always working on next-generation package materials,substrates, processes and equipment, and are generally willing tomeet with end users to show them their technology roadmaps, thelatest development status and get feedback to see whether they areon the right track or not. If there is interest in the technology beingdeveloped, then the next step is to bring the developing party and theOSAT provider together to determine whether it can be integratedinto an existing package (e.g., using a new mold compound or anew substrate technology) and be made into a qualified productionsolution.There are also a number of opportunities where product companiescan work closely with OSAT providers to develop technology tosignificantly lower their existing packaging costs. For example, goldwire can be replaced with copper wire to lower packaging costsby 10-25 percent, depending on package type and wire volume.Although copper wire bonding has been in production for manyyears, it is not a drop-in replacement for gold wire on devices usingthe latest wafer nodes and process technologies, and a significantamount of process development and characterization are required toensure acceptable manufacturing yields and reliability performance.Even though the effort to develop and qualify copper wire bondingis not trivial, the return on investment can be very significant forcost-sensitive products or products running in high volume. Theproduct company can help drive the development with the OSATprovider by providing wafers for process development, performingelectrical characterization testing, and performing reliability testingand sharing the data (including any failure analysis results) with theOSAT provider.Figure 2. Package Technology R&D OptionsContracted and Collaborative R&D OptionsFor solutions that are more than incremental changes to existingtechnologies, the development path may be a bit more complex,sometimes involving three or more development partners. Forinstance, developing a novel three-dimensional (3D) stackedsilicon package may require working with a through-silicon via(TSV) foundry partner, a silicon foundry, a wafer-to-wafer bondingequipment manufacturer, a finite element analysis (FEA) simulationexpert, and an OSAT provider for the final package assembly andtesting. This requires the product company to carefully facilitate andintegrate the activities of all the parties, including ensuring that thematerials and process work done by one subcontractor is compatiblewith the next process downstream. For smaller companies, managingthis kind of development directly can be overwhelming, requiringa significant amount of interdisciplinary expertise and concurrentengineering. This is where consortiums and research institutes canprovide significant value. For example, these organizations may offercompany-sponsored or collaborative R&D, including technology andproduct development, modeling and simulation, proof-of-concept,reliability testing, failure analysis, prototype development, smallvolume production, supply chain connectivity, technology transfer,and licensing to a production partner or production facility.The consortium approach provides effective utilization of resourcesby serving multiple industry partners at the same time. The benefit ofworking with a consortium is that emerging technology developmentcan generally be done in a shorter time and at a lower cost, and thereis generally a good deal of knowledge sharing among members.Many of the consortiums involve partnering IC companies, alongwith hands-on, graduate-level students and post-doctoral researcherswho are trained to operate fabrication and assembly equipment. Theuniversity or institute will often have a state-of-the-art cleanroomfacility outfitted with manufacturing and analytical tools provided by3See Packaging page 43
Actel (NASDAQ: ACTL) released itsnew firmware catalog which streamlinesthe locating and generating of firmwarethat is compatible with intellectualproperty (IP) cores used in Actelembedded processor-based, low-powerIGLOO ; ProASIC 3; or Fusion mixedsignal field-programmable gate array(FPGA) designs.Altera (NASDAQ: ALTR) startedshipping volume production of its 40nmStratix IV GX EP4SGX230 FPGAs.The Stratix IV family offers the highestdensity and highest performance FPGAsavailable today, and is used in a varietyof end customers’ high-speed backplaneand cabling interfaces, chip-to-chipinterconnects and protocol-bridgingapplications.Bay Microsystems was recognizedas a New California 100 InnovativeBusiness by Golden Capital Networkand Hamilton Lane. New California100 businesses are some of the mostinnovative companies in the staterepresenting California’s commitmentto innovation, entrepreneurship andworkforce competitiveness.Broadcom (NASDAQ: BRCM)collaborated with SoftAtHome to developa solution for hybrid, satellite and Internetprotocol (IP) set-top boxes (STBs)accelerating time-to-market for advancedvideo and TV services. Broadcom andSoftAtHome have partnered to createa customized software interface whichleverages Broadcom’s high-performancesilicon hardware and is running on arange of Broadcom high-definition (HD)STB solutions, including the BCM7405and BCM7325.CEITEC S.A. opened Latin America’sfirst IC design center. The company willadd 60 engineers to its ranks who willdesign radio-frequency identification(RFID), digital media and wirelesscommunication chips for its fabricationfacility now ramping up for production.Conexant Systems (NASDAQ:CNXT) was ranked 194 in the 2009InformationWeek 500, an annual listingof the nation’s most innovative usersof business technology. Conexant wasrecognized for its cash management andforecasting system which was deployedin March 2009. The proprietary, patentpending system has enabled the companyto significantly improve cash forecastingvisibility and maximize cash flexibility.WAC Lighting selected CypressSemiconductor’s (NYSE: CY) EZColor high-brightness light-emittingdiode (HBLED) controllers to controlthe LEDs in its new color-changing tapelight system. Based on Cypress’ flexibleprogrammable system-on-chip (PSOC),the EZ-Color solution enabled WACLighting designers to quickly introduce itsenergy-efficient INVISILED PALETTEsystem to the display and accent lightingmarkets.Dialog Semiconductor (FWB:DLG) and Harman Becker collaboratedto develop the DA6001 powermanagement IC as a companion devicefor the Intel Atom processor. TheDA6001 will be used in the HarmanInternational automotive division’s invehicle infotainment command centers,with Dialog having already shipped thefirst engineering samples to the company.DSPGroup(NASDAQ:DSPG) and Ikanos Communicationsdemonstrated a reference design fora multi-service residential gatewaywith fully integrated digital enhancedcordless telecommunications (DECT)capabilities.TheDECT/CordlessAdvanced Technology (CAT)-iq modulefrom DSP Group combined with Ikanos’Fusiv Vx180 integrated gateway processoris designed to enable network equipmentmanufacturers to quickly bring tomarket a platform that supports cordlesstelephony as part of a residential gatewayoffering.Inverto Technologies introducedthe latest in its family of Black ns’ (NASDAQ: ENTR)RF5219 channel stacking switch (CSS)silicon technology. The Inverto DualSatellite Cascadable Unicable Switchdelivers the lowest cost, on for multiple satellite and tunerapplications.Exar (NASDAQ: EXAR) entered thedigital power market with two PowerXRsystem-level solutions comprised of highlyintegrated field-programmable powerregulator ICs that change the designmindset for creating power solutions.These two ICs provide programmabledigital power at the same cost as analogwith many additional power managementfeatures.Fresco Microchip partnered withEntropic Communications to deliverhigh-performance, low-cost siliconbased hybrid receiver solutions for nextgeneration televisions by combining thesuperior performance of Fresco’s FM1150analog demodulator with Entropic’sEN4020 silicon tuner. Together, Frescoand Entropic will deliver a highlyintegrated solution that offers significantsystem cost savings and eliminates thetraditional tradeoffs associated withdiscrete tuner and analog nounced the availability for samplingof the GX6261, a 40Gbs differentialquadrature phase shift keying (DQPSK)modulator driver in surface-mountedtechnology (SMT) for metro and longhaul optical transponders. Because ofits spectral efficiency and tolerance tovarious dispersion mechanisms over longreaches, DQPSK modulation is slated tobecome the dominant format as 40G linecards become common i
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