1 Power Integrity In System Design Skipper

Power Integrity inSystem DesignDesign. Build. Ship. Service.CAE / Design SimulationSkipper Liang5/20/20081

Agenda Introduction Power Integrity Concept DC Analysis for Power Integrity AC Analysis for Power Integrity1.Observe from Frequency Domain2.Observe from Time Domain Summary Q&A2

Introduction Power Integrity Concept DC Analysis for Power Integrity AC Analysis for Power Integrity1.Observe from Frequency Domain2.Observe from Time Domain Summary Q&A3

.Server LinkCardEnterpriseStorageSystemService. Flextronics International Ltd (NASDAQ: FLEX) is the world No.1EMS provider from yr2001 to yr2004. Flextronics began its design service at the end of yr2006. Numbers of Sigrity Tool Sets help us to increase ourcustomer’s competitiveness4

Introduction Power Integrity Concept DC Analysis for Power Integrity AC Analysis for Power Integrity1.Observe from Frequency Domain2.Observe from Time Domain Summary Q&A5

Power Integrity ConceptVRMPower PlaneGND PlaneSinking DeviceSimplified as:Resistor for the metalloss of currentdistribution pathVRMSinking DevicePlate Capacitor formedby the Power Planeand GND plane6

Power Integrity ConceptVRMCause the Voltage levelshifted from the ideal levelWe need DC Analysis.Cause the Voltage levelvariation from the ideallevel during the currenttransientWe need AC Analysis.Total Effect7

Power Integrity ConceptEffect to Signal Integrity (Besides the coupling between planes and Traces):PWRONInput LowOutput HighThe voltage variation whichhappened at PWR willappear at signal output.Output LowThe voltage variation whichhappened at GND willappear at signal output.OFFGNDPWROFFInput HighONGND8

Power Integrity ConceptHow to lowering the impedance contributed by power/ground plane pair?Capacitor Parallel Connected (De-Coupling Capacitor)1Z( f )) Z ( f ) //(j 2πfCj 2πfC Z ( f ) 1This can be viewed as:Sinking Current Sinking Current DCSinking Current ACGND PlaneA Capacitor will be treated as a short path by the AC part.A Capacitor will be treated as an open path by the DC part.9

Power Integrity ConceptIf the analysis result is fail, how’s the impact?DC AnalysisAC Analysis1. Add Layers1. Add Capacitors2. Add trace Width3. Location of VRM and Sense4. VIA numbers and locationChange the geometry ofthe Power DistributionSystemModify the SchematicsModify the location ofcapacitors2. Modify the layers:i.Floor planningii.Shape geometryChange the geometry ofthe Power DistributionSystemTo speed up the design procedure and reduce the frequency of modifying the PDS’s geometry,we will frozen the PDS’s geometry after the DC Analysis and simply modify the capacitor’s size,number and location of capacitors, that is:DC AnalysisChange the geometry ofthe Power DistributionSystemModify the SchematicsAC AnalysisModify the location ofcapacitors10

Introduction Power Integrity Concept DC Analysis for Power Integrity AC Analysis for Power Integrity1.Observe from Frequency Domain2.Observe from Time Domain Summary Q&A11

DC Analysis for Power IntegrityVoltage Drop:i.Power DC helps us to track downthe voltage distribution along thePower Delivery Path.ii.Power DC helps us to generateclear table to judge the simulationresult Pass or Fail.iii.The whole procedure is easy andfast.12

DC Analysis for Power IntegrityCurrent Density:i.Power DC helps us to find out ifthere’s any critical location whereexist a large amount of current.ii.By the capability of Power DC toanalyze the current densitydistribution, we can find out ifthere’s any redundant moat on theplane.iii.The whole procedure is easy andfast.13

Introduction Power Integrity Concept DC Analysis for Power Integrity AC Analysis for Power Integrity1.Observe from Frequency Domain2.Observe from Time Domain Summary Q&A14

Introduction Power Integrity Concept DC Analysis for Power Integrity AC Analysis for Power Integrity1.Observe from Frequency Domain2.Observe from Time Domain Summary Q&A15

Observe from frequency domainImpedance Plot File:i.Power SI helps us to get more information such as Sparameter than only the impedance.ii.The whole procedure is easy and fast.16

Observe from frequency domainImpedance Plot equency(Hz)i.Power SI gives us morefreedom to choice solutions not only to suppress theimpedance against certainfrequency where theimpedance exceed the targetimpedance.ii.For Example, we can seethere’s a resonant frequencyat 400KHz. While choosing220uF as the solution, whichis against 300KHz, it onlytakes 5 capacitor to lower theimpedance under the target.iii.While choosing capacitorswhich is against 400KHz asthe solution, it will takes 8capacitor to lower theimpedance under the target.TargetImpedanceFrequency(Hz)17

Observe from frequency domainImpedance Spatial Distribution:i.Power SI helps us to find out the bestlocation to add capacitors where theimpedance is largest.ii.Power SI’s Spatial mode allows us tocustomized the current sink as GaussianPulse or any other waveforms described inPWL to ignore the effect above certainfrequency range.iii.Of course, Power SI’s Spatial mode alsoallows us to set the current sink as an unitimpulse, what we do in Extraction mode toextract the S-parameter and Z-parameter.iv.The whole procedure is easy and fast.18

Observe from frequency domainThe Spatial Curve:i.Spatial Mode still helps us to observe the voltage plot along thefrequency axis for certain location, which gives similar informationwith the one obtained from Extraction Mode.ii.According to our experience, use Extraction Mode first, and thenuse Spatial Mode next to get detail and spatial information.19

Introduction Power Integrity Concept DC Analysis for Power Integrity AC Analysis for Power Integrity1.Observe from Frequency Domain2.Observe from Time Domain Summary Q&A20

Observe from Time domainTime Domain Analysis is necessary for PDS of which the SPEC has definition about: 1.The maximum current slew rate, 2. The maximum overshoot voltage above VID, and 3.The maximum overshoot time duration above VID. 4.Load LineFor Example, if we have:The Maximum Current Slew Rate of 300A/µsThe Maximum Overshoot Voltage above VID 50mVThe Maximum Overshoot Time Duration above VID 25µsThe Load Line:Vcc(max) VID – 0.8mΩ*IccVcc(min) VID – 0.8mΩ*Icc-30mV21

Observe from Time domainIn time domain analysis, we can customize the current sink and the voltage source(i.e. the VRM) according to the maximum current slew rate and the load line definedin VRD Spec and use Speed2000 to emulate the behavior.For Example:VRMCurrentSinkV 1 2 PWL(0 1.061 50n 1.061 450n 0.965 4450n 0.965 4900n 1.061 8900n 1.061 9350n 0.965 13350n 0.965)I 1 2 PWL (03050n 30 450n150 4450n 150 4900n 30 8900n 309350n 150 13350n 150 )Simulation Result:22

Introduction Power Integrity Concept DC Analysis for Power Integrity AC Analysis for Power Integrity1.Observe from Frequency Domain2.Observe from Time Domain Summary Q&A23

Summary As the transferring rate increase, Power Integrity becomes a more andmore critical issue in modern high speed design. A complete power integrity analysis should cover both frequency domainand time domain. Spatial distribution of capacitors would affect how efficiency our solutionis. Due to the concern of cost and time-to-market, Flextronics choosesSigrity’s tool set to ensure our design is safe to work properly.24

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Thank you Design. Build. Ship. Service.26

May 20, 2008 · Power Integrity in System Design CAE / Design Simulation Skipper Liang 5/20/2008. 2 Agenda Introduction Power Integrity Concept DC Analysis for Power Integrity AC Analysis for Power Integrity Summary Q & A 1. Observe from Frequency Domain 2. Observe from Time Domain. 3 Introduction Power Integrity Concept DC