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Digital Logic FundamentalsStudent Workbook91573-00Edition 4Ê {Y èRÆ30Ë3091573000503

FOURTH EDITIONSecond Printing, March 2005Copyright March, 2003 Lab-Volt Systems, Inc.All rights reserved. No part of this publication may be reproduced, stored in a retrieval system,or transmitted in any form by any means, electronic, mechanical, photocopied, recorded, orotherwise, without prior written permission from Lab-Volt Systems, Inc.Information in this document is subject to change without notice and does not represent acommitment on the part of Lab-Volt Systems, Inc. The Lab-Volt F.A.C.E.T. software andother materials described in this document are furnished under a license agreement or anondisclosure agreement. The software may be used or copied only in accordance with the termsof the agreement.ISBN 0-86657-210-4Lab-Volt and F.A.C.E.T. logos are trademarks of Lab-Volt Systems, Inc.All other trademarks are the property of their respective owners. Other trademarks and tradenames may be used in this document to refer to either the entity claiming the marks and names ortheir products. Lab-Volt System, Inc. disclaims any proprietary interest in trademarks and tradenames other than its own.

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THIS PAGE IS SUPPOSE TO BE BLANKTable of ContentsUnit 1 – Introduction to the Circuit Board.1Exercise 1 – Circuit Block Familiarization.6Exercise 2 – Connecting the Digital Logic Circuits.8Unit 2 – Fundamental Logic Elements.9Exercise 1 – AND/NAND Logic Functions.13Exercise 2 – OR/NOR Logic Functions.14Unit 3 – Exclusive-OR/NOR Gates.15Exercise 1 – Exclusive OR/NOR Gate Functions.19Exercise 2 – Dynamic Response of XOR/XNOR Gates.20Unit 4 – Open Collector and Other TTL Gates .21Exercise 1 – DC Operation of a NOT and an OR-TIE .26Exercise 2 – Transfer Characteristics of Gates .27Unit 5 – Flip-Flops .29Exercise 1 – Set/Reset Flip-Flop.32Exercise 2 – D-Type Flip-Flop .35Unit 6 – JK Flip-Flop.37Exercise 1 – Static JK Flip-Flop Operation .40Exercise 2 – Dynamic Operation of a JK Flip-Flop.42Unit 7 – Tri-State Output .45Exercise 1 – Tri-State Buffer Output Control .49Exercise 2 – Source and Sink Current.50Unit 8 – TTL and CMOS Comparison .51Exercise 1 – Trigger Levels of TTL and CMOS Gates .56Exercise 2 – TTL and CMOS Dynamic Characteristics .58Unit 9 – Data Bus Control .59Exercise 1 – Static Control of a Data Bus.63Exercise 2 – Dynamic Control of a Data Bus .64Appendix A – Safety . A-iii

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IntroductionThis Student Workbook provides a unit-by-unit outline of the Fault Assisted Circuits forElectronics Training (F.A.C.E.T.) curriculum.The following information is included together with space to take notes as you move through thecurriculum. The unit objectiveUnit fundamentalsA list of new terms and words for the unitEquipment required for the unitThe exercise objectivesExercise discussionExercise notesThe Appendix includes safety information.iii

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Digital Logic FundamentalsUnit 1 – Introduction to the Circuit BoardUNIT 1 – INTRODUCTION TO THE CIRCUIT BOARDUNIT OBJECTIVEAt the completion of this unit, you will be able to locate, identify, and connect digital circuits,and demonstrate digital logic states by using the DIGITAL LOGIC FUNDAMENTALS circuitboard.UNIT FUNDAMENTALSLOGIC GATESThe DIGITAL LOGIC FUNDAMENTALS circuit board is composed of ten circuit blocks thatdemonstrate different types of logic gates; there are also three voltage and signal support circuitblocks.Logic gate circuits consist of transistors that act like on/off switches. Most of the gates on thecircuit board are bipolar TTL (transistor to transistor logic) gates. A comparison of a bipolarTTL gate and a CMOS gate is made on the TTL/CMOS COMPARISON circuit block.1

Digital Logic FundamentalsUnit 1 – Introduction to the Circuit BoardLOGIC STATESThe output logic state (level) of a gate depends on the logic state of the input(s). There are twologic states: logic 1, or high, and logic 0, or low.The output of some gates can also be in a high-Z (high impedance) state, which is neither a highnor low logic state. The gate is disabled when the output is in a high-Z state; the inputs have noeffect on the output.The input and output logic states change voltage levels stepwise or almost instantaneously.Sequential (consecutive) change is the nature of digital signals.The input and output logic states change voltage levels stepwise or almost instantaneously.Sequential (consecutive) change is the nature of digital signals. Analog signals change in asmooth continuous manner.BOOLEAN ALGEBRAThe logic gates simulate equations of Boolean algebra. Boolean algebra equations areexpressions that relate the output logic state to the input logic state(s).For example, the Boolean equation X A means that the output X will have the same logic stateas the input A. This relationship is presented in a tabular form called a truth table. In a truthtable, a 1 means logic 1, or high, and a 0 means logic 0, or low.2

Digital Logic FundamentalsUnit 1 – Introduction to the Circuit BoardAnother example of a Boolean equation is X A. The truth table is shown above. The equationX A means that X is the complementary logic state (opposite or inverted state) of A: when Ais logic 1, X is logic 0 and vice versa.NOT SYMBOLThe overbar (line over the letter A) is a NOT symbol that indicates a complementary condition.The Boolean equation X A means that if A is logic 0, X is logic 1.DIGITAL COMPUTERA digital computer contains integrated circuits (ICs) that are com-posed of logic gates. Theoutputs and inputs of the logic gates are connected to perform the function of the digitalcomputer.Letters, numbers, and graphic symbols processed by a digital com-puter are represented by abinary code that consists of logic 1s and logic 0s.The logic states of the gate inputs and outputs in a digital computer change state sequentially(consecutively). The sequential logic functions occur millions of times per second.Understanding the fundamentals of digital logic circuits is the first step in learning about theoperation of a digital computer.3

Digital Logic FundamentalsUnit 1 – Introduction to the Circuit BoardNEW TERMS AND WORDSlogic gates - devices that perform logic functions.TTL - Transistor-Transistor-Logic; a logic gate composed of bipolar transistors.CMOS - devices constructed from a Complementary Metal Oxide Semiconductor process.Boolean algebra - a logical expression that relates the output logic state of a gate to its inputlogic state(s).truth table - a table that shows the relationship of output logic states to all combinations of inputlogic states.complementary logic state - the binary opposite logic state; logic 1 is the complementary logicstate of logic 0.NOT symbol - an overbar symbol that indicates that the function is the complement.integrated circuits (ICs) - devices that combine the actions of many transistors on one chip.There are many types of IC devices.binary code - a method of representing numbers by using the two digits 0 and 1.LED - Light-Emitting Diode; a semiconductor diode that emits light when forward biased.pulse train - a free-running and repetitive waveform; usually refers to a square waveform.dual-in-line package (DIP) - a type of IC package that has the same pin count on both sides ofthe device.EQUIPMENT REQUIREDF.A.C.E.T. base unitDIGITAL LOGIC FUNDAMENTALS circuit boardMultimeterOscilloscope, dual trace4

Digital Logic FundamentalsUnit 1 – Introduction to the Circuit BoardNOTES5

Digital Logic FundamentalsUnit 1 – Introduction to the Circuit BoardExercise 1 – Circuit Block FamiliarizationEXERCISE OBJECTIVEWhen you have completed this exercise, you will be able to locate and identify the circuit blocksand components on the DIGITAL LOGIC FUNDAMENTALS circuit board. You will verifyyour results by identifying logic circuits and making logic level measurements with a voltmeterand an oscilloscope.EXERCISE DISCUSSION There are thirteen circuit blocks on the DIGITAL LOGIC FUNDAMENTALS circuit boardconnected to your base unit. Three of the circuit blocks are support circuits that are located in the upper left corner of thecircuit board. The support circuit blocks include:POWER SUPPLY REGULATOR (not labeled)CLOCKINPUT SIGNALS. The ten circuit blocks that contain digital logic circuits are:AND/NAND circuit blockOR/NOR circuit blockXOR/XNOR circuit blockOPEN COLLECTOR circuit blockSET/RESET FLIP-FLOP circuit blockD-TYPE FLIP-FLOP circuit blockJK FLIP-FLOP circuit blockTRI-STATE OUTPUT circuit blockTTL/CMOS COMPARISON circuit blockDATA BUS CONTROL circuit block. The 5V LED indicates that 5 Vdc power is available to the circuit board.The CLOCK circuit block provides a 50 kHz square wave clock signal.The INPUT SIGNALS circuit block provides two outputs (A and B) for static high (logic 1)and low (logic 0) signals.The circuit board contains several ground terminals.The logic circuits on the circuit board are contained in dual-in-line (DIP) integrated circuit(IC) packages. 6

Digital Logic FundamentalsUnit 1 – Introduction to the Circuit BoardNOTES7

Digital Logic FundamentalsUnit 1 – Introduction to the Circuit BoardExercise 2 – Connecting the Digital Logic CircuitsEXERCISE OBJECTIVEWhen you have completed this exercise, you will be able to connect digital logic circuits andobserve the inputs and outputs by using the DIGITAL LOGIC FUNDAMENTALS circuit board.You will verify your results with a multimeter and an oscilloscope.EXERCISE DISCUSSION Test leads connect the terminals at the CLOCK and INPUT SIGNALS circuit blocks to theinput terminals at the logic gate circuit blocks. A two-post connector has to be installed in the BLOCK SELECT terminals for the input andoutput LEDs to function. When an LED is on (lighted) the logic state is normally high (logic 1). When an LED is off (not lit), the logic state is normally low (logic 0). The logic states of circuit inputs and outputs can also be observed with a voltmeter or with anoscilloscope.NOTES8

Digital Logic FundamentalsUnit 2 – Fundamental Logic ElementsUNIT 2 – FUNDAMENTAL LOGIC ELEMENTSUNIT OBJECTIVEAt the completion of this unit, you will be able to determine the input/ output relationship ofAND, NAND, OR, and NOR logic gates by using the DIGITAL LOGIC FUNDAMENTALScircuit board.UNIT FUNDAMENTALSIn TTL digital circuits, there are two fundamental voltage levels, or logic states:1. a high state, called a logic high (logic 1) and equal to about 5 Vdc.2. a low state, called a logic low (logic 0) and equal to about 0V.For practical circuits, each state consists of a minimum and a maximum voltage level. Outside ofthis range, the logic circuit cannot reliably determine which logic state to assign.The figure illustrates the operating limits of typical TTL circuits. Logic high values, representedby logic 1, range between 2 and 5 Vdc. Logic low values, represented by logic 0, range between0 and 0.8 Vdc. Ones (1) and zeros (0) define the truth tables of standard logic gates and circuits.A voltage level between 0.8V and 2V represents an unknown logic state. Logic levels that arenear the threshold can generate intermittent results. Any noise that adds to or subtracts from thesignal can put a gate input in the unknown logic state.9

Digital Logic FundamentalsUnit 2 – Fundamental Logic ElementsThe circuit illustrates a fundamental logic concept. Switches A and B connected in seriesrepresent an AND function. Switches A and B must be closed to illuminate the lamp. If eitherswitch is opened, the lamp goes off.This circuit illustrates a second fundamental logic concept. Switches A and B connected inparallel represent an OR function. Either switch A or switch B can be closed to illuminate thelamp. Both switches must be opened to turn the lamp off.Switch positions can be related to logic levels. Logic levels are represented by highs (1) or lows(0).Boolean equations define the input/output relationships of logic circuits. In place of ones andzeros, Boolean equations take the form of A and B C, notated as shown above.The Boolean equation A and B C defines the circuit operation. The expression states thatswitches A and B must both be activated (on or high) to illuminate the lamp (C). If a lamp-oncondition is considered a logic high, then both A and B must be high to generate a high output.10

Digital Logic FundamentalsUnit 2 – Fundamental Logic ElementsBasic logic functions can be complemented. The complement of a logic state is its oppositestate. Logic high (1) and logic low (0) levels are complements of each other. Zero (0) is the onescomplement of one (1), while 1 is the ones complement of 0.The complexity of an IC package determines its classification. IC packages are classified asfollows: SSI - small scale integration devicesMSI - medium scale integration devicesLSI - large scale integration devicesVLSI - very large scale integration devicescustom IC devicesThe relationship between gate count and classification is illustrated above. For example, a LSI(large scale integration) device may contain from 101 to 1000 (1K) gates.NEW TERMS AND WORDShigh state - a voltage level that is interpreted as a logic high.low state - a voltage level that is interpreted as a logic low.Ones (1) - represent logic high states; ones complement of 0.zeros (0) - represent logic low states; ones complement of 1.threshold - voltage values that define the low and high boundaries of their respective logiclevels.OR - (A B C) a logic function which generates a high logic level when any single input is ata high logic level.AND - (A·B C or AB C) a logic function which generates a high logic level when all inputsare at a high logic level.complement - opposite.ones complement - the inverse of an initial logic state. Zero and one are ones complements ofeach other.NAND - (A·B C or AB C) a logic function which generates a low logic level when inputs areat a high logic state.11

Digital Logic FundamentalsUnit 2 – Fundamental Logic Elementspull-up - a resistor used to terminate an unused AND or NAND input at a high logic level (Vcc).disables - locks out one or more inputs of an AND or a NAND gate.enables - recognizes all inputs of an AND or a NAND gate.NOR - (A B C) a logic function which generates a low logic level when any single input is ata high logic level.EQUIPMENT REQUIREDF.A.C.E.T. base unitDIGITAL LOGIC FUNDAMENTALS circuit boardMultimeterOscilloscope, dual traceNOTES12

Digital Logic FundamentalsUnit 2 – Fundamental Logic ElementsExercise 1 – AND/NAND Logic FunctionsEXERCISE OBJECTIVEWhen you have completed this exercise, you will be able to determine the operation of an ANDand a NAND logic gate. You will verify your results by generating truth tables for each function.EXERCISE DISCUSSION The output of an AND gate is high only when all inputs are high. The output of a NAND gate is low only when all inputs are high. A low input disables an AND or a NAND gate. A high input (two-input gate) will enable an AND or a NAND gate. The output of an enabled AND gate is in phase with its input. The output of an enabled NAND gate is the complement of its input.NOTES13

Digital Logic FundamentalsUnit 2 – Fundamental Logic ElementsExercise 2 – OR/NOR Logic FunctionsEXERCISE OBJECTIVEWhen you have completed this exercise, you will be able to determine the operation of an ORand a NOR logic gate, You will verify your results by generating truth tables for each function.EXERCISE DISCUSSION The output of an OR gate is high when any input is high. The output of a NOR gate is low when any input is high. A high input will disable an OR or a NOR gate. A low input (two-input gate) will enable an OR or a NOR gate. OR/NOR gate outputs complement each other.NOTES14

Digital Logic FundamentalsUnit 3 – Exclusive-OR/NOR GatesUNIT 3 – EXCLUSIVE-OR/NOR GATESUNIT OBJECTIVEAt the completion of this unit, you will be able to demonstrate the input/output relationship ofEXCLUSIVE-OR and EXCLUSIVE-NOR gates by using the XOR/XNOR circuit block on theDIGITAL LOGIC FUNDAMENTALS circuit board.UNIT FUNDAMENTALSAn exclusive type gate is used in arithmetic systems or where the input states are to becompared. Exclusive gates take two forms: EXCLUSIVE-OR and EXCLUSIVE- NOR(XNOR). The schematic symbols are shown above.The double curved lines at the gate inputs differentiate the exclusive function from aconventional OR or NOR function.The output (C) of an XOR gate is logic 1 (high) when the inputs (A and B) are complementary(not equal to one another).The Boolean equation for an XOR gate is C AB AB, or simplified as C A B. A plussign in a circle, , denotes an exclusive function in a Boolean equation.15

Digital Logic FundamentalsUnit 3 – Exclusive-OR/NOR GatesThe output (C) of an XNOR gate is logic 1 (high) when the gate inputs (A and B) are equal (bothhigh or both low).An XNOR gate has a circle on the output in addition to the double curved lines at the input.The Boolean equation for an XNOR gate is C AB AB, or simplified as C A B.Above is the truth table for the XOR and XNOR functions. The XOR circuit detects conditionsof inequality at its input. The XNOR circuit detects conditions of equality at its input.16

Digital Logic FundamentalsUnit 3 – Exclusive-OR/NOR GatesAs shown above, two XOR gates can be connected to generate both XOR and XNOR outputsignals. The output of the second XOR gate (E) is the XNOR function of inputs A and B. Thesecond XOR gate performs an XNOR operation due to the action of the pull-up resistorconnected at D.The table is the truth table for the circuit shown above.NEW TERMS AND WORDSEXCLUSIVE-OR (XOR) - a logic gate that generates a low output level for conditions ofequality or a high output for conditions of inequality.EXCLUSIVE- NOR (XNOR) - a logic gate that generates a high output level for conditions ofequality or a low output for conditions of inequality.inequality - a condition in which input logic states are not equal (complementary).equality - a condition in which input logic states are equal (not complementary).open collector - a type of gate output that generally requires a pull-up resistor connected to thecollector.EQUIPMENT REQUIREDF.A.C.E.T. DIGITAL LOGIC FUNDAMENTALS circuit boardMultimeterOscilloscope, dual trace17

Digital Logic FundamentalsUnit 3 – Exclusive-OR/NOR GatesNOTES18

Digital Logic FundamentalsUnit 3 – Exclusive-OR/NOR GatesExercise 1 – Exclusive OR/NOR Gate FunctionsEXERCISE OBJECTIVEWhen you have completed this exercise, you will be able to demonstrate the operation of anEXCLUSIVE-OR and an EXCLUSIVE-NOR logic gate. You will verify your results bygenerating truth tables for each function.EXERCISE DISCUSSION A 74LS136 IC package can be configured to provide both XOR and XNOR functions. The output of an XOR circuit is high for input conditions of inequality. The output of an XNOR circuit is high for input conditions of equality. The inputs of an exclusive type IC cannot be locked out because all input logic states affectthe output state. The outputs of an XOR and XNOR gate are complementary for identical XOR and XNORinput states.NOTES19

Digital Logic FundamentalsUnit 3 – Exclusive-OR/NOR GatesExercise 2 – Dynamic Response of XOR/XNOR GatesEXERCISE OBJECTIVEWhen you have completed this exercise, you will be able to demonstrate the output response ofXOR and XNOR gates to a square wave input. You will verify your results by observing circuitwaveforms with an oscilloscope.EXERCISE DISCUSSION A two-input XOR or XNOR gate cannot be disabled by one input pulled high or low. The level present at one input of a two-input XOR/XNOR gate controls the input/outputphase relationship of the gate. A two-input XOR gate generates a complement if one of its inputs is is pulled high. A two-input XNOR gate generates a complement if one of its inputs is pulled low.NOTES20

Digital Logic FundamentalsUnit 4 – Open Collector and Other TTL GatesUNIT 4 – OPEN COLLECTOR AND OTHER TTL GATESUNIT OBJECTIVEAt the completion of this unit, you will be able to demonstrate the operating characteristics of aSchmitt-trigger LS inverter, a standard LS inverter, and an open collector buffer by using theOPEN COLLECTOR circuit block.UNIT FUNDAMENTALSStandard input Low Power Schottky (LS) gates require input wave-forms with fast rise timesand fall times. Schmitt-trigger LS gates allow input signals with slow rise and fall times ornoise to drive TTL ICs without generating false output signals.For a standard LS gate, the input voltage levels at which the input signal is in a low, uncertain, orhigh logic state are shown.VIH (voltage in high) and VIL (voltage in low) represent the specification input voltage levelsat which the output has a definite logic state (high or low).At VIH (2V) or greater, the output of a standard LS gate is high for a buffer and low for aninverter. At VIL (0.8V) or less, the output of a standard LS gate is low for a buffer and high foran inverter.The output logic state is un-certain between an input voltage of 0.8V and 2V.Actually, the output changes state during a narrow, uncertain input voltage range that is between0.8V and 2V.21

Digital Logic FundamentalsUnit 4 – Open Collector and Other TTL GatesFor a Schmitt-trigger LS gate, the input voltage levels at which the input is in a low, locked out,or high logic state are shown.With a Schmitt-trigger gate, the output logic state will not change until the input voltageincreases to the upper trip point of 1.6V. This is the positive-going threshold voltage (VT ).When the input voltage decreases, the output will not change until the input voltage decreases tothe lower trip point of 0.8V.This is the negative-going threshold voltage (VT-).Positive feedback (hysteresis) is used in the Schmitt-trigger gate circuit.Input voltages between VT- and VT are locked out and will not cause false output states if theinputs have slow rise and fall times or if the input signal contains noise.A Schmitt-trigger device is identified by a hysteresis loop on the device symbol, as shown.22

Digital Logic FundamentalsUnit 4 – Open Collector and Other TTL GatesAn open collector gate circuit has its

Digital Logic Fundamentals Unit 1 – Introduction to the Circuit Board 2 LOGIC STATES The output logic state (level) of a gate depends on the logic state of the input(s). There are two logic states: logic 1, or high, and logic 0, or low. The output of some gates can also be in a high-Z (high impedance) state, which is neither a high

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