ECE 09468/09568 - Rowan University
ECE 09468/09568Discrete Event SystemsLecture 4: Finite State MachineDr. Ying (Gina) TangDepartment of Electrical and Computer EngineeringRowan University1
Finite State MachineWhat is a Finite State Machine? A finite state machine (FSM) is an abstract model of asystem. It represents a system that can only be in a limited(finite) number of states It represents a system by defining:» all the possible states a system could have» all the events that could cause the system to change astate The main design tool for FSM is the State TransitionDiagram (State Diagram).Prof. Ying (Gina) Tang2
State Diagram A state diagram is a graphical representation of a statemachine. It depicts the relationships between the system statesand the events that cause the system to move fromone state to another. The states are represented by circles; Events arerepresented by arrows between the statese.g. Light SwitchName of eventthat causestransitionOffSwitch up/Close circuitSwitch down/open circuitOnProf. Ying (Gina) TangAction performedwhen transitionoccurs3
Basic Terms of FMS Event: Something that happens to the objectinstantaneously. It is often implemented as an operationon an object. State: Defines behavior and attribute values held by anobject. State transition: A change of state (in response to anevent). Finite automaton: Same as finite state machine. (It hasa finite number of states.)Prof. Ying (Gina) Tang4
Applications of FMS Primarily used for designing– Logic circuits: Reference Book: Contemporary Logic Design byRandy H. Katz– Computer programs– Electronic control systems Also used for– Pattern recognition– Artificial intelligence– test and formal verification of systemsProf. Ying (Gina) Tang5
FSM for Even/Odd Parity CheckParity checker counts the number of 1's in a bit-serialinput stream. If the checker asserts its output when theinput stream contains an odd number of 1's, it is calledan odd parity checker. If it asserts its output when it hasseen an even number of 1's, it is an even paritychecker.Odd parity checker:bit ecker1odd1timeOUT1even0Prof. Ying (Gina) Tang0 if even parity1 if odd parity1odd10odd161even0
FSM for Even/Odd Parity Check State Diagram– States: parity checker is in one of twostates (even or odd).– Initial state: even.– Inputs: 0 or 1. Inputs cause statetransitions.– Outputs: depends on which state theparity checker is in. 0 for even and 1 forodd. (Moore machine: output is associate withstate)Prof. Ying (Gina) TangReset0Even/011Odd/107
FSM for Even/Odd Parity CheckFSM may be presented by state transition table.Reset0Even/011Odd/1Present StateInputNext of. Ying (Gina) Tang8
FSM for Even/Odd Parity CheckReset0Binary coding: Even (0); Odd (1)0/0111/10Present State(PS)Input(I)Next State(NS)Output(O)0000011010111101NS PS XOR I(exclusive disjunction of Present State and Input)Implement the parity checkerusing D-flip flop:PSNSDICLKProf. Ying (Gina) TangQQ’9O
FSM for Even/Odd Parity CheckYour turn Redesign the odd parity checker FSM (Mooremachine) to make it check for even parity (that is,assert the output when the input contains aneven number of 1's). Show your state diagrambit streamINCLKEven ParityCheckerProf. Ying (Gina) TangOUT1 if even parity0 if odd parity10
More FSM ApplicationsMan, Wolf, Goat and Cabbage problem:A man, a wolf, a goat, and a cabbage areall on one bank of a wide river. The manwishes to take himself and the threeothers across to the opposite side. How toget them to the other side of the river?The constraints: There is only room in the boat for the manand at most one of the three others. The wolf and goat can't be left alone. The goat and the cabbage can't be leftalone.Prof. Ying (Gina) Tang11
More FSM ApplicationsMan, Wolf, Goat and Cabbage problem: Notation:M – man; W – wolf; G – goat; C : cabbage States: (A, B)Where A and B are subsets of {M,W,G,C}. Arepresents which entities are on the initial side ofthe river and the second subset B, the entities onthe opposite side. For example, ({MGC},{W} means the man, goat andcabbage are on the initial side and the wolf is on theopposite side -- we simplify the representation as MGC-WProf. Ying (Gina) Tang12
More FSM ApplicationsMan, Wolf, Goat and Cabbage problem: Exhaust 16 possible states and 6 violate constraints: MWGC-0 MGC-W MWC-G MGC-W WGC-M MW-GC MG-WC MC-WG GC-MW WC-MG WG-MC W-MGC G-MWC W-MGC M-WGC 0-MWGCProf. Ying (Gina) Tang13
FMS with Outputs FSM may generate outputs. There are two main methods for handling where togenerate the outputs for a FSM. They are called– a Moore Machine and– a Mealy Machine.(named after their respective authors.) Moore Machine generates an output for each state. Mealy Machine generates an output for eachtransition.Prof. Ying (Gina) Tang14
FMS with OutputsMoore Machine: the output function is a function of astate - it depends only on a state.Present rOutputFunctionOutputsMealy Machine: the output function is a function of bothstate and input.InputsPresent StateTransitionFunctionNextStateStateRegisterProf. Ying (Gina) TangOutputFunctionOutputs15
FMS with OutputsMoore Machine: Output isassociated with the state and henceappears after the state transitiontakes place.ResetMealy Machine: Output is associatedwith the state transition, and appearsbefore the state transition is completed(by the next clock . Ying (Gina) Tang16
FMS with OutputsInput100110101110ClkOutput (Moore)111011001011Output (Mealy)Moore: the output change is synchronous with the enabling clock edge.Mealy: the output changes asynchronously with the enabling clock edge.Prof. Ying (Gina) Tang17
FMS with Outputs Moore Machines are safer to use:– Outputs change at clock edge (synchronous).– In Mealy machines, input change can cause output changeas soon as logic is done (asynchronous) – a big problemwhen two machines are interconnected. Mealy Machines react faster to inputs– React in same cycle – don't need to wait for clock Mealy Machines tend to have less states:– Different outputs on arcs (n 2) rather than states (n). Moore and Mealy may be mixedProf. Ying (Gina) Tang18
Simple Vending Machine Deliver package of gum after 15 cents depositedSingle coin slot for dimes, nickelsNo changeOnce the gum has been delivered, some external circuitry will generate areset signal to put the control back into its initial state.DCoin ResetCLK States: 0 c; 5 c; 10 c; 15 c.Inputs/events: insert a dime (D); insert a nickel (N).Output: not release (0); release (1)Prof. Ying (Gina) Tang19
Simple Vending MachineState Diagram: Identify States: 0 c; 5 c; 10 c; 15 c. Identify Inputs/events:– insert a dime (D)Reset– insert a nickel (N)– Reset Identify Outputs:– not release (0)– release (1)D Draw circle for each state. For the each state, identify all the possible eventsand how the state changes when the eventshappen. Draw the arcs from present state and nextstate for all the possible events. Specify outputs on states (for Moore) or ontransitions (for Mealy).Prof. Ying (Gina) TangResetN D reset0c[0]N5cND[0]DN10 c[0]N D15 c[1]20ND
Simple Vending MachineResetN D Reset0cPresentState[0]ResetState table:N0 5cND[0]D5 ND10 c[0]ND10 N D15 c15 InputsD N001100110011X010101010101XNextStateOutputrelease0 5 10 X5 10 15 X10 15 15 X15 000X000X000X1[1]Prof. Ying (Gina) Tang21
Simple Vending MachineBinary Coding: 2 bits represent 4 statesResetND0cPresentState[0]ResetN0 (00)5cND[0]D5 (01)ND10 c[0]ND10 (10)N D15 c15 (11)InputsD N001100110011X010101010101XNextStateOutputRelease0 (00)5 (01)10 (10)X5 (01)10 (10)15 (11)X10 (10)15 (11)15 (11)X15 (11)[1]Prof. Ying (Gina) Tang22000X000X000X1
Vending Machine with Returns What if it return changes? i.e.– Deliver package of gum after 15 cents deposited– Single coin slot for dimes, nickels– If more than 15 cents are inserted, the change will be returned.(dime is inserted when 10 cents are in the machine already)ReleaseDCoin SensorNVendingMachineFSMResetCLKProf. Ying (Gina) TangReturnGum ReleaseMechanismChange returnMechanism23
Vending Machine with Returns States: 0 c; 5 c; 10 c; 15 c. Inputs/events:– insert a dime (D)– insert a nickel (N)– ResetReset/00(N D Reset)/000cReset/00D/00N/00N D/005cD/10 Output:– No release (00)– Release and no return (10)– Release and return a nickel (11)N/00N D /0010 cN/10D/1115 cProf. Ying (Gina) Tang24
Vending Machine with ReturnsReset/00 Exercise:(N D Reset)/00– Design Moore Machineof the vending machinewith change return.Hint: outputs are associate withstates. More states may beneeded to show differentoutputs.0cReset/00D/00N/00N D/005cD/00N/00N D /0010 cN/10D/1115 cMoor Machine?Prof. Ying (Gina) TangMealy Machine25
Another Vending Machine Design a finite state machine for a vending machinecontroller that accepts nickels (5 cents each), dimes (10cents each), and quarters (25 cents each). When the valueof the money inserted equals or exceeds twenty cents,the machine releases the item and returns change if any(only return up to 15 cents), and waits for nexttransaction.States: 0c (A), 5c (B), 10c (C), 15c (D), 20c/25c/0c (A)Inputs: Nickel (N), Dime (D), Quarter (Q)Outputs: No release (000); Release /wo returning change (100);Release and return 5c (110); Release and return 10c (101); Releaseand return 5c & 10c (111)Prof. Ying (Gina) Tang26
Traffic Light ControllerA busy highway intersected by a little used farm-road. Detectors are placed along the farm road to raise the signalC as long as a vehicle is waiting to cross the highway. Thetraffic light controller should operate as follows:– If a vehicle is detected on the farm road(C), the highway lights should changefrom yellow (Y) to red (R), allowing thefarm road lights to become green (G).– The farm road lights stay G only aslong as a vehicle is detected on thefarm road (C) and never longerthan a set interval (TL) to allow thetraffic to flow along the highway.Prof. Ying (Gina) TangFarmroadCHighwayHighwayCFarm road27
Traffic Light Controller– If TL expires or no car detectedon farm-road ( C ), the farmroad lights change from G to Yto R, allowing the highwaylights to return to G .– Even if vehicles are waiting tocross the highway (C), thehighway should remain greenfor a set of interval (TL).FarmroadCHighwayHighwayCFarm road-- Assume there is an external timer that, once set via thecontrol signal ST (set timer), will assert the signal TS after ashort time interval has expired. (used for timing yellow lights)and TL after a long time interval (for green lights). The timer isautomatically reset when ST is asserted.Prof. Ying (Gina) Tang28
Traffic Light ControllerAssume you have an interval timer that generates:––––a short time pulse (TS) anda long time pulse (TL),A control signal - start timer (ST).TS is to be used for timing yellow lights and TL for green lightsFarm road1. Identify StatesCSo: Highway green (farm road red)S1: Highway yellow (farm road red)S2: Farm road green (highway red)S3: Farm road yellow (highway red)HighwayHighwayCFarm roadProf. Ying (Gina) Tang29
Traffic Light Controller2. Identify the inputsReset:Reset/STPlace controller in initial stateC:TL C/STDetects vehicle on farm road ineither directionTSS1TS :Short timer interval has expiredTS/STTL :Long time interval has expiredTL CTL CSoTS/STTSS3TL C/STS2S0: HGS1: HYS2: FGS3: FY3. Identify the outputsHG, HY, HR -Highway Green, Yellow, and Red lights (Moore outputs)FG, FY, FR - Farmroad Green, Yellow, and Red lights (Moore outputs)ST - start timing a long and short interval (Mealy output)Prof. Ying (Gina) Tang30
Traffic Light ControllerTraffic light system interfaceResetClkTSResetC (async)Clkshort time/long timecounterTLSTcontroller FSMNext StateOutputLogicFThis image cannot currently be displayed.This image cannot currently be displayed.CarSensorC (sync)2This image cannot currently be displayed.2StateRegister33HWe will use ROM to implement the traffic light controller FSMProf. Ying (Gina) Tang31
Traffic Light ControllerThe steps of ROM implementation of FSM: Based on the number of states and inputs in FSM, decide of address bits:Reset C TS TL Q1 Q0 Based on the number of states and outputs, decide word bits: HG HY HR FGFY FR ST P1 P0 Fill ROM contents starting from address 0AddressWord (content)Reset C TS TL Q1 Q0HG HY HR FG FY FR ST P1 P00 0 0 0 0 00 0 0 0 0 1. .? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?. .Each address indicates inputs and current state.Each word (content) indicates outputs and next state.Prof. Ying (Gina) Tang32
Traffic Light ControllerinputReset 101010001010010-1000110001000--10001010011 AddressWord (content)Reset C TS TL Q1 Q00 0 0 00 0 0 0. .HG HY HR FG FY FR ST P1 P00 00 11 0 0 0 0 1 0 0 00 1 0 0 0 1 0 1 0. .Prof. Ying (Gina) Tang33
An Elevator ExampleSoftware implementation example of FSM An elevator example:– Move the elevator either up or down to reach therequested floor. Once at the requested floor, open thedoor for at least 10 seconds, and keep it open until therequested floor changes. Ensure the door is never openwhile moving. Do not change directions unless there areno higher requests when moving up or no lower requestswhen moving down.Prof. Ying (Gina) Tang34
An Elevator ExampleSystem up/downbuttonson eachfloorStates:Idle, GoingUp, GoingDn, DoorOpenEvents/Transitions:req floor, req floor, req floorInputs:req, floorActions that occur in each state (outputs):Up (u), down (d), door open (o),start timer (t)E.g., In the GoingUp state, u,d,o,t 1,0,0,0.In door open state, u,d,o,t 0,0,1,1. Simple elevator controller– Request Resolver resolves variousfloor requests into singlerequested floor– Unit Control moves elevator tothis requested floorProf. Ying (Gina) Tang35
An Elevator ExampleUnitControl process using a state machinereq flooru,d,o, t 1,0,0,0GoingUp!(req floor)timer 10req flooru,d,o,t 0,0,1,0req flooru,d,o,t 0,1,0,0!(timer 10)Idlereq floorDoorOpenu,d,o,t 0,0,1,1!(req floor)GoingDnreq floorProf. Ying (Gina) Tangu is up, d is down, o is opent is timer start36
An Elevator ExampleCapturing UnitControl statemachine in C Enumerate all states (#define) Declare state variable initializedto initial state (IDLE) Single switch statement branchesto current state’s case Each case has actions– up, down, open, timer start Each case checks transitionconditions to determine nextstate– if( ) {state ;}#define IDLE 0#define GOINGUP 1#define GOINGDN 2#define DOOROPEN 3void UnitControl() {int state IDLE;while (1) {switch (state) {IDLE: up 0; down 0; open 1; timer start 0;if (req floor) {state IDLE;}if (req floor) {state GOINGUP;}if (req floor) {state GOINGDN;}break;GOINGUP: up 1; down 0; open 0; timer start 0;if (req floor) {state GOINGUP;}if (!(req floor)) {state DOOROPEN;}break;GOINGDN: up 0; down 1; open 0; timer start 0;if (req floor) {state GOINGDN;}if (!(req floor)) {state DOOROPEN;}break;DOOROPEN: up 0; down 0; open 1; timer start 1;if (timer 10) {state DOOROPEN;}if (!(timer 10)){state IDLE;}break;}}}Prof. Ying (Gina) Tang37
General sequential programming template for FSM#define S0 0#define S1 1.#define SN Nvoid StateMachine() {int state S0; // or whatever is the initial state.while (1) {switch (state) {S0: outputs ; //for Moor outputs. Put Mealy outputs to individual transition condition belowif( T0’s condition is true ) //whatever happens when the transition is true{state T0’s next state; actions ; }if( T1’s condition is true ) {state T1’s next state; actions ; }.if( Tm’s condition is true ) {state Tm’s next state; actions ; }break;S1: break;.SN: ;break;}}}Prof. Ying (Gina) Tang38
Steps to Design FSM1. Understand the system2. Identify the states & initial state3. Identify the events/transitions/inputs4. Identify outputs5. Draw system interface (optional)6. Draw state diagram/state tableProf. Ying (Gina) Tang39
Finite Automata A state diagram is a graphical representation of astate machine. The origin of FSMs is finite automata. Finite automata are primarily used in parsing forrecognizing languages. A difference between finite automata and FSMs isthat actions may be related to FSMs. The role ofactions is to generate output. Original Finite Automata definition do not haveoutput function. If an automaton generates output,output function can be added.Prof. Ying (Gina) Tang40
Formal Definition of FSMA finite automaton (FA) is a 5-tuple (Q, Σ, δ, q0, F ), where Q {q1, q2, , qm} is a non-empty finite set of states; Σ {e1, e2, , en} is a non-empty finite set ofevents/alphabet; δ: Q Σ Q is a state transition partial function in which“partial function” means that the function may not bedefined for all pairs in Q Σ; q0 is an initial (or start) state; F is a set of final states. F could be empty set.Prof. Ying (Gina) Tang41
Math Foundation of DESFunction: it is a mapping from a set to another.Examples (continuous variables): e.g., f: R R can define a function (from real number to realnumber)f(x) y; x R and y R f: [0, 24] [0, 24] defined as follows:t-3, 24 t 3f(t) { 24-t, 3 t 0Prof. Ying (Gina) Tang42
Math Foundation of DESFunction - Discrete cases:Assume D {d1, d2, d3} and E {e1, e2}. f1:D N can define a mapping from D to natural number set,or a natural number vector.e.g., defining f1(d1) 1, f1(d2) 3, and f1(d3) 2, we havef1 132 (1 3 2)T f2:D E and define f2(d1) e1, f2(d2) e1, and f2(d3) e2, i.e.,f2 e1e1 (e1 e1 e2)Te2Prof. Ying (Gina) Tang43
Math Foundation of DESFunction - Discrete cases:Assume Q {q1, q2, q3} and E {e1, e2}. f: Q E N can define a mapping from Q E to naturalnumber set, or a natural number matrix.e.g., defining f(q1,e1) 1, f (q1,e2) 0, f (q2,e1) 2,f(q2,e2) 0, f (q3,e1) 0, and f (q3,e2) 2, we havee 1 e21 010q1Or f 2 0f q2 2 00 2q3 0 2The dimension of the function is 3 2 which is (dimensionof the 1st set) (dimension of 2nd set)Prof. Ying (Gina) Tang44
Math Foundation of DESFunction - Discrete cases:Assume Q {q1, q2, q3} and E {e1, e2}. δ: Q E Q can define a mapping from Q E to Q- this basically defines a table.e.g., defining δ(q1,e1) q2, δ(q1,e2) q3, δ(q2,e1) q1, andδ (q3,e2) q2 and others are not defined, we haveq1δ q2q3e1 e2q2 q3q1 - q2q2 q3Or δ q1 - q2If Q is a set of states of a FSM and E is a set of events, δ:Q E Q is the state transition function.Prof. Ying (Gina) Tang45
Formal Definition - ExamplesParity CheckerResetA (Q, Σ, q0, δ, F) where Q {Even, Odd}, two-state set, Σ {0, 1}, two-event set, q0 Even, δ(Even, 0) Even, δ(Even, 1) Odd,δ(Odd, 0) Odd, δ(Odd, 1) Even F Φ, the empty set.Note:δ (Even OddOdd Even)orProf. Ying (Gina) Tang0Even/011Odd/100Evenodd1Even OddOdd Even46
Formal Definition - ExamplesTraffic controller:A (Q, Σ, q0, δ, F) where Q {S0, S1, S2, S3} Σ {e1, e2, e3} wheree1 occurs if TL C 1, e2 if TS 1, Reset/STand e3 if TL C’ 1S0TL C/ST q0 S0, F ΦS1e1 e2 e3S0 S1 - TSTS/STS1 - S2 S2δ S2 - - S3TL CS3 - S0 Prof. Ying (Gina) TangTL CTS/STTSS3TL C/ST47
Finite Automation Finite automata are primarily used in parsing for recognizinglanguages. Finite automata can be used to describe formal language. A formal language is a set of words, i.e. finite strings of letters,symbols, or token. The set from which these letters are takenis called alphabet over which the language is defined. Input strings belonging to a given language should turn anautomaton to final states and all other input strings shouldturn this automaton to states that are not final. Automata play a major role in compiler design and parsing.Prof. Ying (Gina) Tang48
Example of FSM for Compiler A FSM is similar to a compiler in that:– A compiler recognizes legal programs in some (source)language.– A finite-state machine defines legal strings Example: Pascal Identifiers– sequences of one or more letters or digits, starting with aletter:letter digitletterSAValid identifiers: x, MyID, mp3, X007 Invalid identifiers: 123, a?, 5books Prof. Ying (Gina) Tang49
Example: Integer Literals FSM that accepts integer literals with an optional or - sign:digit SA string is accepted by a FSM ifdigit there exists a sequence of statetransitions starting in the startBstate, ending in a final state, thatconsumes the entire string.digite.g., accepted: 15; 17; -1Unaccepted: 17.5; a; 2bAFirst symbol should be digit/ /-;Everything going to B (final state) must be a digit.Prof. Ying (Gina) Tang50
FMS ExampleFinite State Machine that accepts strings over alphabet{0,1} that end in 1:01A1B0The string could start from 0 or 1 and must end in 1(everything going to final state must be 1)Prof. Ying (Gina) Tang51
Exercise Exercise 1: Draw a finite-state machine thataccepts the identifiers– one or more letters, digits, or underscores,starting only with a letter or an underscore.Prof. Ying (Gina) Tang52
Exercise Exercise 1: Draw a finite-state machine thataccepts the identifiers– one or more letters, digits, or underscores,starting only with a letter or an underscore.Letter underscore digitLetter underscoreSAProf. Ying (Gina) Tang53
Exercise Exercise 2: Draw a finite-state machine thataccepts the identifiers:– one or more letters, digits, or underscores,starting only with a letter or an underscore.– do not end with an underscore.– Two underscores cannot be together.Prof. Ying (Gina) Tang54
Exercise Exercise 2: Draw a finite-state machine that acceptsthe identifiers:– one or more letters, digits, or underscores, starting onlywith a letter or an underscore.– do not end with an underscore.– Two underscore cannot be together.Letter digitLetterSAUnderscoreUnderscoreLetter digitUnderscoreBProf. Ying (Gina) Tang55
State Path & Event PathGiven an automaton, q0qi1 qik is a statepath if there is an event path ei1 ei1 suchthat all the below equations hold:δ(q0 , ei1 ) qi1δ(qi1 , ei2 ) qi2 δ(qi,k-1 , eik ) qikProf. Ying (Gina) Tang5656
Language1. Formal language L is the set of all possibleevent paths in an automaton A (Σ, Q, q0, δ,F).2. A is called a generator of L over thealphabet Σ.3. Marked language Lm L is a set of allpossible event paths whose correspondingstate paths’ last element is in F.Prof. Ying (Gina) Tang57
Languages: ExampleΣ { 0,1}δ (q 0 ,0) q1δ (q1 ,1) q 2δ (q 2 ,0) q1Q { q 0 , q1 , q 2 }F { q2 }1q00q10q2L {ε, 0, 01, 010, 0101, 01010, 010101, }Lm {01, 0101, 010101, } {(01)i, i 0, 1, 2, .}Prof. Ying (Gina) Tang58
Formal Language Representation of a DES The behavior of a DES is constituted from events. Theset of possible events is known as the alphabet. Inany given time line, the DES executes a sequence ofevents. DES is represented by a set of strings, referred to asthe language (denoted L). Some strings in L aremarked and these constitute a marked language Lm.A marked string represents a properly completed(desired) behavior, i.e., one that fulfills controlobjectives.Prof. Ying (Gina) Tang59
Design a finite state machine for a vending machine controller that accepts nickels (5 cents each), dimes (10 cents each), and quarters (25 cents each). When the value of the money inserted equals or exceeds twenty cents, the machine releases the item and returns change if any (onl
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