PACKAGE QUALIFICATION SUMMARY REPORT

PACKAGE QUALIFICATION SUMMARY REPORTDocument Control #:ML1120110066Purpose:To provide qualification summaryreport for all packagesDevice:VariousMask Identification #:VariousProcess Technology:Pure Matte Tin (Sn) Plating Process400 µin (10 µm) – 1000 µin (25µm), Pre-Plated Leadframe (PPF),or SnAgCu based solder bumpProduct:Various devices plated with Matte Tin,PPF, or with solder spheresUpdated:July 24, 2018

Package Qualification Summary ReportDOCUMENT CONTROL # ML1120110066PACKAGE QUALIFICATION SUMMARY REPORTCONTENTS1) QUALIFICATION OVERVIEW2) RELIABILITY TEST DESCRIPTIONS3) QUALIFICATION RESULTS & RELEASE STATUS4) CONCLUSIONRESULTS SUMMARYThe assembly using Matte Tin plating, PPF or solder spheres complies with thereliability guidelines documented in the qualification plan.NameDepartment/FunctionDateAuthorApproved byS. PokharelA. KumarJuly 24, 2018July 24, 2018Approved byA. NavarroApproved byApproved byG. PerzanowskiA. KovatsApproved byA. AbbottQuality EngineeringQuality EngineeringManagerFA & ReliabilityManagerQuality DirectorAssembly EngineeringManagerProduct EnvironmentalCompliance ManagerMicrochip Technology Inc.2July 24, 2018July 24, 2018July 24, 2018July 24, 2018

Package Qualification Summary ReportDOCUMENT CONTROL # ML11201100661 QUALIFICATION OVERVIEWThe purpose of this report is to verify that the qualification testing was performed in accordance with thedocumented qualification plan required by Microchip specification QCI-39000-002, “Worldwide QualityConformance Requirements”. The performance requirements were based on having passing moisturesensitivity level, package reliability, JEDEC tin whiskers growth test results per JESD22A121 & JESD201requirements.ASSEMBLY OR PLATING SITEAIC SEMICONDUCTOR SDN BH, MALAYSIAAPTOS TECHNOLOGY TAIWANUTAC DONGGUAN (aka ASAT CHINA)UTAC HONGKONG LIMITED (aka ASAT LIMITED)ADVANCED SEMICONDUCTOR ENGINEERING GROUP, CHUNG LI, TAIWANADVANCED SEMICONDUCTOR ENGINEERING GROUP, TAIWANASE-WEIHAIASE KOREA INCADVANCED SEMICONDUCTOR ENGINEERING GROUP, SHANGHAI, CHINAADVANCED SEMICONDUCTOR ENGINEERING GROUP, SUZHOU, CHINAAMKOR TECHNOLOGY CHINA(aka ANAC)AMKOR TECHNOLOGY KOREA(aka ANAK)AMKOR TECHNOLOGY PHILIPPINES (aka ANAP)AMKOR TECHNOLOGY TAIWAN(aka ANAT)CARSEM, SUZHOU, CHINACARSEM (M) SDN BHD, MALAYSIACARSEM SEMICONDUCTOR SDN BHD, MALAYSIACIRCUIT ELECTRONIC INDUSTRIES, THAILANDCORWIL TECHNOLOGY CORP., MILPITAS, CACIRTEK ELECTRONICS CORP., PHILIPPINESCHIPMOS-TAIWANFASTECH SYNERGY LTD., PHILIPPINESGEM, CHINAGREAT TEAM BACKEND FOUNDRY (DONG GUAN) LTD., CHINAGREATEK ELECTRONICS, TAIWANHANA MICROELECTRONIC, THAILANDJIANGYIN CHANGDIAN ADVANCED PACKAGING LTD, CHINA (aka JCAT)KINGPAK TECHNOLOGY INC., TAIWANLINGSEN PRECISION INDUSTRIES, TAIWANMILLENNIUM MICROTECH SHANGHAI (aka ATES), CHINAMILLENNIUM MICROTECH THAILAND (aka ALPH)MICROCHIP TECHNOLOGY THAILANDNEPES CORPORATION KOREAMicrochip Technology GTBFGTKHANAJCAPKTILPIMMSMMTMTAINEP

Package Qualification Summary ReportDOCUMENT CONTROL # ML1120110066ASSEMBLY OR PLATING SITEORIENT SEMICONDUCTOR ENGINEERING, TAIWANPOWERTECH TECHNOLOGY INC., TAIWANPANTRONIX CORPORATION, FREMONT, CASILICON PRECISION INDUSTRIES, TAIWANSTATS CHIPPAC-SANGHAI, CHINASTATS CHIPPAC-MALAYSIAST ASSEMBLY TEST SERVICES-SINGAPORESIGNETICS CORPORATION, SOUTH KOREASIGURD, TAIWANSILTECH SEMICONDUCTOR CORPORATE LTD, SHANGHAI, CHINASTARS MICROELECTRONICS PUBLIC COMPANY LIMITED, THAILANDTAIWAN IC PACKING CORP, TAIWANUNISEM (M) BERHAD, MALAYSIAUNISEM CHINAUNISEM (M) SINGAPOREUTAC THAI LIMITED (aka NSEB), THAILANDVIGILANT TECHNOLOGY CO. LTD, THAILANDDESIGNATIONOSEPTIPTXSPILSCCSCMSCS, STASIGNSIGTSILTECHSTARTICPUNIBUNICUNISUTLVGT1.1 Qualification PlanIn keeping with guidelines established in QCI-39000-002 for new assembly packages or processes aminimum of three assembly lots would be used for package qualification testing. Representative samples ofeach package family and subcontractor were used to qualify the entire set of packages manufactured at eachsubcontractor. Each package selected would be subjected to all tests. In addition, data was collected to verifythe solderability of the Matte tin lead finish in both the standard solder bath as well as a representative PbFree solder. Tin whisker reliability testing was performed in compliance to JESD22A121 & JESD201requirements. A detailed qualification plan is listed below.Preconditioning – Surface mount devices would be subjected to preconditioning stress before HAST,Unbiased HAST (UHAST), and Temperature Cycling.HAST – Devices would be subjected to 96 hours of Highly Accelerated Stress Test (HAST).Unbiased HAST (UHAST) – Devices would be subjected to 96 hours of Unbiased HAST testing.or Autoclave (Pressure Cooker).Temperature Cycling – Devices would be subjected to 500 temperature cycles.Temperature Humidity Bias – Devices would be subjected to 1khrs under temperature, humidity and bias.Thermal Shock – Devices would be subjected to 200 temperature cycles.Microchip Technology Inc.4

Package Qualification Summary ReportDOCUMENT CONTROL # ML1120110066Solderability – Devices would be subjected to 8 hours of steam aging and then tested for solderability issues.Whiskers Growth – Devices would be subjected to 1500 temperature cycles, 4000 hours ambient bake, and4000 hours high temperature moisture bake.1.2 Qualification Test ConditionsTests are performed in accordance with QCI-39000-002, “Worldwide Quality Conformance Requirements”.TESTPre-Conditioning (SMD only)METHODJESD22-A113CONDITIONHASTUnbiased HAST (UHAST) orUnbiased Autoclave ( PCT )JESD22-A110JESD22-A118Temperature CyclingJESD22-A1041. Electrical Test @ 25 C2. SAM exam3. 125 C or 150 C Bake for 24hrs4. 85 C/85% R.H. for 168hrs or30 C/60% R.H. for 192hrs5. Reflow 3 cycles @ typical 260 C or245 C6. SAM exam7. Electrical Test @ 25 C130 C/85%/96hrs130 C/85%/96hrs or121 C/ 100%/96hrs-65 C to 150 C/500 cyclesTemperature Humidity Bias(THB)Thermal Shock (TS)Solderability TestTable 3.3JESD22-A10185 C/85%/1000hrsMIL-STD 883 Method 1011.9J-STD-002 and JESD22-B102CRITERIA0/all surface mountdevices0 fails (note 1)0 fails (note 1)0 fails (note 1)0 fails (note 1)0 fails (note 1)-55 C to 125 C/200 cycles0/22Solder temp. 245 CSMD & Through holeRosin Flux(Matte tin lead finish, SnAgCu95.5/3.9/0.6 Solder)Backward Compatibility (note 2) J-STD-002 and JESD22-B1020/22Solder temp. 245 C Through holeSolderability Test Table 3.1215 C SMDRosin Flux(Matte tin lead finish, 60/40 SnPb Solder)Forward CompatibilityMIL-STD 883 Method 20030/22Solder temp. 265 C 5 CSolderability Test Table 3.2SMD & Through hole(SnPb lead finish, Sn/Ag/Cu Solder)Whiskers GrowthAll tin whisker reliability–55 ( 0/-10) C to 85 ( 10/-0) C orMax whisker lengths:testing was performed per the-40 ( /-10) C to 85 ( 10/-0) C45um for temp cyclerequirements in JEDECfor 1500 cyclestest and 40um forspecifications JESD22A121 &30 2 C/60 2% RH 4000 hrs Bakeambient/high temp &JESD201.55 3 C /85 3% RH 4000 hrs Bakehumidity tests.Note 1: Sample size varies for Subcon assembled products where Subcon has their own data for the package of interest.Note 2: Backward compatible solderability is an optional test.Microchip Technology Inc.5

Package Qualification Summary ReportDOCUMENT CONTROL # ML11201100662 RELIABILITY TEST DESCRIPTIONS2.1 PreconditioningThis test consists of the following tests run in a consecutive order. The tests are electrical testing at 25 C,C- SAM, Bake 125 C or 150 C for 24 hour, a moisture soak, 3X Reflow cycles, C-SAM and ending withelectrical testing at 25 C.2.2 Highly Accelerated Stress Test (HAST)This test is similar to autoclave, but under more severe conditions and with the device under bias.2.3 Unbiased HAST (UHAST)The unbiased HAST is performed for the purpose of evaluating the reliability on non-hermetic packagedsolid-state devices in humid environments. It is a highly accelerated test with temperature and humidity thatare exposed to condition 130 oC, 85 % relative humidity for a period of 96 hours.2.4 Temperature CycleThis stress test is used to determine if any structural defects are present in a packaging design. This test isintended to reveal potential defects related to wire bonding, cracked die, substrate mounting and thermalmismatch.2.5 Temperature Humidity Bia (THB)This test is performed to evaluate the reliability of non-hermetic packaged solid-state devices in humidenvironments. It is a highly accelerated test with temperature, humidity and bias that are exposed tocondition 85 oC, 85 % relative humidity for a period of 1000 hours.2.6 Thermal Shock (TS)This test is used to determine the resistance of the packaged devices to sudden exposure to extreme changesin temperature and the effect of alternate exposures to these extremes.2.7 Solderability TestThis test is to evaluate the solderability of terminations that are normally joined by a soldering operation.The specimens subjected to this test are immersed in a flux and then dipped in a molten solder bath.2.8 Autoclave (Pressure Cooker)The purpose of this test is to determine the resistance of the package to moisture under high temperature andhumidity conditions. This test may cause such potential failure mechanisms as metal corrosion or ioniccontamination. Unbiased devices are exposed to conditions of 121.5oC, at 15 PSI (one atmosphere), and100% relative humidity for a period of 96 hours.2.9 Whisker GrowthMicrochip Technology Inc.6

Package Qualification Summary ReportDOCUMENT CONTROL # ML1120110066This test is to determine the susceptibility of the plated matte tin finish to form a dendrite type of growthreferred to as whiskers. One potential effect of excessive whisker growth includes electrical shortingbetween two adjacent pins. Please note that the minimum matte tin thickness is 400 µin (10 µm) and that apost plating bake or anneal process (150 C for 1 hr) is currently being utilized for all matte tin-plated productto mitigate the risk of tin whiskers. This anneal process is performed within 24 hours after the matte tindeposit.Microchip Technology Inc.7

Package Qualification Summary ReportDOCUMENT CONTROL #ML11201100663.0 QUALIFICATION RESULTS3.1 Backward Solderability Compatibility Results (J-STD-002 and JESD22-B102), Note 2Plating SiteMTAI / MMT/UTL/ATP/HANA/UNIS/CARMMMS/ATK/ATC/CARMSolder Paste CompositionSn60Pb40AFlux TypeRosin FluxLead finish100% matte SnSolder Temp.215 CPackage TypeSMDResultPassedSn60Pb40ARosin Flux100% matte Sn245 CThrough holePassedSn60Pb40ASn60Pb40ARosin FluxRosin Flux100% matte Sn100% matte Sn215 C245 CSMDThrough holePassedPassedSolderTemperature265 C265 C265 C265 CPackage TypeResultSMD & Through holeSMDSMDSMDPassedPassedPassedPassed3.2 Forward Solderability Compatibility Results (MIL-STD 883 Method 2003)Plating SiteSolder Paste CompositionFlux TypeLead finishMTAI / MMTUTLATPMMTSn/Ag/Cu (96.5%/3.0%/0.5%)Sn/Ag/Cu (95.5%/4.0%/0.5%)Sn/Ag/Cu (95.8%/3.5%/0.7%)Sn/Ag/Cu (96.5%/3.0%/0.5%)100 R-type145 R-typeAlpha 100100 R-typeSn/PbSn/PbSn/PbSn/PbMicrochip Technology Inc.8