ECUcore-1021 Hardware Manual

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SYS TEC electronic GmbHECUcore-1021Hardware ManualDocument Revision:L-1589e-04Disclaimer:All data, information and technical specifications contained in this document has been subjected to athorough examination. The information in the document is current at the time of publication as long asnothing else is explicitly stated. However no liability is given for the correctness, completeness andtopicality of the contents.L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 1/30

SYS TEC electronic GmbHRevision HistoryVersion 17L-1589e-04 HardwareClassification: ReleaseChangesCreated (Module revision 4377.0)Changes to module revision 4377.1 added:- Pin connector: Signal IFC AD15 and FTM2 EXTCLK can be supportednow (optional order number) (sec. 2.4.2)- USB3.0: AC coupling capacitors are supported on-board (sec. 3.5)- SDC: Feature set of SDC corrected. (sec. 3.12)- DSM: This feature is prepared for future use, but not supported in the latestversion. (sec. 3.13)- Block diagram changed- Freescale changed to NXP- sec. 4 (Application Carrier Board) addedAlternate pin names of IFC interface are added to Table 5 and Table 6.Manual ECUcore-1021Page 2/30

SYS TEC electronic GmbHList of tbdTXUARTAnalog digital converterAnalog InputAnalog OutputBoard Support PackageController Area Network (according to ISO 11898-1:2003 and ISO 11898-2:2003)Central Processing UnitDeep Sleep ModeElectrically Erasable Programmable Read-Only Memoryembedded Multimedia cardEuropean NormEthernetFunction BlockGiga Byte (1024 x 1MB)Giga bitGigabit EthernetGround Reference potentialGeneral Purpose Input OutputHardwareInternational Electro technical CommissionInput/OutputInter-integrated circuitIntegrated Interchip SoundKilo Byte (1024 byte)Media Access Controller (e.g. Ethernet controller)Mega Byte (1024 x 1kB)Media Dependent Interfacenot connectedOperating SystemPrinted Circuit BoardProcess Data ObjectPower Management Integrated CircuitProgrammable Logical ControllerPulse Width ModulationRandom-Access MemoryReduced Gigabit Media-Independent InterfaceRead-Only MemoryReal Time ClockReceiveSynchronous Audio InterfaceSecure DigitalSystem Diagnostics ControllerSecondsSerial Gigabit Media-Independent InterfaceSerial Input OutputSafety integrity levelSerial Peripheral InterfaceSoftwareto be definedTransmitUniversal Asynchronous Receiver TransmitterL-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 3/30

SYS TEC electronic GmbHContentsList of Abbreviations . 3List of Tables . 4List of Figures . 5Reference documents . 61Introduction . 72Product Description . 82.1Orderable parts . 82.2Technical Data . 92.3Block Diagram . 122.4Module connector and pin assignment . 142.4.1 Connector type for the Carrier board . 142.4.2 Pin assignment row A and row B . 142.5Mechanical Dimensions and Heat spreader . 213Design-in Considerations . 233.1Power Supply Design considerations . 233.2Power-on RESET and RESET Configurations . 233.3Manual RESET (/MR) . 233.4System Booting . 233.5General interface design consideration . 233.6PCI Express . 253.7SGMII . 253.8SGMII/SATA . 253.9ETHERNET Interface considerations . 253.10 I2C Interface considerations . 253.11 Temperature sensor . 263.12 System Diagnostics Controller (SDC, optional) . 263.12.1 Window-Watchdog timer . 263.12.2 Real Time Clock (RTC) . 263.13 Deep sleep mode considerations . 263.14 Thermal Design considerations . 274Application Carrier Board (optional) . 285Release and Comments . 30List of TablesTable 1: Orderable parts. 8Table 2: Technical data . 11Table 3: Overview to primary and alternative signal functions of LS1021A signal groups . 13Table 4: Carrier board plug-in connector. 14Table 5: Connector pin assignment (row A) . 17Table 6: Connector pin assignment (row B) . 20Table 7: Mechanical mounting material . 22Table 8: Overview of configured on-board power rails . 23Table 9: High-speed interface trace lengths. 24Table 10: I2C line pull-up resistors . 26Table 11: I2C device addresses and bit rates . 26L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 4/30

SYS TEC electronic GmbHList of FiguresFigure 1: Block diagram ECUcore-1021 . 12Figure 2: Module dimension and location of Module connector on Carrier Board . 21Figure 3: Carrier board plug-in connector physical dimension . 22Figure 4: Mounting example of Module, Carrier Board and heat spreader . 22Figure 5: Heat spreader with mounted heat sink (dimension and details) . 27Figure 6: Heat spreader with mounted heat sink (example) . 27Figure 7: Block diagram ECUcore-1021 with Application Carrier Board . 28L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 5/30

SYS TEC electronic GmbHReference documents/1//2//3/NXP: LS1021A Reference ManualNXP: LS1021A Data SheetPCIMG: COMExpress Carrier Design Guide Rev.2.0L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 6/30

SYS TEC electronic GmbH1IntroductionTMThe ECUcore-1021 is a System On Module (SOM) based on NXP QorIQ LS1021A. The LS1021Aoffers a high density of communication and I/O interfaces combined on a single chip. This enables thecustomer to configure the chip and define the arrangement of the interfaces on the connectorindependently. This flexibility enables to use the ECUcore-1021 in a wide variety of application scenarios;from simple HMI to a complex network device.Compared to similar CPUs, the used processor provides high performance at comparatively lower powerdissipation. It can usually be used at higher temperatures in industrial environment without active cooling.This not only reduces the needed board space and makes the module very compact, but also is costeffective.The error-correcting code can be integrated as placement-option in series production, so the automaticerror detection and correction is done by hardware.To further increase the reliability of the module, there is the following diagnosis functions integrated: RTC (real-time clock)Temperature MonitoringFirmware Protection (optional)1x ADC (optional)Independent Window Watchdog (optional)L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 7/30

SYS TEC electronic GmbH22.1Product DescriptionOrderable partsPart number4001046Product nameECUcore-1021 (1GB)tbdECUcore-1021 (1GB)FeatureLS1021A, 1GB DDR3L, 128MB Flash, 40/ 85 CLS1021A, 1GB DDR3L, 128MB Flash, 40/ 85 C with support for GPCM with 16bitmultiplexed address/data bus InterfaceNotesGPCM8/GASIC8Support onlySPI1 controlleris not available.Table 1: Orderable partsOptions: Additional ECC-RAM and/or support for Profibus baud rate of 12MBaud on request.L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 8/30

SYS TEC electronic GmbH2.2Technical DataCPU coreProcessorNXP QorIQ LS1021A- Dual-core Cortex-A7 (ARM Cortex -A7 MPCorecompliant with ARMv7-A architecture)Each core includes:– 32 Kbyte L1 Instruction Cache (ECC protection)– 32 Kbyte L1 Data Cache (ECC protection)– NEON co-processor– Floating Point (FPU)– QorIQ Trust Architecture and ARM TrustZone For both cores:– 512 Kbyte unified I/D L2 Cache (ECC protection)CPU Clock1GHz each CoreMain memoryDDR3L-1600MT, 32bit ECC (optional)1GB (Optional 2GB)Boot memoryQuad-SPI NOR-Flash2x64MBMass storageSATA1x SATA3.0 controllerSD-Card1x interface for SDHC/MMC/eMMCConnectivityUp to 3x GbE Ethernet (1x on-board GbE-Phy, up to2x SGMII, 1x RGMII)On-board Phy Feature:- 10/100BASE-TX, 1000BASE-T- Auto-MDI/MDI-X- Auto-Negotiation- Digital Loopback and Analog Remote Loopbackmode- LinkMD Cable diagnosticsEthernetPCI Express2x PCI Express Gen2 controllersUSB-Host1x USB3.0 controller with integrated PhyL-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 9/30

SYS TEC electronic GmbHUARTUp to 2x DUART, up to 6x LPUARTCANUp to 4x FlexCAN modulesI2CUp to 2x I2C controllersSPIUp to 2x SPI interfaces, 1 QSPI interfaceDisplay24-bit RGB, 12bit DDR pin interfaceAUDIOUp to 4 synchronous audio interfaces (I2S/SAI)1 SPDIFTemperature sensorMeasurement of CPU junction temperatureMeasurement of board ambient temperatureMeasurement range: -55 C 150 CMisc. peripheralsFlexTimer/PWMGPIOsInterrupt inputsReal Time Clock (RTC)Current consumption (sleep mode) 1µARTC voltage bufferExternal battery or capacitorPower SupplyMain Power Supply of Module (DVDD, D1VDD)3.3V 5%Rise TimeMax. 1V/msVoltage ripple33mV @0 20MHzPower Consumption (full load)Max. 4.5WInternal power supply domainsBVDD, DVDD, D1VDD, EVDD, USB HVDD3.3VLVDD, L1VDD2.5VOVDD, O1VDD1.8VL-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 10/30

SYS TEC electronic GmbHTemperature rangeOperating-40 C/ 85 CStorage-55/ 125 C1HumidityOperating10% 90%Storage 95%MTBF 650000h @ 40 C(applied standard: Siemens SN 29500)Mechanical dimensionBoard size84mm x 55mmTable 2: Technical data1For the full operating temperature range is to ensure sufficient cooling. For the connection to a heatsink, a heat spreader is available (see accessories on SYS TEC web page http://www.systecelectronic.com/, see also sec. 3.14).L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 11/30

SYS TEC electronic GmbH2.3Block DiagramThe LS1021A signals are combined in signal groups. A signal group is selected using the RCW fieldvalue. Some signal groups serve multiple functions multiplexed by RCW field.ECUcore-1021Available Interfaces on Carrier Board:3.3VQorIQ LS1021APMICWATCHDOG CRTCCLOCKGbE PhyDDR3BatteryGbE0EC1EC2QSPI ALANE ALANE BLANE CLANE N3-4/FTM2/GPIOModule connectorFLASHRESETTrigger SPI1QSPI BI2CSPIQSPITAMPERJTAGTAMPER-DetectionFigure 1: Block diagram ECUcore-1021L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 12/30

SYS TEC electronic GmbHThe following table shows the primary and the alternative signal functions for off-board usable signals.Field Name fromLS1021A RMEC1EC2EC3MDC/MDIORTCASLEEPEVT[9] BUART EXT,UART BASEQE/TDMAQE/TDMBIIC EXT,IIC BASESDHC EXT,SDHC BASESDHCIRQ EXT,IRQ 8V1.8V3.3V3.3V3.3V3.3VPrimary signal functions(defined by SYS TEC BSP)CAN1, CAN2CAN3, CAN4RGMII3EMI1RTCASLEEPEVT[9] BUART1, LPUART1, 2D-ACE(Display)2D-ACE (Display)2D-ACE (Display)IIC1, SDHCAlternative signal functions(defined by Customer specific BSP)RGMII, GPIO3, SAI1, SAI2, FTM1GPIO3, FTM2GPIO1 14GPIO1 13GPIO2 24GPIO1, UART2, UART3, UART4,LPUART2, LPUART4, SPI2GPIO4, UC1, SAI3, FTM4GPIO4, UC3, SPDIF, SAI4, FTM4GPIO4, IIC2, SPI23.3VSDHC3.3V2.5V3.3V3.3V3.3VGPIO4 23-GPIO4 26IRQ3IRQ4, IRQ5CLK9-12SPI1 signalsGPIO2,LPUART2,LPUART5, LPUART6SDHC-LPUART3,GPIO4 19-GPIO4 22, BRG01-4IFC pinsTable 3: Overview to primary and alternative signal functions of LS1021A signal groupsL-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 13/30

SYS TEC electronic GmbH2.4Module connector and pin assignmentThis chapter describes the module pin and connector configuration. The connector on the module side iscalled receptacle, the connector on the Carrier board is called plug-in connector.Note: The connectors are COMexpress compatible types. However, the pin assignment and theconnector arrangement meet not the COMexpress standard!2.4.1 Connector type for the Carrier boardThe Carrier board shall use a 5mm or 8mm heights 220pin plug-in connector:SupplierTyco ElectronicsFoxconnBoard-to-board stack height5mm8mm5mm8mmOrder number of 2206-4131-3HTable 4: Carrier board plug-in connector2.4.2 Pin assignment row A and row BThe pin name corresponds to the primary pin name of the LS1021A called by NXP, unless there is onlyan alternative function available. In this case the pin name corresponds to the alternative function only.For description of primary and alternative function see the NXP data sheets.A pin configuration is defined by the Reset Configuration Word (RCW). The RCW is pre-installedaccording to the ordered module variant (see chapter 2.1).In contrast to the description in the NXP data sheet and Reference Manual, the active-low signals aredenoted by “/” (example: UART2 RTS B (NXP manual) is denoted as UART2 /RTS).The module has two primary power supply domains (DVDD, D1VDD) and several domains that are onboard generated (BVDD, EVDD, OVDD, O1VDD, .). For every pin, the corresponding voltage domain isspecified. An internal pull-up resistor is connected to this voltage domain then. Signals that relates tovoltage domains lower than 3.3V are marked with the voltage value in the signal name.For every pin, the recommendations of the manufacture must be noted. The information in thedata sheet of LS1021A must be observed.L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 14/30

SYS TEC electronic EEP 1V8QSPI DQS BQSPI CK BQSPI /CS B1QSPI /CS B0QSPI DIO B3QSPI DIO B2 (IFC /PERR)QSPI DIO B1 (IFC PAR1)QSPI DIO B0 (IFC PAR0)GNDIFC CLK1IFC CLK0IFC /RB0VoltagedomainO1VDD (1.8V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)A15IFC /WE0BVDD (3.3V)A16A17IFC CLEIFC /OEBVDD (3.3V)BVDD (3.3V)A18A19IFC BCTLIFC AVDBVDD (3.3V)BVDD (3.3V)A20SPI1 SIN (IFC AD15)BVDD (3.3V)A21A22A23A24A25GNDSPI1 SCKSPI1 PCS0 (IFC /CS1)IFC /CS0IFC AD14BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)NotesInternal pull-up resistor (4.7kΩ)Note 1This Pin has an internal pull-up resistor of4.7kΩ.This Pin has an internal pull-down resistor of4.7kΩ.Pin must NOT be pulled down during power-onreset.Pin is actively driven during reset.Pin must NOT be pulled down during power-onreset. This Pin has an internal pull-up resistor of4.7kΩ.Optionally, this pin can be configured asIFC AD15 signal on request (assembly variant,see ).Note 1Select Boot device:1 QSPI-Flash is Boot device (Default)0 SD-Card is Boot deviceThis pin is a reset configuration pin and has aninternal pull-up resistor of 10kΩ. According tothe external pin configuration see also Note 1.A26A27A28A29A30A31A32A33A34SPI1 SOUT (IFC AD13)SPI1 PCS5 (IFC AD12)SPI1 PCS4 (IFC AD11)SPI1 PCS3 (IFC AD10)SPI1 PCS2 (IFC AD9)GNDSPI1 PCS1 (IFC AD8)IFC AD7IFC AD6L-1589e-04 HardwareClassification: ReleaseBVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)Manual ECUcore-1021Note 2Note 2Note 2Note 1Note 2Note 2Page 15/30

SYS TEC electronic A48IFC AD5IFC AD4IFC AD3IFC AD2IFC AD1IFC AD0GNDUSB1 TX PUSB1 TX MUSB1 RX PUSB1 RX MUSB1 DPUSB1 DMUSB1 VBUSVoltagedomainBVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)BVDD (3.3V)USB VBUSA49A50A51A52A53A54A55A56A57A58A59A60A61GPIO4 26GPIO4 25GNDGPIO4 24GPIO4 23SDHC DAT3SDHC DAT2SDHC DAT1SDHC DAT0SDHC CLKSDHC CMDGNDSDHC WP/I2C2 SDADVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)EVDD (3.3V)EVDD (3.3V)EVDD (3.3V)EVDD (3.3V)EVDD (3.3V)EVDD (3.3V)DVDD (3.3V)A62SDHC /CD/I2C2 SCLDVDD (3.3V)A63A64A65VBATRTC 1V8TA BB RTC 1V0A66/TA TD 1V8OVDD (1.8V)TA BB VDD(1.0V)OVDD (1.8V)A67/TA BB TD 1V0TA BB VDD(1.0V)A68A69/TEST SEL 1V8THERM /CRITO1VDD (1.8V)DVDD (3.3V)A70A71A72GND/EVT3 1V8/EVT4 1V8O1VDD (1.8V)O1VDD (1.8V)L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021NotesSee CPU datasheet for interfacerecommendationIf configured as I2C interface signal this pin isan open-drain signal and a pull-up resistor of1kΩ should be placed on this pin to 3V3.If configured as I2C interface signal this pin isan open-drain signal and a pull-up resistor of1kΩ should be placed on this pin to 3V3.On-board RTC power supply pin (2.0V 3.6V)Internal pull-down resistor (10kΩ)Internal pull-down resistor (10kΩ)Tamper Detect input TA TMP DETECT B(Internal pull-up resistor of 1kΩ)Low Power Tamper Detect(TA BB TMP DETECT B) (Internal pull-upresistor of 1kΩ)Internal pull-up resistor (1kΩ)Open-drain output of CPU temperature sensorto signal critical temperature values (Internalpull-up resistor (4.7kΩ) to 3.3V), see chap. 3.11Internal pull-up resistor of 10kΩInternal pull-up resistor of 10kΩPage 16/30

SYS TEC electronic A102CLK2 25M 3V3GNDSD1 RX3 PSD1 RX3 NGNDSD1 TX3 PSD1 TX3 NGNDSD1 CLK0 PSD1 CLK0 NGNDSD1 RX0 PSD1 RX0 NGNDSD1 TX0 PSD1 TX0 N3V3GNDUART2 TXUART2 RXUART2 /RTSUART2 /CTSUART1 RXUART1 TXUART1 /RTSUART1 /CTSCLK11GNDCLK12/MRVoltagedomainDVDD (3.3V)DVDDD1VDD (3.3V)D1VDD (3.3V)D1VDD (3.3V)D1VDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)D1VDD (3.3V)A103/PORSTD1VDD (3.3V)A104A105A106A107A108A109A110/HRESET 1V8/RESET REQ 1V83V3 D1VDD3V3 D1VDD3V3 D1VDD3V3 D1VDDGNDO1VDD (1.8V)O1VDD (1.8V)D1VDDD1VDDD1VDDD1VDD-Notes25MHz Reference clock for external devicesSERDES Lane D Receive data (positive)SERDES Lane D Receive data (negative)SERDES Lane D Transmit data (positive)SERDES Lane D Transmit data (negative)PCIe 100MHz Reference clock (positive)PCIe 100MHz Reference clock (negative)SERDES Lane A Receive data (positive)SERDES Lane A Receive data (negative)SERDES Lane A Transmit data (positive)SERDES Lane A Transmit data (negative)Module power supply input (switchable) DVDDSignal UART2 SOUT of LS1021ASignal UART2 SIN of LS1021ASignal UART1 SIN of LS1021ASignal UART1 SOUT of LS1021AThis Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.low-active Manual RESET input (internal pull-upresistor of 10kΩ)Open-drain RESET output of PMIC with internalpull-up resistor of 10kΩThis pin has an internal pull-up resistor of 1kΩ.This pin has an internal pull-up resistor of 1kΩ.Module power supply input (always on) D1VDDModule power supply input (always on) D1VDDModule power supply input (always on) D1VDDModule power supply input (always on) D1VDDTable 5: Connector pin assignment (row A)L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 17/30

SYS TEC electronic GmbHPinNameVoltage domainD1VDD (3.3V)B1GNDB2I2C1 SCLB3B4B5B6B7B8B9B10B11B12B13I2C1 SDASDC SWD CLKSDC SWD DIOSDC /BOOTSDC /RESETWDTIWDTOSDC ADC0GNDSDC CLKOUT/IRQ0 1V8B14B15/IRQ1 1V8/IRQ2 2V5B16/IRQ3 2V5D1DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)O1VDD (1.8V)OVDD (1.8V)L1VDD (2.5V)LVDD (2.5V)DVDD 1B32B33B34B35B36B37B38B39/IRQ4 3V3/IRQ5 3V3/EVT9 1V8IFC TEGNDEC1 TXD0EC1 TXD1EC1 TXD2EC1 TXD3EC1 RX DVEC1 RXD0EC1 RXD1EC1 RXD2EC1 RXD3GNDEC1 RX CLKEC1 GTX CLKEC1 GTX CLK125EC1 TX ENCLK3 25M 2V5EMI1 MDCEMI1 MDIOEC2 RX CLKL-1589e-04 HardwareClassification: ReleaseDVDD (3.3V)O1VDD (1.8V)BVDD (3.3V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)LVDD (2.5V)L1VDD (2.5V)L1VDD (2.5V)LVDD (2.5V)Manual ECUcore-1021NotesSignal IIC1 SCL of LS1021A (open-drain) withinternal pull-up resistor of 7.5kΩSignal IIC1 SDA of LS1021A (open-drain) withinternal pull-up resistor of 7.5kΩReserved (Internal pull-down resistor of 10kΩ)Reserved (Internal pull-up resistor of 10kΩ)Reserved (Internal pull-up resistor of 4.7kΩ)Reserved (Internal pull-up resistor of 4.7kΩ)Watchdog trigger input (floating to disable watchdog)Watchdog outputReserved (SDC analog Input ADC0)Reserved (RTC clockout)Internal pull-up resistor of 1kΩInternal pull-up resistor of 1kΩThis pin is connected internal to the PMIC interruptoutput (open-drain).Internal pull-up resistor of 4.7kΩInternal pull-up resistor of 4.7kΩThis pin is connected internal to the Ethernet Phyinterrupt output (open-drain).Internal pull-up resistor of 4.7kΩThis pin is connected internal to the SDC interruptoutput (optional, open-drain) and Temperaturesensor interrupt output (open-drain).Internal pull-up resistor of 4.7kΩInternal pull-up resistor of 10kΩInternal pull-up resistor of 4.7kΩInternal pull-up resistor of 4.7kΩPage 18/30

SYS TEC electronic GmbHPinNameB40B41B42B43B44B45B46B47B48B49B50B51EC2 TX ENGNDEC2 RX DVEC2 TXD0EC2 TXD1EC2 TXD2EC2 TXD3EC2 RXD0EC2 RXD1EC2 RXD2EC2 RXD3GNDB52GBE0 D-B53GBE0 D B54GBE0 C-B55GBE0 C B56GBE0 B-B57GBE0 B B58GBE0 A-B59B60GBE0 A GNDVoltage domainLVDD (2.5V)LVDD (2.5V)LVDD (2.5V)LVDD (2.5V)LVDD (2.5V)LVDD (2.5V)LVDD (2.5V)LVDD (2.5V)LVDD (2.5V)LVDD (2.5V)-NotesGigabit Ethernet Interface 0:MDI[3]-, negative signal of differential pairGigabit Ethernet Interface 0:MDI[3] , positive signal of differential pairGigabit Ethernet Interface 0:MDI[2]-, negative signal of differential pairGigabit Ethernet Interface 0:MDI[2] , positive signal of differential pairGigabit Ethernet Interface 0:MDI[1]-, negative signal of differential pairGigabit Ethernet Interface 0:MDI[1] , positive signal of differential pairGigabit Ethernet Interface 0:MDI[0]-, negative signal of differential pairGigabit Ethernet Interface 0:MDI[0] , positive signal of differential pairGigabit Ethernet Interface 0: LINK LED (Green)LINK off: GBE0 LED2 H LED OFFLINK on: GBE0 LED2 L LED ONB61GBE0 LED2B62GBE0 LED1Note: Internal pull-down resistor of 1kΩ.Gigabit Ethernet Interface 0: ACTIVITY LED (Yellow)No Activity:GBE0 LED1 H LED OFFActivity (Rx, Tx): GBE0 LED1 Toggle LEDBlinkingOVDD (1.8V)B63JTAG VREF 1V8B64B65B66B67B68B69B70B71B72JTAG /RESETJTAG TMSJTAG TCKJTAG TDOJTAG TDI/EVT0 1V8GND/EVT1 1V8/EVT2 1V8OVDD (1.8V)L-1589e-04 HardwareClassification: ReleaseOVDD (1.8V)OVDD (1.8V)OVDD (1.8V)OVDD (1.8V)O1VDD (1.8V)O1VDD (1.8V)O1VDD (1.8V)Manual ECUcore-1021Note: Internal pull-up resistor of 10kΩ.Reference voltage of 1.8V for JTAG interface(Internal series resistor of 270Ω)This signal triggers the /PORESET signal ofLS1021A during boundary scan test session.Signal TMS of LS1021ASignal TCK of LS1021A (Internal pull-up of 10kΩ)Signal TDO of LS1021ASignal TDI of LS1021AInternal pull-up resistor of 10kΩInternal pull-up resistor of 10kΩInternal pull-up resistor of 10kΩPage 19/30

SYS TEC electronic B102B103CLK1 25M 3V3GNDSD1 RX1 NSD1 RX1 PGNDSD1 TX1 NSD1 TX1 PGNDSD1 CLK2 NSD1 CLK2 PGNDSD1 RX2 NSD1 RX2 PGNDSD1 TX2 NSD1 TX2 P3V3GNDCLK10CLK09TDMB RQTDMB TSYNCTDMB TXDTDMB RSYNCTDMB RXDTDMA RQTDMA TSYNCGNDTDMA TXDTDMA RSYNCTDMA RXDB104B105B106B107B108B109B1102V5 LVDD3V33V3 D1VDD3V3 D1VDD3V3 D1VDD3V3 D1VDDGNDVoltage domainDVDD (3.3V)-NotesSERDES Lane B Receive data (negative)SERDES Lane B Receive data (positive)SERDES Lane B Transmit data (negative)SERDES Lane B Transmit data (positive)PCIe 100MHz Reference clock (negative)PCIe 100MHz Reference clock (positive)SERDES Lane C Receive data (negative)SERDES Lane C Receive data (positive)-DVDDDVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)DVDD (3.3V)LVDDDVDDD1VDDD1VDDD1VDDD1VDD-SERDES Lane C Transmit data (negative)SERDES Lane C Transmit data (positive)Module power supply input (switchable) DVDDThis Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.This Pin has an internal series resistor of 33Ω.Power supply output 2.5V to supply external levelshifterModule power supply input (switchable) DVDDModule power supply input (always on) D1VDDModule power supply input (always on) D1VDDModule power supply input (always on) D1VDDModule power supply input (always on) D1VDDTable 6: Connector pin assignment (row B)Note 1: This pin is a reset configuration pin and has an internal pull-up resistor of 4.7kOhm. The signalmust be high after reset. If there is any device on the net of customer carrier board that might pull downthe value of the net at reset, a pull-up or active driver is needed.Note 2: This pin is a reset configuration pin and has an internal pull-down resistor of 1kOhm. The signalmust be low after reset. If there is any device on the net of customer carrier board that might pull up thevalue of the net at reset, a pull-down or active driver is needed.L-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 20/30

SYS TEC electronic GmbH2.5Mechanical Dimensions and Heat spreaderFigure 2 shows the dimension of the module as well as the location of the connector on the Carrier Board.Please note that this is a view of the Carrier Board through the Module.Figure 2: Module dimension and location of Module connector on Carrier BoardL-1589e-04 HardwareClassification: ReleaseManual ECUcore-1021Page 21/30

SYS TEC electronic GmbHIt is important

UART Universal Asynchronous Receiver Transmitter . SYS TEC electronic GmbH L-1589e-04 Hardware Manual ECUcore-1021 Page 4/30 Classification: Release . - Dual-core Cortex-A7 (ARM Cortex -A7 MPCore . UART Up to 2x DUART, up to 6x LPUART CAN Up to 4x FlexCAN modules

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