SFO17-403 Optimizing The Design And Implementation Of KVM/ARM - Linaro
SFO17-403: Optimizing the Design and Implementation of KVM/ARMChristoffer Dallconnect.linaro.org
““Efficient, isolated duplicateof the real machine””–Popek and Golberg[Formal requirements for virtualizable third generation architectures ’74]ENGINEERS AND DEVICESWORKING TOGETHER
lOS KernelHypervisorHardwareHardwareNativeVirtual MachinesENGINEERS AND DEVICESWORKING TOGETHER
Hypervisor DesignType 1 HardwareENGINEERS AND DEVICESWORKING TOGETHER
Hypervisor DesignType 1 (Standalone)VMAppType 2 ardwareVMAppKernelOS KernelAppAppKernelHypervisorHardwareENGINEERS AND DEVICESWORKING TOGETHER
Hypervisor S AND DEVICESWORKING TOGETHER
ARM Virtualization ExtensionsEL0UserEL1KernelEL2HypervisorENGINEERS AND DEVICESWORKING TOGETHER
ARM VE and Xen?ENGINEERS AND DEVICESWORKING TOGETHER
KVM/ARMHostEL0EL1AppVMAppAppKVMLinux3. HypercallKernel2. Return1. HypercallEL2switchstateApp4. ReturnKVM lowvisorENGINEERS AND DEVICESWORKING TOGETHER
KVM/ARMHostEL0AppVMAppAppKernelEL11. HypercallEL2AppLinux2. ReturnKVMENGINEERS AND DEVICESWORKING TOGETHER
ARMv8.1 VHEEL0 AppAppVirtualization Host ExtensionsSupports running unmodifiedOSes in EL2 without using EL1EL1EL2LinuxENGINEERS AND DEVICESWORKING TOGETHER
VHE: Backwards Compatible HCR EL2.E2H complete enables and disables VHE When disabled, completely backwards compatible with ARMv8.0 Example: Xen disables VHEENGINEERS AND DEVICESWORKING TOGETHER
VHE: Expands Functionality of EL2 Expanded EL2 functionality New registers: TTBR1 EL2, CONTEXTIDR EL2 New virtual EL2 timerENGINEERS AND DEVICESWORKING TOGETHER
VHE: Support Userspace in EL0 TGE: Trap General Exceptions Routes all exceptions to EL2 VHE no longer disables EL0 stage 1 MMUEL0AppEL1EL2AppExceptionsLinuxENGINEERS AND DEVICESWORKING TOGETHER
VHE: EL2&0 Translation Regime Same page table format as EL1 Used in EL0 with TGE bit setENGINEERS AND DEVICESWORKING TOGETHER
VHE: System Register RedirectionHCR EL2.E2H 0TCR EL1mrs x0, TCR EL1TCR EL2ENGINEERS AND DEVICESWORKING TOGETHER
VHE: System Register RedirectionHCR EL2.E2H 1TCR EL1mrs x0, TCR EL1TCR EL2ENGINEERS AND DEVICESWORKING TOGETHER
VHE Register Redirectionmrs x0, TCR EL12TCR EL1ENGINEERS AND DEVICESWORKING TOGETHER
More VHE Register Redirection Some registers change bit position to be similar between EL1 and EL2 Example: CNTHTCL EL2 changes layout to match CNTKCTL EL1 with extrabitsENGINEERS AND DEVICESWORKING TOGETHER
Legacy KVM/ARM without VHELinuxEL1Run VMHypervisorKVMTrapEL2LowvisorENGINEERS AND DEVICESWORKING TOGETHER
KVM/ARM with VHELinuxRun VMEL2HypervisorKVMFunctionCallLowvisorENGINEERS AND DEVICESWORKING TOGETHER
Experimental Setup*Measurements obtained using Linux in EL2. See BKK16 talk. AMD Seattle B0 64-bit ARMv8-A 2.0 GHz AMD A1100 CPU 8-way SMP 16 GB RAM 10 GB Ethernet (passthrough)ENGINEERS AND DEVICESWORKING TOGETHER
VHE Performance at First Glance*Measurements obtained using Linux in EL2. See BKK16 talk.CPU Clock Cyclesnon-VHEVHE*Hypercall3.1813.045ENGINEERS AND DEVICESWORKING TOGETHER
KVM/ARM Optimization #1HostEL0 Avoid saving/restoringEL1 register stateAppVMAppAppKernelEL1EL2AppLinuxKVMENGINEERS AND DEVICESWORKING TOGETHER
KVM/ARM Optimization #2Host Legacy KVM/ARM designenabled/disabled virtualizationfeatures on every l/Physical interruptsDisable traps Stage 2 memory translationEL2KVM LowvisorEnable trapsENGINEERS AND DEVICESWORKING TOGETHER
KVM/ARM Optimization #2Host Leave virtualizationfeatures enabledEL0AppVMAppHost EL2 never usesstage 2 translationsand always has fullhardware access.EL2AppKernelEL1 AppLinuxKVMENGINEERS AND DEVICESWORKING TOGETHER
KVM/ARM Optimization #3 Don’t context switchthe timer on every exitfrom the VM Completely reworks thetimer code 20 patches on listENGINEERS AND DEVICESWORKING TOGETHER
KVM/ARM Optimization #4 Reduce run loop work Do work in vcpu load and vcpu put instead Called when entering/exiting run-loop Called when preempted/scheduled Requires VHEvcpu loadvcpu runloopvcpu putENGINEERS AND DEVICESWORKING TOGETHER
KVM/ARM Optimization #5 Rewrite the worldswitch codekvm arch vcpu ioctl run{.while (1) {.if (has vhe() /* static key */ret kvm vcpu vhe run(vcpu);elseret kvm call hyp( kvm vcpu run, vcpu);.}.}ENGINEERS AND DEVICESWORKING TOGETHER
Microbenchmark Results*Measurements obtained using Linux in EL2. See BKK16 talk.CPU Clock Cyclesnon-VHEVHE OPT *x86Hypercall3.1817521.437I/O Kernel3.9921.6042.565I/O User6.6657.6306.732Virtual IPI14.1552.5263.102ENGINEERS AND DEVICESWORKING TOGETHER
Application WorkloadsApplicationDescriptionKernbenchKernel compileHackbenchScheduler stressNetperfNetwork performanceApacheWeb server stressMemcachedKey-Value store
Application WorkloadsNormalized overhead(lower is better)non-VHEVHE OPT**Measurements obtained using Linux in EL2. See BKK16 CPTMPCSTRAETRRCPAehcpadehaccmeMENGINEERS AND DEVICESWORKING TOGETHER
Conclusions Optimize and redesign KVM/ARM for VHE Reduce hypercall overhead by more than 75% Better cycle counts than x86 for key hypervisor operations Network benchmark overhead reduced by 50% Key-value store workload overhead reduced by more than 80%ENGINEERS AND DEVICESWORKING TOGETHER
Upstream Status Timer patches on list Core optimization patches coming soonENGINEERS AND DEVICESWORKING TOGETHER
KVM/ARM Optimization #2 VM Kernel EL0 App App EL1 EL2 Host App App Linux KVM Legacy KVM/ARM design enabled/disabled virtualization features on every transition Virtual/Physical interrupts Stage 2 memory translation KVM Lowvisor Disable traps Enable traps
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