Ieee Si Photonics May19 2009

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Silicon Photonics Dr. Mario Paniccia Intel Fellow Director, Photonics Technology Lab Intel Corporation www.intel.com/go/sp May 19 2009 IEEE conf

Agenda Motivation History & Progress Intel’s Research Program Building Block Results –Modulator, detector, hybrid laser Integrated 200Gb/s Test chip F t Future work k and d Summary S 2

Moving to Interconnects Optical Copper Chip to Chip 1 – 50 cm Metro & Long Haul Billions 0.1 – 80 km 50 – 100 cm Volume es Board to Board Millions Rack to Rack 1 to 100 m Thousands Decreasing Distances Drive D i optical ti l to t high hi h volumes and low costs 3

EN NERGY-EF FFICIENT P PERFORMA ANCE Tera--leap to Parallelism: Tera 10’s to 100’s of cores Era of Tera--Scale Tera Computing Quad-Core Dual Core Hyper-Threading Instruction level parallelism More performance Using less energy The days of single--core chips single TIME All this thi compute t capability bilit will ill drive d i need d for high speed optical links 4

Future Physical I/O for TeraTera-scale Servers Core-Core: On Die CoreInterconnect fabric Memory: Package 3D Stacking Chip-Chip: Fast Copper ChipFR4 or Flex cables Memory Tb/s of I/O Memory M TeraTera-scale CPU M Memory CPU 2 Memory Integrated Tb/s Optical Chip? 5

Future: A Terabit Optical Chip Optical Fiber Multiplexer 25 modulators at 40Gb/s 25 hybrid lasers A future integrated g terabit p per second optical i l link li k on a single i l chip hi 6

Motivation History & Progress Intel’s Research Program Building Block Results –Modulator, detector, hybrid laser I t Integrated t d 200Gb/ 200Gb/s Test T t chip hi Future work & Summary 7

Photonics Evolution ? What could Integrated Photonics Deliver? 8

Silicon as an Optical Material Intel Litho Photon Energy (eV) 2.76 1.55 W Wavelength l th (µm) ( ) 0.45 0 45 08 0.8 9Transparent p 1.1 μ μm 9High index 9CMOS Compatible 1.1eV 0.41 1 12 1.12µm 30 3.0 Comms Window / Low light emission efficiency / No electro-optical effect / No detection in 1 1.3-1.6 3-1 6 μm 9Low cost material Silicon ttraditionally Sili diti ll NOT optical material of choice 9

Si Photonics Recent Progress *This is not exhaustive Polarization Indep. Rings Surrey Raman λ Conv. Raman Laser UCLA UCLA Modeled GHz PIN Modulator GHz MOS Modulator Surrey, Naples Pioneering work by Dr. Richard Soref (early 1980’s) Integrated APD TIA DGADC Surrey UT Intel 30GHz Si Si--Ge Photodetector IBM Stanford Hybrid Silicon Laser Stim--Emission Stim Intel - UCSB QCSE in Si 40Gb/s Raman Broadband Amp & λ Conv. CW Raman Laser Amplification Intel Ring Laser Cornell 10Gb/s Modulator Intel Brown Intel Luxtera Intel, 1.5Gb/s Ring Mod. Cornell PBG WG 25dB/cm PBG WG 7dB/cm PBG WG 3db/cm NTT, Cornel IBM IBM, FESTA, NTT NTT 2003 2004 DTU Intel 39GHz SiSi-Ge 40Gb/ SiGe 40Gb/s SiG 10Gb/ SiG SiGe PIN Photodetector 10Gb/s Wave Guide PIN Commercial Inverted Taper 2002 E-O Effect Strained--Si 40Gb/s Modulator Strained Univ. Stuttgart 2005 Quality Intel Intel 2006 Device performance making D i f ki significant advances 10 2007

Intel’s Intel s Silicon Photonics Research First: Innovate to prove silicon is a viable optical material 11

Intel’s Silicon Photonics Research Innovating with low-cost low cost silicon to create new optical devices 1st Continuous Wave Silicon Raman Laser (Feb ‘05) Hybrid Silicon Laser (Sept. ‘06) Silicon Modulators 1GHz ( Feb ‘04) 10 Gb/s (Apr ‘05) 40 Gb/s (July ’07) 8-channel integrated 200Gb/s (May ’08) 40 Gb/s PIN Photodetectors (Aug. ’07) Avalanche Photodetectors with 340 GHz Gain Gain*BW BW (Dec 08) Inte Confidential

Integration Vision Time ECL Modulator Multiple Channels Filter Drivers CMOS Circuitry Integrated in Silicon First: Prove Silicon good optical material Many at 40Gb/s Photodetectors DEMUX TIA Passive Alignment TIA Taper Receiver Chi Chip Photodetector FUTURE Monolithic? Passive Align Driver Chip Lasers Level of integration Determined by Application/cost MUX Next Integration: silicon devices into hybrid modules Increasing I i silicon ili integration over time 13

Motivation History & Progress g Intel’s Research Program Building Block Results –Modulator, detector, hybrid laser – Integrated 200Gb/s Test chip Future work & Summary 14

Modulation Direct or External modulation External used for 10G at 12km Direct Modulation 10101010 dispersion chirp Fiber Data rate limited External Modulation 1 01 01 Very Fiber ib N electro-optic No l t ti effect ff t use free carriers 15

Intel’s Second Generation: Silicon Modulator input 1x2 MMI 2x1 MMI output pn phase shifters Metal contact Phase shifter waveguide g SEM p picture of p p-n p phase shifter -Based on traveling wave design p optical p & electrical RF -Optimized 16

40 Gbps Data Transmission 40 Gbps p Optical Roll-off (1mm phase shifter) Normaliized Modulator Output (dB) 1 0 -1 -2 2 -3 -4 -5 On-chip termination E t External l ttermination i ti -6 -7 -8 0 1 10 Frequency (GHz) Optical 3 dB roll off 30 GHz (parasitic effect included) 6 dB electrical roll-off 40 GHz ((no p parasitic effect included)) Measured phase efficiency 3.3 V-cm 17 100

Photodetection Silicon does not absorb IR well Using SiGe to extend to 1.3µm Ge Must overcome lattice mismatch Bulk Films of Si and Ge Strained Si1-xGex on Si Relaxed Si1-xGex on Si Si aGe .565 nm aSi .543 nm misfit dislocation Misfit dislocations typically create threading dislocations which degrade device performance - dark current (Idk) goes up. up. Mustt simultaneously M i lt l achieve hi required i d speed, responsivity, & dark current. 18

Waveguide Photodetector Design Passivation N-contact N-Ge i-Ge Ge P-contact Rib waveguide g Si SiO2 (BOX) Si (Substrate) SEM Cross-Section 19 P-contact

3 7.4um x 50um, -2V 4.4um x 100um,, -2V 0 -3 -6 -9 Bandwidth (GH Hz) Rela ative Resp ponsivity ((dB) SiGe WG PIN - High Speed Performance 35 30 25 20 7.4um x 50um 4.4um x 100um 15 10 5 -12 8 10 0 1 2 3 4 Voltage (V) 9 10 40 Gb/s Eye Diagram 5 10 10 Frequency (Hz) 31 GHz Optical Bandwidth 95% Quantum Efficiency Operating at λ 1.56um 200nA of dark current 20

Hybrid Silicon Laser Collaboration with UCSB The Indium Phosphide emits the light into the silicon waveguide The silicon acts as laser cavity: Silicon waveguide routes the light Laser performance determined by Silicon waveguide i.e WDM performance determined gratings by etch silicon No alignment needed 10’s if not 100’s of lasers with ONE bond Combines best of both materials 21

Hybrid Laser Structure SEM (Scanning Electron Microscope) Photograph 22

Single Wavelength Hybrid Laser Intel & UCSB integrate g grating mirrors in silicon, enabling wavelengthwavelength-specific laser light output The Device 1000um 150 um Inte Confidential IDF August 2008

Single Wavelength Results Optical Spectrum Linewidth Measurement - 8 mW output power at room temperature - Single wavelength with 50 dB side mode suppression ratio - 3.6 MHz line width (de (de--convolved from measurement) Inte Confidential

Motivation History & Progress Intel’s Research Program Building g Block Results –Modulator, detector, hybrid laser Integrated 200Gb/s Test chip Future work & Summary 25

Integrated SiP Test chip Learning Vehicle: target 100Gb/s λ1 Si MZMs 10-25Gb/s λ1,λ2, ,λ8 8:1 Muxx input 1:8 Demuxx λ2 output λ1,λ2, ,λ8 λ8 Learning vehicle for: Process P integration i i Electrical and high speed packaging Performance, die variation, uniformity 26

Integrated Test chip RF inputs Input Output Fiber Fiber controls 27

Integrated TX: Results 1534.6 1537.8 1541 1544.2 1547.4 1550.7 1553.9 1557.1 All 8 channels yielded open 25 Gbps optical eyes close to expectation. e pectat o Aggregate data rate of 200 Gbps Good step toward Tb/s 28

Moti tion Motivation History & Progress Intel’s Research Program Building Block Results –Modulator, detector, hybrid laser Integrated g 200Gb/s / Test chip p Future work & Summary 29

Future: A Terabit Optical Chip Optical Fiber Multiplexer 25 modulators at 40Gb/s 25 hybrid lasers A future integrated g terabit p per second optical i l link li k on a single i l chip hi 30

Integrating into a Tera Tera--scale System This transmitter would be combined with a receiver Rx Tx Which could then be built into an integrated, silicon photonic chip!! 31

Integrating into a Tera Tera--scale System This integrated silicon photonic chip hi could ld th then be b integrated i t t d into computer boards And this board could be integrated into a TeraTera-sca system y 32

Summary Future multimulti-core processors will continue to drive I/O bandwidth needs to Tb/s data rates in near future pushing need for optical interconnects Cost will be primary driver for enabling optical links in and around the PC and Server Silicon Photonics device performance advancing at a rapid rate. Need to continue pushing higher levels of integration ((ie ie 200G, 200G, 400G etc) Next phase of challenges will be with integration combined with l low costt packaging k i Overall solution must focus on power efficiency, integration and cost tradeoffs 33

Silicon Photonics’ Future ECL Modulator Multiple Channels Ch l Filter Drivers CMOS Circuitry TIA Passive Alignment g TIA Photodetector www.intel.com/go/sp 34

Electronics: Economics of Moore’s Law SCALING WAFER SIZE HIGH VOLUME LOWER COST Integration & increased functionality 35

The Opportunity pp y of Silicon Photonics Enormous ( billions)) CMOS infrastructure,, process p learning, and capacity – Draft continued investment in Moore’s law Potential to integrate multiple optical devices Micromachining could provide smart packaging Potential to converge computing & communications To benefit T b fit from f this thi optical ti l wafers f must run alongside existing product. 36

Guiding Light with Si Waveguides SEM IMAGES Ex: Rib waveguide oxide Silicon oxide Silicon Proven area for silicon High index small structures – Strip St i and d Photonic Ph t i crystals t l ffor further f th scaling li Splitters, couplers, gratings, AWGs, MMIs have all been demonstrated Continue to reduce size while maintaining performance 37

Intel's Silicon Photonics Research Innovating with lowInnovating with low-cost silicon to create new optical devicescost silicon to create new optical devices 1st Continuous Wave Silicon Raman Laser (Feb '05) Hybrid Silicon Laser (Sept. '06) Silicon Modulators 1GHz ( Feb '04) 10 Gb/s (Apr '05) 40 Gb/s (July '07) 8-channel integrated

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