EFM32TG Reference Manual - Keil
Preliminary.the world's most energy friendly microcontrollersEFM32TG Reference Manual"Tiny Gecko" SeriesPreliminary 32-bit ARM Cortex-M3 processor running at up to 32 MHzUp to 32 KB Flash and 4 KB RAM memoryEnergy efficient and autonomous peripheralsUltra low power Energy Modes with Sub µ operationFast wake-up time of only 2 µsThe EFM32TG microcontroller series revolutionizes the 8- to 32-bit market with acombination of unmatched performance and ultra low power consumption in bothactive- and sleep modes. EFM32TG devices consume as little as 160 µA/MHz in runmode, and as little as 900 nA with a Real Time Counter running, Brown-out and fullRAM and register retention.EFM32TG's low energy consumption outperforms any other available 8-, 16-,and 32-bit solution. The EFM32TG includes autonomous and energy efficientperipherals, high overall chip- and analog integration, and the performance of theindustry standard 32-bit ARM Cortex-M3 processor.
Preliminary.the world's most energy friendly microcontrollers1 Energy Friendly Microcontrollers1.1 Typical ApplicationsThe EFM32TG Tiny Gecko is the ideal choice for demanding 8-, 16-, and 32-bit energy sensitiveapplications. The devices are developed to minimise the product of power and time over all phasesof MCU operation. This unique combination of ultra low energy consumption and the performance ofthe 32-bit ARM Cortex-M3 processor helps designers get more out of the available energy source in avariety of applications.Ultra low energy EFM32TG microcontrollers are perfect for: Gas meteringEnergy meteringWater meteringSmart meteringAlarm and security systemsHealth and fitness applicationsIndustrial and home automation0 1 2 341.2 EFM32TG DevelopmentBecause EFM32TG use the Cortex-M3 CPU, embedded designers benefit from a large existingecosystem of industry standard development. The development suite spans the whole design processand includes powerful debug tools and some of the world’s top brand compilers. Libraries withdocumentation and user examples shorten time from idea to market release.The range of EFM32TG devices ensures easy migration and feature upgrade possibilities.2011-05-19 - d0034 Rev0.912www.energymicro.com
Preliminary.the world's most energy friendly microcontrollers2 About This DocumentThis document contains reference material for the EFM32TG series of microcontrollers. All modules andperipherals in the EFM32TG series devices are described in general terms. Not all modules are presentin all devices and the feature set for each device might vary. Such differences, including pinout, arecovered in the device-specific datasheets.2.1 ConventionsRegister NamesRegister names are given with a module name prefix followed by the short register name:TIMERn CTRL - Control RegisterThe "n" denotes the module number for modules which can exist in more than one instance.Some registers are grouped which leads to a group name following the module prefix:GPIO Px DOUT - Port Data Out RegisterThe "x" denotes the port instance (A,B,.)Bit FieldsRegisters contain one or more bit fields which can be 1 to 32 bits wide. Bit fields wider than 1 bit aregiven with start and stop bit (x:y).AddressThe address for each register can be found by adding the modules base address (found in MemoryMap), with the offset address for the register (found in module Register Map).Access TypeThe register access types used in the register descriptions are explained in Table 2.1 (p. 3) .Table 2.1. Register Access TypesAccess TypeDescriptionRRead only. Writes are ignoredRWReadable and writableRW1Readable and writable. Only writes to 1 have effectW1Read value undefined. Only writes to 1 have effectWWrite only. Read value undefined.RWHReadable, writable and updated by hardwareNumber format0x prefix is used for hexadecimal numbers0b prefix is used for binary numbersNumbers without prefix are in decimal representation.Reserved2011-05-19 - d0034 Rev0.913www.energymicro.com
Preliminary.the world's most energy friendly microcontrollersRegisters and bit fields marked with reserved are reserved for future use. These should be written to 0unless otherwise stated in the Register Description. Reserved bits might be read as 1 in future devices.Reset ValueThe reset value denotes the value after reset.Registers denoted with X have unknown value out of reset and need to be initialized before use. Note thatread-modify-write operations on these registers before they are initialized results in undefined registervalues.Pin ConnectionsPin connections are given with a module prefix followed by a short pin name:USn TX (USART n TX pin)The location for the pin names given in the module documentation can be found in the device-specificdatasheet.2.2 Related DocumentationFurther documentation on the EFM32TG family and the ARM Cortex-M3 can be found at the EnergyMicro and ARM web pages:www.energymicro.comwww.arm.com2011-05-19 - d0034 Rev0.914www.energymicro.com
Preliminary.the world's most energy friendly microcontrollers3 System Overview3.1 IntroductionThe EFM32 MCUs are the world’s most energy friendly microcontrollers. With a unique combination ofthe powerful 32-bit ARM Cortex-M3, innovative low energy techniques, short wake-up time from energysaving modes, and a wide selection of peripherals, the EFM32TG microcontroller is well suited forany battery operated application as well as other systems requiring high performance and low-energyconsumption, see Figure 3.1 (p. 7) .3.2 Features ARM Cortex-M3 CPU platform High Performance 32-bit processor @ up to 32 MHz Wake-up Interrupt Controller Flexible Energy Management System 20 nA @ 3 V Shutoff Mode 0.65 µA @ 3 V Stop Mode, including Power-on Reset, Brown-out Detector, RAM and CPUretention 1.0 µA @ 3 V Deep Sleep Mode, including Real Time Clock with 32.768 kHz oscillator,Power-on Reset, Brown-out Detector, RAM and CPU retention 52 µA/MHz @ 3 V Sleep Mode 160 µA/MHz @ 3 V Run Mode, with code executed from flash 32/16/8 KB Flash 4/2/1 KB RAM Up to 56 General Purpose I/O pins Configurable Push-pull, Open-drain, pull-up/down, input filter, drive strength Configurable peripheral I/O locations 16 asynchronous external interrupts Output state retention and wakeup from Shutoff Mode 8 Channel DMA Controller Alternate/primary descriptors with scatter-gather/ping-pong operation 8 Channel Peripheral Reflex System for autonomous inter-peripheral signaling Integrated LCD Controller for up to 8 20 segments Voltage boost, adjustable contrast adjustment and autonomous animation feature Hardware AES with 128/256-bit keys in 54/75 cycles Communication interfaces 2 Universal Synchronous/Asynchronous Receiver/Transmitter SPI/SmartCard (ISO 7816)/IrDA (USART0)/I2S (USART1) Triple buffered full/half-duplex operation 4-16 data bits 1 Low Energy UART Autonomous operation with DMA in Deep Sleep Mode2 I C Interface with SMBus support Address recognition in Stop Mode Timers/Counters 2 16-bit Timer/Counter 3 Compare/Capture/PWM channels Dead-Time Insertion on TIMER0 16-bit Low Energy Timer 24-bit Real-Time Counter 1 16-bit Pulse Counter2011-05-19 - d0034 Rev0.915www.energymicro.com
Preliminary.the world's most energy friendly microcontrollers Asynchronous pulse counting/quadrature decoding Watchdog Timer with dedicated RC oscillator @ 50 nAUltra low power precision analog peripherals 12-bit 1 Msamples/s Analog to Digital Converter 8 input channels and on-chip temperature sensor Single ended or differential operation Conversion tailgating for predictable latency 12-bit 500 ksamples/s Digital to Analog Converter 2 single ended channels/1 differential channel Up to 3 Operational Amplifiers Supports rail-to-rail inputs and outputs Programmable gain 2 Analog Comparator Programmable speed/current Capacitive sensing with up to 8 inputs Supply Voltage ComparatorUltra low power sensor interface Autonomous sensor monitoring in Deep Sleep Mode Wide range of sensors supported, including LC sensors and capacitive buttonsUltra efficient Power-on Reset and Brown-Out Detector2-pin Serial Wire Debug interface 1-pin Serial Wire ViewerTemperature range -40 - 85ºCSingle power supply 1.8 - 3.8 VPackages QFN24 QFN32 QFN643.3 Block DiagramA block diagram of EFM32TG is shown in Figure 3.1 (p. 7). The color indicates peripheral availabilityin energy modes as described in Section 3.4 (p. 7) .2011-05-19 - d0034 Rev0.916www.energymicro.com
Preliminary.the world's most energy friendly microcontrollersFigure 3.1. Diagram of EFM32TGTiny GeckoCore and MemoryClock Managem entARM Cortex-M3 rollerEnergy Managem entHigh FrequencyCrystalOscilla torHigh FrequencyRCOscilla torLow FrequencyCrystalOscilla torLow FrequencyRCOscilla atorPower-onResetBrown-outDetector32-bit busPeripheral Reflex SystemSerial InterfacesExternalInterruptsUSARTLowEnergyUARTI/O PortsI2CTim ers/TriggersAnalog InterfacesLCDControllerTimer/CounterLESENSEADCLow EnergyTimerReal alAmplifierNoteIn the block diagram, color indicates availability in different energy modes.Figure 3.2. Energy Mode indicator0 1 2 34NoteIn the energy mode indicator, the number n indicates Energy Mode n.3.4 Energy ModesThere are five different Energy Modes (EM0-EM4) in the EFM32TG, see Table 3.1 (p. 8) . TheEFM32TG is designed to achieve a high degree of autonomous operation in low energy modes. Theintelligent combination of peripherals, RAM with data retention, DMA, low-power oscillators and shortwake-up times, makes it attractive to remain in low energy modes for long periods and thus savingenergy consumption.TipThroughout this document, the first figure in every module description contains an Energy ModeIndicator that shows in which energy mode(s) the module can operate (see Table 3.1 (p. 8) ).2011-05-19 - d0034 Rev0.917www.energymicro.com
Preliminary.the world's most energy friendly microcontrollersTable 3.1. Energy Mode DescriptionEnergy ModeNameEM0 – Energy Mode 00 1 2 30 1 2 30 1 2 3(Run mode)In EM0, the CPU is running and consuming as little as 160 µA/MHz, whenrunning code from flash. All peripherals can also be activated.EM1 – Energy Mode 1(Sleep Mode)In EM1, the CPU is sleeping and the power consumption is only 52 µA/MHz .The peripherals including, DMA, PRS and memory system is still available.EM2 – Energy Mode 2(Deep Sleep Mode)In EM2 the high frequency oscillator is turned off, but with the 32.768 kHzoscillator running, selected low energy peripherals (LCD, RTC, LETIMER,2PCNT, WDOG, LEUART, I C, ACMP, LESENSE , OPAMP) are still available,giving a high degree of autonomous operation with a current consumption aslow as 1.0 µA with RTC enabled. Power-on Reset, Brown-out Detection andfull RAM and CPU retention is also included.EM3 - Energy Mode 3(Stop Mode)In EM3 the low-frequency oscillator is disabled, but there is still full CPUand RAM retention, as well as Power-on Reset, Pin reset EM4 wakeupand Brown-out Detector, with a consumption of only 0.65 µA. The low2power ACMP, asynchronous external interrupt, PCNT, and I C can wakeup the device. Even in this mode, the wake-up time is in the range of a fewmicroseconds.4440 1 2 340 1 2 34DescriptionEM4 – Energy Mode 4(Shutoff Mode)In EM4, the current is down to 20 nA and all chip functionality is turned offexcept the pin reset , GPIO pin wake-up , GPIO pin retenetion and the poweron reset. All pins are put into their reset state.3.5 Product OverviewTable 3.2 (p. 9) shows a device overview of the EFM32TG Microcontroller Series, includingperipheral functionality. For more information, the reader is referred to the device specific datasheets.2011-05-19 - d0034 Rev0.918www.energymicro.com
Preliminary.the world's most energy friendly 11 (2)2(1)2(4)Y-YYQFN24110F88217-1112(6)11111 (2)2(1)2(4)Y-YYQFN24110F1616417-1112(6)11111 (2)2(1)2(4)Y-YYQFN24110F3232417-1112(6)11111 (2)2(1)2(4)Y-YYQFN24210F88224-2112(6)11111 (4)2(1)2(5)Y-YYQFN32210F1616424-2112(6)11111 (4)2(1)2(5)Y-YYQFN32210F3232424-2112(6)11111 (4)2(1)2(5)Y-YYQFN32230F88256-2112(6)11111 (8)2(2)2(16)Y-YYQFN64230F1616456-2112(6)11111 (8)2(2)2(16)Y-YYQFN64230F3232456-2112(6)11111 (8)2(2)2(16)Y-YYQFN64840F88256Y2112(6)11111 (8)2(2)2(8)Y-YYQFN64840F1616456Y2112(6)11111 (8)2(2)2(8)Y-YYQFN64840F3232456Y2112(6)11111 (8)2(2)2(8)Y-YYQFN642011-05-19 - d0034 AM108F4I CFlashEFM32TG Part#Table 3.2. EFM32TG Microcontroller Serieswww.energymicro.com
Preliminary.the world's most energy friendly microcontrollers4 System ProcessorQuick FactsWhat?0 1 2 34The industry leading Cortex-M3 processorfrom ARM is the CPU in the EFM32TGmicrocontrollers.Why?CM 3 Cor eThe ARM Cortex-M3 is designed forexceptional short response time, highcode density, and high 32-bit throughputwhile maintaining a strict cost and powerconsumption budget.3 2 - bit ALUHardware dividerSingle cycle32-bit m ultiplierControl LogicThum b & Thum b-2DecodeInstruction InterfaceData InterfaceHow?Combined with the ultra low energyperipherals available in EFM32TG devices,the Cortex-M3 processor's Harvardarchitecture and 3 stage pipeline, single cycleinstructions and Thumb-2 instruction setsupport, and fast interrupt handling makes itperfect for 8- to 32-bit applications.NVIC Interface4.1 IntroductionThe ARM Cortex-M3 32-bit RISC processor provides outstanding computational performance andexceptional system response to interrupts while meeting low cost requirements and low powerconsumption.The ARM Cortex-M3 implemented is revision r2p1.4.2 Features Harvard architecture Separate data and program memory buses (No memory bottleneck as in a single bus system) 3-stage pipeline Thumb-2 instruction set Enhanced levels of performance, energy efficiency, and code density Single cycle multiply and hardware divide instructions 32-bit multiplication in a single cycle Signed and unsigned divide operations between 2 and 12 cycles Atomic bit manipulation with bit banding Direct access to single bits of data Two 1MB bit banding regions for memory and peripherals mapping to 32MB alias regions Atomic operation, cannot be interrupted by other bus activities 1.25 DMIPS/MHz 24 bits System Tick Timer for Real Timer OS Excellent 32-bit migration choice for 8/16 bit architecture based designs Simplified stack-based programmer's model is compatible with traditional ARM architecture andretains the programming simplicity of legacy 8- and 16-bit architectures2011-05-19 - d0034 Rev0.9110www.energymicro.com
Preliminary.the world's most energy friendly microcontrollers Unaligned data storage and access Continuous storage of data requiring different byte lengths Data access in a single core access cycle Integrated power modes Sleep Now mode for immediate transfer to low power state Sleep on Exit mode for entry into low power state after the servicing of an interrupt Ability to extend power savings to other system components Optimized for low latency, nested interrupts4.3 Functional DescriptionFor a full functional description of the ARM Cortex-M3 (r2p1) implementation in the EFM32TG family,the reader is referred to the EFM32 Cortex-M3 Reference Manual.4.3.1 Interrupt OperationFigure 4.1. Interrupt OperationModuleIFS[ n]Cortex-M3 NVICIFC[ n]IEN[ n]SETENA[ n] /CLRENA[ n]Active interruptInterruptconditionsetclearIF[ n]IRQsetInterruptrequestclearSETPEND[ n] /CLRPEND[ n]Software generated interruptThe EFM32TG devices have up to 31 interrupt request lines (IRQ) which are connected to the CortexM3. Each of these lines (shown in Table 4.1 (p. 12) ) is connected to one or more interrupt flagsin one or more modules. The interrupt flags are set by hardware on an interrupt condition. It is alsopossible to set/clear the interrupt flags through the IFS/IFC registers. Each interrupt flag is then qualifiedwith its own interrupt enable bit (IEN register), before being OR'ed with the other interrupt flags togenerate the IRQ. A high IRQ line will set the corresponding pending bit (can also be set/cleared withthe SETPEND/CLRPEND bits in ISPR0/ICPR0) in the Cortex-M3 NVIC. The pending bit is then qualifiedwith a an enable bit (set/cleared with SETENA/CLRENA bits in ISER0/ICER0) before generating aninterrupt request to the core. Figure 4.1 (p. 11) illustrates the interrupt system. For more informationon how the interrupts are handled inside the Cortex-M3, the reader is referred to the EFM32 CortexM3 Reference Manual.2011-05-19 - d0034 Rev0.9111www.energymicro.com
Preliminary.the world's most energy friendly microcontrollersTable 4.1. Interrupt Request Lines (IRQ)IRQ #Source0DMA1GPIO EVEN2TIMER03USART0 RX4USART0 TX5ACMP0/ACMP16ADC07DAC08I2C09GPIO ODD10TIMER111USART1 RX12USART1 CMP20LCD21MSC22AES2011-05-19 - d0034 Rev0.9112www.energymicro.com
Preliminary.the world's most energy friendly microcontrollers5 Memory and Bus SystemQuick FactsWhat?0 1 2 3A low latency memory system including lowenergy Flash and RAM with data retentionwhich makes the energy modes attractive.4Why?Fla shRAM retention reduces the need for storingdata in Flash and enables frequent use of theultra low energy modes EM2 and EM3 withas little as 0.65 µA µA current consumption.RAMHow?ARM Cor t e x- M 3DM A Con t r olle rPe r iph e r a lsLow energy and non-volatile Flash memorystores program and application datain all energy modes and can easily bereprogrammed in system. Low leakage RAMwith data retention in EM0 to EM3 removesthe data restore time penalty, and the DMAensures fast autonomous transfers withpredictable response time.5.1 IntroductionThe EFM32TG contains an AMBA AHB Bus system to allow bus masters to access the memory mappedaddress space. A multilayer AHB bus matrix connects the 4 master bus interfaces to the AHB slaves(Figure 5.1 (p. 14) ). The bus matrix allows several AHB slaves to be accessed simultaneously. AnAMBA APB interface is used for the peripherals, which are accessed through an AHB-to-APB bridgeconnected to the AHB bus matrix. The 4 AHB bus masters are: Cortex-M3 ICode: Used for instruction fetches from Code memory (0x00000000 - 0x1FFFFFFF) Cortex-M3 DCode: Used for debug and data access to Code memory (0x00000000 - 0x1FFFFFFF) Cortex-M3 System: Used for instruction fetches, data and debug access to system space(0x20000000 - 0xDFFFFFFFFF, 0xE0100000 - 0xFFFFFFFF) DMA: Can access entire memory space (0x00000000 - 0xFFFFFFFF)2011-05-19 - d0034 Rev0.9113www.energymicro.com
Preliminary.the world's most energy friendly microcontrollersFigure 5.1. EFM32TG Bus SystemCortex-M3ICodeFlashAHB MultilayerBus MatrixRAMEBIDCodeAESSystemAHB/APBBridgePeripheral 0DMAPeripheral n5.2 Functional DescriptionThe memory segments are mapped together with the internal segments of the Cortex-M3 into the systemmemory map shown by Figure 5.2 (p. 14)Figure 5.2. System Address Space2011-05-19 - d0034 Rev0.9114www.energymicro.com
Preliminary.the world's most energy friendly microcontrollersThe embedded SRAM is located at address 0x20000000 in the memory map of the EFM32TG. Whenrunning code located in SRAM starting at this address, the Cortex-M3 uses the System bus interface tofetch instructions. This results in reduced performance as the Cortex-M3 accesses stack, other data inSRAM and peripherals using the System bus interface. To be able to run code from SRAM efficiently,the SRAM is also mapped in the code space at address 0x10000000. When running code from thisspace, the Cortex-M3 fetches instructions through the I/D-Code bus
The EFM32 MCUs are the world’s most energy friendly microcontrollers. With a unique combination of the powerful 32-bit ARM Cortex-M3, innovative low energy techniques, short wake-up time from energy saving modes, and a wide selection of pe
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