Introduction to Digital Logicwith Laboratory Exercises
This book is licensed under a Creative Commons Attribution 3.0 LicenseIntroduction toDigital Logic withLaboratory ExercisesJames FeherCopyright 2009 James FeherEditor-In-Chief: James FeherAssociate Editor: Marisa DrexelProofreaders: Jackie Sharman, Rachel PuglieseFor any questions about this text, please email: email@example.comThe Global Text Project is funded by the Jacobs Foundation, Zurich, SwitzerlandThis book is licensed under a Creative Commons Attribution 3.0 LicenseIntroduction to Digital Logic with Laboratory Exercises2A Global Text
Table of ContentsPreface.70. Introduction.91. The transistor and inverter.10The transistor.10The breadboard.11The inverter.122. Logic gates.14History of logic chips.14Logic symbols.15Logical functions.163. Logic simplification.19De Morgan's laws.19Karnaugh maps.20Circuit design, construction and debugging.244. More logic simplification.27Additional K-map groupings.27Input placement on K-map.29Don't care conditions.295. Multiplexer.32Background on the “mux”.32Using a multiplexer to implement logical functions.326. Timers and clocks.37Timing in digital circuits.37555 timer.37Timers.37Clocks.38Timing diagrams.397. Memory .44Memory.44SR latch.44Flip-flops.458. State machines.49What is a state machine?.49State transition diagrams.50State machine design.51Debounced switches.559. More state machines.57How many bits of memory does a state machine need?.57What are unused states?.5710. What's next?.64Appendix A: Chip pinouts.65Appendix B: Resistors and capacitors.69Resistors.69Capacitors.703
This book is licensed under a Creative Commons Attribution 3.0 LicenseAppendix C: Lab notebook.71Appendix D: Boolean algebra.73Appendix E: Equipment list.74Digital trainer.747400 series families.75Appendix F: Solutions .76Chapter 1 review exercises.76Chapter 2 review exercises.78Chapter 3 review exercises.81Chapter 4 review exercises.87Chapter 5 review exercises.90Chapter 6 review exercises.95Chapter 7 review exercises.98Chapter 8 review exercises.101Chapter 9 review exercises.104Index.105Introduction to Digital Logic with Laboratory Exercises4A Global Text
Index of TablesTable 1: NAND table.15Table 2: NOR table.15Table 3: AB BC.16Table 4: XOR table.17Table 5: 4 input K-map.20Table 6: 2 input K-map.20Table 7: 3 input K-map.20Table 8: f(A,B,C).21Table 9: g(A,B,C,D).22Table 10: h(A,B,C,D).23Table 11: h(w,x,y,z).23Table 12: Step 3.23Table 13: Step 2.23Table 14: Step 5.23Table 15: g(a,b,c).33Table 16: g(a,b,c).33Table 17: h(a,b,c,d).34Table 18: h(a,b,c,d).34Table 19: NOR SR latch.44Table 20: NAND SR latch.44Table 21: JK flip-flop.45Table 22: T flip-flop.45Table 23: D flip-flop.45Table 24: Truth table.51Table 25: Counter truth table.52Table 26: Q1N(x,Q1,Q0).53Table 27: Q0N(x,Q1,Q0).53Table 28: Q1N(x,Q1,Q0) Q1N x' Q1'Q0' xQ1'Q0.58Table 29: Q0N(x,Q1,Q0) xQ1'Q0' x'Q1Q0'.58Table 30: Q1N(x,Q1,Q0) xQ1'Q0' x'Q0 .58Table 31: Q0N(x,Q1,Q0) xQ1'Q0' x'Q1.58Table 32: Truth table for 5 state machine.60Table 33: Q2N.60Table 34: Q1N.60Table 35: Q0N.61Table 36: Color Codes.695
This book is licensed under a Creative Commons Attribution 3.0 LicenseAbout the author and reviewersAuthor: James FeherJim currently teaches computer science at McKendree University in Lebanon, Illinois. He is a huge open sourcesoftware proponent. His research focuses on the use of open source software in theareas of hardware, programmingand networking. His hobbies include triathlon, hiking, camping and the use of alternative energy. He lives with hiswife and three kids in St. Louis, MIssouri where he built and continues to perfect a solar hot water heating systemfor his home.Reviewer: Kumud BhandariKumud graduated from McKendree University with degrees in computer science and mathematics. He hasworked at internships at the University of Texas and the Massachusetts Institute of Technology. He currentlyisemployed as a researcher with Argonne National Laboratory.Reviewer: Andrew Van CampProfessor Van Camp is a retired electronics professor. In addition, he has extensive experience working andconsulting in industry. He currently resides in central Missouri where he continues his consulting for industry.Introduction to Digital Logic with Laboratory Exercises6A Global Text
This book is licensed under a Creative Commons Attribution 3.0 LicensePrefaceThis lab manual provides an introduction to digital logic, starting with simple gates and building up to statemachines. Students should have a solid understanding of algebra as well as a rudimentary understanding of basicelectricity including voltage, current, resistance, capacitance, inductance and how they relate to direct currentcircuits. Labs will be built utilizing the following hardware: breadboards with associated items required such as wire, wire strippers and cutters some basic discrete components such as transistors, resistors and capacitors basic 7400 series logic chips 555 timerDiscrete components will be included only when necessary, with most of the labs using the standard 7400 serieslogic chips. These items are commonly available and can be obtained relatively inexpensively. Labs will includelearning objectives, relevant theory, review problems, and suggested procedure. In addition to the labs, severalappendices of background material are provided.Format for each chapterEach chapter is a combination of theory followed by review exercises to be completed as traditional homeworkassignments. Full solutions to all of the review exercises are available in the last appendix. Procedures for labs thenfollow that allow the student to implement the concepts in a hands on manner. The materials required for the labswere selected due to their ready availability at modest cost. While students would gain from just reading andcompleting the review exercises, it is recommended that the procedures be completed as well. In addition toproviding another means reenforcing the material, it helps to develop real world debugging and design skills.This manual concentrates on the basic building blocks of digital electronics: logic gates and memory. It focuseson these items from the ground up. The reader will first see how logic gates can be constructed from transistors andthen how digital logic functions are constructed using those gates. The concept of memory is then introducedthrough the construction of an SR latch and then a D flip-flop. A clock is created to be used in a basic state machinedesign that aims to combine logic circuits with memory.Target audienceThis text will be geared toward computer science students; however it would be appropriate for any studentswho have the necessary background in algebra and elementary DC electronics. Computer science students learnskills in analysis, design and debugging. These skills are also used in the virtual world of programming, where nophysical devices are ever involved. By requiring the assembly and demonstration of actual circuits, students will notonly learn about digital logic, but about the intricacies and difficulties that arise when physically implementingtheir designs as well.Global Text ProjectEducation is the most powerful weapon you can use to change the world - Nelson MandelaThe goal of this text is to allow more students to gain access to this material by providing it in the CreativeCommons as well as specifying inexpensive materials to be used in the labs. For this reason the author chose toIntroduction to Digital Logic with Laboratory Exercises7A Global Text
Prefacework with the Global Text project to develop this text. The Global Text Project will create open content electronictextbooks that will be freely available from a website. Distribution will also be possible via paper, CD, or DVD. Thegoal of the Global Text Project initially is to focus on content development and Web distribution, and work withrelevant authorities to facilitate dissemination by other means when bandwidth is unavailable or inadequate. Thegoal is to make textbooks available to the many who cannot afford them.AcknowledgmentsA work such as this would not be possible without the help of many. First, I would like to thank the Global TextProject for their vision of providing electronic textbooks for free to everyone. Marisa Drexel, Associate Editor at theGlobal Text Project provided countless suggestions and helpful hints for the document and for the creation of thedocument using O
Introduction to Digital Logic with Laboratory Exercises 6 A Global Text. This book is licensed under a Creative Commons Attribution 3.0 License Preface This lab manual provides an introduction to digital logic, starting with simple gates and building up to state machines. Students should have a solid understanding of algebra as well as a rudimentary understanding of basic electricity including .
Digital Logic Fundamentals Unit 1 – Introduction to the Circuit Board 2 LOGIC STATES The output logic state (level) of a gate depends on the logic state of the input(s). There are two logic states: logic 1, or high, and logic 0, or low. The output of some gates can also be in a high-Z (high impedance) state, which is neither a high
Dynamic Logic Dynamic Circuits will be introduced and their performance in terms of power, area, delay, energy and AT2 will be reviewed. We will review the following logic families: Domino logic P-E logic NORA logic 2-phase logic Multiple O/P domino logic Cascode logic
DIGITAL LOGIC DESIGN PPT 1. UNIT 1 INTRODUCTION TO DIGITAL LOGIC DESIGN INTRODUCTION TO DIGITAL LOGIC DESIGN 2. Digital logic design is a system in electrical
MOSFET Logic Revised: March 22, 2020 ECE2274 Pre-Lab for MOSFET logic LTspice NAND Logic Gate, NOR Logic Gate, and CMOS Inverter Include CRN # and schematics. 1. NMOS NMOSNAND Logic Gate Use Vdd 10Vdc. For the NMOS NAND LOGIC GATE shown below, use the 2N7000 MOSFET LTspice model that has a gate to source voltage Vgs threshold of 2V (Vto 2.0).File Size: 586KB
categorical and hypothetical syllogism, and modal and inductive logic. It is also associated with the Stoics and their propositional logic, and their work on implication. Syllogistic logic and propositional logic led later to the development of predicate logic (or first order logic, i.e. the foundational logic for mathematics)
An Introduction to Modal Logic 2009 Formosan Summer School on Logic, Language, and Computation 29 June-10 July, 2009 ; 9 9 B . : The Agenda Introduction Basic Modal Logic Normal Systems of Modal Logic Meta-theorems of Normal Systems Variants of Modal Logic Conclusion ; 9 9 B . ; Introduction Let me tell you the story ; 9 9 B . Introduction Historical overview .
The University of Texas at Arlington Sequential Logic - Intro CSE 2340/2140 – Introduction to Digital Logic Dr. Gergely Záruba The Sequential Circuit Model x 1 Combinational z1 x n zm (a) y y Y Y Combinational logic logic x1 z1 x n z m Combinational logic with n inputs and m switching functions: Sequential logic with n inputs, m outputs, r .
Digital electronic circuits operate with voltages of two logic levels namely Logic Low and Logic High. The range of voltages corresponding to Logic Low is represented with ‘0’. Similarly, the range of voltages corresponding to Logic High is represented with ‘1’. The basic digital elec