AD713 Quad Precision, Low Cost, High Speed, BiFET Op Amp
aQuad Precision, Low Cost,High Speed, BiFET Op AmpAD713CONNECTION DIAGRAMSFEATURESEnhanced Replacement for LF347 and TL084AC PERFORMANCE1 ms Settling to 0.01% for 10 V Step20 V/ms Slew Rate0.0003% Total Harmonic Distortion (THD)4 MHz Unity Gain BandwidthDC PERFORMANCE0.5 mV max Offset Voltage (AD713K)20 mV/ C max Drift (AD713K)200 V/mV min Open Loop Gain (AD713K)2 mV p-p typ Noise, 0.1 Hz to 10 HzTrue 14-Bit AccuracySingle Version: AD711, Dual Version: AD712Available in 16-Pin SOIC, 14-Pin Plastic DIP andHermetic Cerdip Packages and in Chip FormMIL-STD-883B Processing AvailableStandard Military Drawing AvailableAPPLICATIONSActive FiltersQuad Output Buffers for 12- and 14-Bit DACsInput Buffers for Precision ADCsPhoto Diode Preamplifier ApplicationsPRODUCT DESCRIPTIONThe AD713 is a quad operational amplifier, consisting of fourAD711 BiFET op amps. These precision monolithic op ampsoffer excellent dc characteristics plus rapid settling times, highslew rates, and ample bandwidths. In addition, the AD713 provides the close matching ac and dc characteristics inherent toamplifiers sharing the same monolithic die.The single-pole response of the AD713 provides fast settling:l µs to 0.01%. This feature, combined with its high dc precision,makes it suitable for use as a buffer amplifier for 12- or 14-bitDACs and ADCs. It is also an excellent choice for use in activefilters in 12-, 14- and 16-bit data acquisition systems. Furthermore, the AD713’s low total harmonic distortion (THD) levelof 0.0003% and very close matching ac characteristics make itan ideal amplifier for many demanding audio applications.Plastic (N) andCerdip (Q) PackagesSOIC (R) PackageOUTPUTOUTPUT1–IN2 IN3 VS4 IN14 OUTPUT4–IN121416OUTPUT15–IN14 IN13 –IN IN312 IN VS411 –V S IN5510 3(TOP VIEW)23NCAD71313–VS12 IN11–IN10OUTPUT(TOP VIEW)23NC NO CONNECTThe AD713 is offered in a 16-pin SOIC, 14-pin plastic DIP andhermetic cerdip package, or in chip form.PRODUCT HIGHLIGHTS1. The AD713 is a high speed BiFET op amp that offers excellent performance at competitive prices. It upgrades the performance of circuits using op amps such as the TL074/TL084, LT1058, LF347 and OPA404.2. Slew rate is 100% tested for a guaranteed minimum of16 V/µs (J, A and S Grades).3. The combination of Analog Devices’ advanced processingtechnology, laser wafer drift trimming and well-matchedion-implanted JFETs provides outstanding dc precision. Input offset voltage, input bias current and input offset currentare specified in the warmed-up condition and are 100%tested.4. Very close matching of ac characteristics between the fouramplifiers makes the AD713 ideal for high quality active filterapplications.The AD713 is internally compensated for stable operation atunity gain and is available in seven performance grades. TheAD713J and AD713K are rated over the commercial temperature range of 0 C to 70 C. The AD713A and AD713B arerated over the industrial temperature of –40 C to 85 C. TheAD713S and AD713T are rated over the military temperaturerange of –55 C to 125 C and are available processed toMIL-STD-883B, Rev. C.REV. BInformation furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for itsuse, nor for any infringements of patents or other rights of third partieswhich may result from its use. No license is granted by implication orotherwise under any patent or patent rights of Analog Devices.One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 617/329-4700Fax: 617/326-8703
AD713–SPECIFICATIONS (V 615 V @ T 258C unless otherwise noted)SParameterINPUT OFFSET VOLTAGEInitial OffsetOffsetvs. Tempvs. Supplyvs. SupplyLong-Term mVmVµV/ CdBdBµV/Month40751.7/4.8/77120pAnApA1TMIN to TMAXTMIN to 008484INPUT BIAS CURRENT2VCM 0 VVCM 0 V @ TMAXVCM 10 V40INPUT OFFSET CURRENTVCM 0 VVCM 0 V @ VµV/ CpAdBdB55MATCHING CHARACTERISTICSInput Offset VoltageInput Offset VoltageTMIN to TMAXInput Offset Voltage DriftInput Bias CurrentCrosstalkf 1 kHzf 100 kHzFREQUENCY RESPONSESmall Signal BandwidthFull Power ResponseSlew RateSettling Time to 0.01%Total Harmonic DistortionUnity GainVO 20 V p-pUnity Gain3.016f 1 kHz; RL 2 kΩ;VO 3 V 201.00.00031.2MHzkHzV/µsµs%INPUT IMPEDANCEDifferentialCommon Mode3 1012i5.53 1012i5.53 1012i5.53 1012i5.5ΩipFΩipFINPUT VOLTAGE RANGEDifferential3Common-Mode Voltage4 20 14.5, –11.5 20 14.5, –11.594909084VVVdBdBdBdB245221816µV p-pnV/ HznV/ HznV/ HznV/ HzCommon ModeRejection RatioINPUT VOLTAGE NOISETMIN to TMAXVCM 10 VTMIN to TMAXVCM 11 VTMIN to TMAX–117876/76/767270/70/700.1 Hz to 10 Hzf 10 Hzf 100 Hzf 1 kHzf 10 kHz 1388848480–1184827874245221816INPUT CURRENT NOISEf 1 kHzOPEN-LOOP GAINVO 10 V; RL 2 kΩTMIN to TMAX150400100/100/100200100RL 2 kΩTMIN to TMAXShort Circuit 13, –12.5 13.9, –13.3 12/ 12/612 13.8, –13.125 13, –12.5 13.9, –13.3612 13.8, –13.125OUTPUT CHARACTERISTICSVoltageCurrentPOWER SUPPLYRated PerformanceOperating RangeQuiescent CurrentTRANSISTOR COUNT0.01 1364.5 1510.0# of Transistors12061813.564.50.01pA/ Hz400V/mVV/mV 1510.0VVmA61812.0VVmA120NOTES1Input Offset Voltage specifications are guaranteed after 5 minutes of operation at T A 25 C.2Bias Current specifications are guaranteed maximum at either input after 5 minutes of operation at T A 25 C. For higher temperatures, the current doubles every 10 C.3Defined as voltage between inputs, such that neither exceeds 10 V from ground.4Typically exceeding –14.1 V negative common-mode voltage on either input results in an output phase reversal.Specifications subject to change without notice.–2–REV. B
AD713ABSOLUTE MAXIMUM RATINGS 1, 2ORDERING GUIDESupply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 VInternal Power Dissipation2Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 VOutput Short Circuit Duration(For One Amplifier) . . . . . . . . . . . . . . . . . . . . . . . . IndefiniteDifferential Input Voltage . . . . . . . . . . . . . . . . . . VS and –VSStorage Temperature Range (Q) . . . . . . . . . . –65 C to 150 CStorage Temperature Range (N, R) . . . . . . . . –65 C to 125 COperating Temperature RangeAD713J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 C to 70 CAD713A/B . . . . . . . . . . . . . . . . . . . . . . . . . . –40 C to 85 CAD713S/T . . . . . . . . . . . . . . . . . . . . . . . . . –55 C to 125 CLead Temperature Range (Soldering 60 sec) . . . . . . . . 300 CNOTES1Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation ofthe device at these or any other conditions above those indicated in the operationalsection of this specification is not implied. Exposure to absolute maximum ratingconditions for extended periods may affect device reliability.2Thermal Characteristics:14-Pin Plastic Package:θJC 30 C/Watt; θJA 100 C/Watt14-Pin Cerdip Package:θJC 30 C/Watt; θJA 110 C/Watt16-Pin SOIC Package:θJC 30 C/Watt; θJA 100 C/Watt3For supply voltages less than 18 V, the absolute maximum input voltage is equalto the supply 01MCA5962-9063302MCA–40 C to 85 C–40 C to 85 C0 C to 70 C0 C to 70 C0 C to 70 C0 C to 70 C0 C to 70 C0 C to 70 C–55 C to 125 C–55 C to 125 C–55 C to 125 C–55 C to 125 C–55 C to 125 C–55 C to 125 C–55 C to 125 C14-Pin Ceramic DIP14-Pin Ceramic DIPBare Die14-Pin Plastic DIP16-Pin Plastic SOIC16-Pin Plastic SOIC16-Pin Plastic SOIC14-Pin Plastic DIPBare Die14-Pin Ceramic DIP14-Pin Ceramic DIP14-Pin Ceramic DIP14-Pin Ceramic DIP14-Pin Ceramic DIP14-Pin Ceramic DIPQ-14Q-14*N Plastic DIP; Q Cerdip; R Small Outline IC (SOIC).METALIZATION PHOTOGRAPHDimensions shown in inches and (mm).Contact factory for latest dimensions.REV. 14
AD713–Typical CharacteristicsFigure 2. Output Voltage Swing vs.Supply VoltageFigure 3. Output Voltage Swingvs. Load ResistanceFigure 4. Quiescent Current vs.Supply VoltageFigure 5. Input Bias Current vs.TemperatureFigure 6. Output Impedance vs.Frequency, G 1Figure 7. Input Bias Current vs.Common Mode VoltageFigure 8. Short Circuit CurrentLimit vs. TemperatureFigure 9. Gain Bandwidth Productvs. TemperatureFigure 1. Input Voltage Swing vs.Supply Voltage–4–REV. B
AD713Figure 10. Open-Loop Gain andPhase Margin vs. FrequencyFigure 11. Open-Loop Gain vs.Supply VoltageFigure 12. Power Supply Rejectionvs. FrequencyFigure 13. Common Mode Rejection vs. FrequencyFigure 14. Large Signal FrequencyResponseFigure 15. Output Swing and Errorvs. Settling TimeFigure 16. Total Harmonic Distortion vs. FrequencyFigure 17. Input Noise VoltageSpectral DensityFigure 18. Slew Rate vs. InputError SignalREV. B–5–
AD713Figure 19. Crosstalk Test CircuitFigure 20. Crosstalk vs. FrequencyFigure 21a. Unity Gain FollowerFigure 21b. Unity Gain FollowerPulse Response (Large Signal)Figure 21c. Unity Gain FollowerPulse Response (Small Signal)Figure 22a. Unity Gain InverterFigure 22b. Unity Gain InverterPulse Response (Large Signal)Figure 22c. Unity Gain InverterPulse Response (Small Signal)–6–REV. B
AD713The error signal is thus clamped twice: once to prevent overloading amplifier A2 and then a second time to avoid overloading the oscilloscope preamp. A Tektronix oscilloscope preamptype 7A26 was carefully chosen because it recovers from the approximately 0.4 volt overload quickly enough to allow accuratemeasurement of the AD713’s 1 µs settling time. Amplifier A2 isa very high speed FET input op amp; it provides a voltage gainof 10, amplifying the error signal output of the AD713 undertest (providing an overall gain of 5).MEASURING AD713 SETTLING TIMEThe photos of Figures 24 and 25 show the dynamic response ofthe AD713 while operating in the settling time test circuit ofFigure 23. The input of the settling time fixture is driven by aflat-top pulse generator. The error signal output from the falsesumming node of A1, the AD713 under test, is clamped, amplified by op amp A2 and then clamped again.Figure 25. Settling Characteristics to –10 V Step.Upper Trace: Output of AD713 Under Test (5 V/div).Lower Trace: Amplified Error Voltage (0.01%/ div)POWER SUPPLY BYPASSINGThe power supply connections to the AD713 must maintain alow impedance to ground over a bandwidth of 4 MHz or more.This is especially important when driving a significant resistiveor capacitive load, since all current delivered to the load comesfrom the power supplies. Multiple high quality bypass capacitorsare recommended for each power supply line in any critical application. A 0.1 µF ceramic and a 1 µF electrolytic capacitor asshown in Figure 26 placed as close as possible to the amplifier(with short lead lengths to power supply common) will assureadequate high frequency bypassing in most applications. Aminimum bypass capacitance of 0.1 µF should be used for anyapplication.Figure 23. Settling Time Test CircuitFigure 24. Settling Characteristics 0 V to 10 V Step.Upper Trace: Output of AD713 Under Test (5 V/div).Lower Trace: Amplified Error Voltage (0.01%/div)REV. BFigure 26. Recommended Power Supply Bypassing–7–
AD713A HIGH SPEED INSTRUMENTATION AMPLIFIERCIRCUITA HIGH SPEED FOUR OP AMP CASCADED AMPLIFIERCIRCUITThe instrumentation amplifier circuit shown in Figure 27 canprovide a range of gains from unity up to 1000 and higher usingonly a single AD713. The circuit bandwidth is 1.2 MHz at again of 1 and 250 kHz at a gain of 10; settling time for the entirecircuit is less than 5 µs to within 0.01% for a 10 volt step,(G 10). Other uses for amplifier A4 include an active dataguard and an active sense input.Figure 29 shows how the four amplifiers of the AD713 may beconnected in cascade to form a high gain, high bandwidth amplifier. This gain of 100 amplifier has a –3 dB bandwidth greaterthan 600 kHz.Figure 29. A High Speed Four Op Amp CascadedAmplifier CircuitFigure 27. A High Speed Instrumentation Amplifier CircuitTable I provides a performance summary for this circuit. Thephoto of Figure 28 shows the pulse response of this circuit for again of 10.Table I. Performance Summary for the High SpeedInstrumentation Amplifier CircuitGainRGBandwidthT Settle (0.01%)1210NC20 kΩ4.04 kΩ1.2 MHz1.0 MHz0.25 MHz2 µs2 µs5 µsFigure 30. THD Test CircuitHIGH SPEED OP AMP APPLICATIONS ANDTECHNIQUESDAC Buffers (I-to-V Converters)Figure 28. The Pulse Response of the High SpeedInstrumentation Amplifier. Gain 10The wide input dynamic range of JFET amplifiers makes themideal for use in both waveform reconstruction and digital-audioDAC applications. The AD713, in conjunction with the AD1860DAC, can achieve 0.0016% THD (here at a 4fs or a 176.4 kHzupdate rate) without requiring the use of a deglitcher. Just sucha circuit is shown in Figure 31. The 470 pF feedback capacitorused with IC2a, along with op amp IC2b and its associatedcomponents, together form a 3-pole low-pass filter. Each or allof these poles can be tailored for the desired attenuation andphase characteristics required for a particular application. In thisapplication, one half of an AD713 serves each channel in a twochannel stereo system.–8–REV. B
AD713Figure 31. A D/A Converter Circuit for Digital AudioFigure 33. The AD713 as an ADC BufferMost IC amplifiers exhibit a minimum open loop outputimpedance of 25 Ω, due to current limiting resistors. A fewhundred microamps reflected from the change in converterloading can introduce errors in instantaneous input voltage.If the A/D conversion speed is not excessive and the bandwidth of the amplifier is sufficient, the amplifier’s outputwill return to the nominal value before the converter makesits comparison. However, many amplifiers have relativelynarrow bandwidths, yielding slow recovery from outputtransients. The AD713 is ideally suited as a driver for A/Dconverters since it offers both a wide bandwidth and a highopen loop gain.Figure 32. Harmonic Distortion as Frequency for theDigital Audio Circuit of Figure 31Driving the Analog Input of an A/D ConverterAn op amp driving the analog input of an A/D converter, suchas that shown in Figure 33, must be capable of maintaining aconstant output voltage under dynamically changing load conditions. In successive approximation converters, the input currentis compared to a series of switched trial currents. The comparison point is diode clamped but may vary by several hundredmillivolts, resulting in high frequency modulation of the A/D input current. The output impedance of a feedback amplifier ismade artificially low by its loop gain. At high frequencies, wherethe loop gain is low, the amplifier output impedance can approach its open loop value.REV. B–9–
AD713Figure 37. Transient Response, RL 2 kΩ, CL 500 pFFigure 34. Buffer Recovery Time Source Current 2 mACMOS DAC APPLICATIONSThe AD713 is an excellent output amplifier for CMOS DACs.It can be used to perform both 2 and 4 quadrant operation. Theoutput impedance of a DAC using an inverted R-2R ladder approaches R for codes containing many “1”s, 3R for codes containing a single “1” and infinity for codes containing all zeros.Figure 35. Buffer Recovery Time Sink Current 1 mADriving A Large Capacitive LoadThe circuit of Figure 36 employs a 100 Ω isolation resistorwhich enables the amplifier to drive capacitive loads exceeding1500 pF; the resistor effectively isolates the high frequencyfeedback from the load and stabilizes the circuit. Low frequencyfeedback is returned to the amplifier summing junction via thelow pass filter formed by the 100 Ω series resistor and the loadcapacitance, C1. Figure 37 shows a typical transient responsefor this connection.For example, the output resistance of the AD7545 will modulate between 11 kΩ and 33 kΩ. Therefore, with the DAC’s internal feedback resistance of 11 kΩ, the noise gain will varyfrom 2 to 4/3. This changing noise gain modulates the effect ofthe input offset voltage of the amplifier, resulting in nonlinearDAC amplifier performance. The AD713, with its guaranteed1.5 mV input offset voltage, minimizes this effect achieving12-bit performance.Figures 38 and 39 show the AD713 and a 12-bit CMOS DAC,the AD7545, configured for either a unipolar binary (2-quadrant multiplication) or bipolar (4-quadrant multiplication) operation. Capacitor C1 provides phase compensation whichreduces overshoot and ringing.Figure 38. Unipolar Binary OperationFigure 36. Circuit for Driving a Large Capacitance LoadTable II. Recommended Trim Resistor Values vs.Grades for AD7545 for VD 5 R2500 Ω150 Ω200 Ω68 Ω100 Ω33 Ω20 Ω6.8 ΩFigure 39. Bipolar Operation–10–REV. B
AD713Figure 40. A Programmable State Variable Filter CircuitFILTER APPLICATIONSA Programmable State Variable FilterFor the state variable or universal filter configuration of Figure40 to function properly, DACs A1 and B1 need to control thegain and Q of the filter characteristic, while DACs A2 and B2must accurately track for the simple expression of fC to be true.This is readily accomplished using two AD7528 DACs and oneAD713 quad op amp. Capacitor C3 compensates for the effectsof op amp gain-bandwidth limitations.This filter provides low pass, high pass and band pass outputsand is ideally suited for applications where microprocessor control of filter parameters is required. The programmable rangefor component values shown is fC 0 to 15 kHz and Q 0.3to 4.5.GIC and FDNR FILTER APPLICATIONSThe closely matched and uniform ac characteristics of theAD713 make it ideal for use in GIC (gyrator) and FDNR (frequency dependent negative resistor) filter applications. Figures41 and 43 show the AD713 used in two typical active filters.The first shows a single AD713 simulating two coupled inductors configured as a one-third octave bandpass filter. A singlesection of this filter meets ANSI class II specifications andhandles a 7.07 V rms signal with 0.002% THD (20 Hz–20kHz).Figure 43 shows a 7-pole antialiasing filter for a 2 3 oversampling (88.2 kHz) digital audio application. This filter has 0.05dB pass band ripple and 19.8 0.3 µs delay,dc-20 kHz and will handle a 5 V rms signal (VS 15 V) withno overload at any internal nodes.The filter of Figure 41 can be scaled for any center frequency byusing the formula:fC where all resistors and capacitors scale equally. Resistors R3–R8should not be greater than 2 kΩ in value, to prevent parasitic oscillations caused by the amplifier’s input capacitance.Figure 41. A 1/3 Octave Filter CircuitREV. B1.112πRC–11–
AD713C1206a–5–11/90If this is not practical, small lead capacitances (10–20 pF)should be added across R5 and R6. Figures 42 and 44 show theoutput amplitude vs. frequency of these filters.Figure 44. Relative Output Amplitude vs. Frequencyof Antialiasing FilterFigure 42. Output Amplitude vs. Frequency of 1/3Octave FilterFigure 43. An Antialiasing FilterOUTLINE DIMENSIONSDimensions shown in inches and (mm).14-Pin Cerdip (Q-14) Package16-Pin SOIC (R-16) Package9160.2992 (7.60)0.2914 (7.40)0.4193 (10.65)0.3937 (10.00)PIN 1810.1043 (2.65)0.0926 (2.35)0.4133 (10.50)0.3977 (10.00)0.0118 (0.30)0.0040 (0.10)0.0500 (1.27)BSC0.0192 (0.49)0.0138 (0.35)0.0291 (0.74)x 45 0.0098 (0.25)0.0125 (0.32)0 0091 (0 23)–12–8 0 0.0500 (1.27)0.0157 (0.40)REV. BPRINTED IN U.S.A.14-Pin Plastic (N-14A) DIP Package
0.5 mV max Offset Voltage (AD713K) . Quad Precision, Low Cost, High Speed, BiFET Op Amp PRODUCT DESCRIPTION The AD713 is a quad operational amplifier, consisting of four AD711 BiFET op amps. These precision monolithic op amps . Full
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QUAD-DECK TYPICAL DETAIL DRAWINGS QD-100 Series QUAD-DECK PRODUCT DETAILS AND COMMON SPECIFICATIONS INDEX QD-200 Series QUAD-DECK TO QUAD-LOCK WALL DETAILS QD-300 Series QUAD-DECK
Single/Dual/Quad, Low Offset, Low Noise, RRO Operational Amplifiers General Description The LMV771/LMV772/LMV774 are Single, Dual, and Quad low noise precision operational amplifiers intended for use in a wide range of applications. Other important characteristics of
Cost-Tolerance Trades: Supplier Expertise Tolerance Cost High precision, high cost process Design tolerance defines the process required; small changes in tolerance may allow alignment to lower cost processes; only suppliers will know if the cost-tolerance sensitivity is high Moderate precision, moderate cost process Low precision, low cost process
Ratio 104 121 143 165 195 231 273 319 377 473 559 649 731 841 1003 1247 1479 1849 2065 2537 3045 3481 4437 5133 6177 7569 50 Hz 60 Hz 13.9 12.0 10.1 8.79 7.44 6.28 5.31 4.55 3.85 3.07 2.59 2.23 1.98 1.72 1.45 1.16 0.98 0.754 0.702 0.572 0.476 0.417 0.327 0.282 0.235 0.192
