Compact Wireless IPT System Using A Modified Voltage-fed .

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Journal of Power Electronics, Vol. 18, No. 1, pp. 277-288, January SN(Print): 1598-2092 / ISSN(Online): 2093-4718JPE 18-1-25Compact Wireless IPT System Using a ModifiedVoltage-fed Multi-resonant Class EF2 InverterMohammad Kamar Uddin*, Saad Mekhilef †, and Gobbi Ramasamy***,†Power Electronics and Renewable Energy Research Laboratory (PEARL), Department of Electrical Engineering,University of Malaya, Kuala Lumpur, Malaysia**Faculty of Engineering, Multimedia University, Cyberjaya, MalaysiaAbstractWireless inductive power transfer (IPT) technology is used in many applications today. A compact and high-frequencyprimary side inverter is one of the most important parts of a WPT system. In this study, a modified class EF-type voltage-fedmulti-resonant inverter has been proposed for WPT application at a frequency range of 85–100 kHz. Instead of an infinite inputchoke inductor, a resonant inductor is used to reduce loss and power density. The peak voltage stress across the MOSFET hasbeen reduced to almost 60% from a class-E inverter using a passive clamping circuit. A simple yet effective design procedure hasbeen presented to calculate the various component values of the proposed inverter. The overall system is simulated usingMATLAB/SimPowerSystem to verify the theoretical concepts. A 500-W prototype was built and tested to validate the simulatedresults. The inverter exhibited 90% efficiency at nearly perfect alignment condition, and efficiency reduced gradually with themisalignment of WPT coils. The proposed inverter maintains zero-voltage switching (ZVS) during considerable load changesand possesses all the inherent advantages of class E-type inverters.Key words: Class E inverter, Class EF inverter, High-frequency inverter, Inductive power transfer, Misalignment toleranceI.INTRODUCTIONWireless power transfer (WPT) is an emerging researcharea that shows great potential to redefine the way electricalpower is consumed by communities. Among the varioustypes of WPT methods, inductive power transfer (IPT) orresonance inductive power transfer (RIPT) has gainedincreasing popularity and research attention over the lastdecade. Studies in the implementation of IPT systems onvarious applications, ranging from low-power level (1 W) tomedium-power level ( 1 kW), have been increasing.Biomedical devices and sensors, electric appliances,portable devices, automotive assembly lines, clean factories,industrial automation applications, and electric vehicle (EV)charging are the most attractive application areas, consideringthe aforementioned power levels. Some of these applicationsManuscript received Feb. 7, 2017; accepted May 30, 2017Recommended for publication by Associate Editor Yijie Wang.Corresponding Author: saad@um.edu.myTel: 603-79676851, Fax: 603-79675316, University of Malaya*Power Electronics and Renewable Energy Research Lab. (PEARL),Department of Electrical Engineering, Univ. of Malaya, Malaysia**Faculty of Engineering, Multimedia University, Malaysia†operate at relatively higher frequency ( 500 kHz to severalMHz) and shorter distance (up to 3 cm), whereas othersoperate at a lower frequency ( 200 kHz) and greater distance(10–30 cm) [1], [2].In a typical IPT/WPT system, a high-frequency inverterdelivers high-frequency, time-varying voltage/current to aprimary coil, which induces a time-varying magnetic field.This magnetic field travels over a distance to energize asecondary coil to transfer power. Subsequently, the inducedsecondary voltage is conditioned to deliver power to aspecific load or battery charger of an EV. High-resonancefrequency is required to enhance the range and power transfercapability of the induced secondary voltage [3], [4]. Thus, aprimary inverter that can deliver maximum power at a higheroperating frequency plays a vital role in an IPT system.Several primary inverter topologies have been described inthe current literature. Full-bridge-series LC resonant (SLC)and series-parallel resonant (LCL) topologies [5]-[11] areprimarily used in applications in which the required powerlevel is 1 kW or higher. However, a single-switch class-Eresonant inverter can also meet the requirements of the WPTsystem because of its capability to deliver medium power (1– 2018 KIPE

278Journal of Power Electronics, Vol. 18, No. 1, January 20183 kW) at higher switching frequencies [3], [12], [13]. Thisinverter also has a simple topology with lower componentcount and timing control, and requires a relatively simplegated drive because of the absence of high- and low-sidecomplimentary switches.Thus, a passive resonant network can be added parallel tothe load network to reduce the high switching stress of a classE inverter. This type of modified class E inverter is referredto as Class EF (class E/F) inverter [14], [15]. Voltage stressin this family of inverters is reduced to 40% from class E.The performance and power output capability of this inverterare also higher. Voltage stress could be reduced further byplacing a passive resonant circuit between the finite DC-feedinductor and the semiconductor switch. These types ofinverters are referred to as class Ф inverter in the literature[14]. These two families of inverters have demonstratedpotentiality for various IPT applications. In the contemporaryliterature, detailed designs of these types of inverters areconfined to the frequency range between 800 kHz and 13.6MHz, although some WPT applications operate on a 20 kHz–100 kHz frequency range [15], [16]. Therefore, a clear scopefor the performance evaluation of these types of invertersunder above-frequency constraint exists. In this study, amodified class EF2 voltage-fed multi-resonant single switchinverter topology has been proposed for IPT applications. Amedium-frequency (85–100 kHz) region with practical IPTcoil parameters is used to evaluate the performance andeffectiveness of the inverter. The proposed inverter has all theadvantages of a class E inverter. The contributions of thispaper can be summarized as follows:1. Design and analysis of a modified class EF2 inverterfor WPT EV charging system. A 500-W experimentalprototype that exhibits 90% efficiency at nearly perfectaligned condition has been built.2. Considerable reduction of peak voltage stress acrosssemiconductor devices has been achieved.3. A simple design procedure has been introduced tocalculate the various component parameters of theinverter for a pre-built WPT coil.This rest of this paper is organized as follows. Section IIdiscusses the working principle, pros, and cons of acurrent-fed class E resonant inverter. Section III describes theproposed voltage-fed multi-resonant class EF2 inverter, anddiscusses the design procedure of the proposed inverter forIPT application and simulation model. Sections IV and Vcontain the discussion of simulation and experimental results,respectively. Finally, Section VI concludes the paper.II. CURRENT-FED CLASS E RESONANT INVERTERFigs. 1 and 2 show the current-fed class E resonant invertertopology and operating waveform during nominal condition.Fig. 1. Current-fed class E inverter.This inverter was first introduced by Sokal [16]. Aconventional current-fed class E inverter (Fig. 1) usuallyconsists of a dc-supply VIN(DC), an input choke (dc-feed)inductance, Lchoke, power MOSFET, which is used as aswitching device, a shunt capacitor, CP, and load circuit(combination of series-resonant circuit LS-CS and ac loadresistance, RL).During nominal operation, the class E inverter maintainszero-voltage switching (ZVS) and zero-derivative switching(ZDS) simultaneously. Thus, high-power conversion athigher frequencies is achieved. Switching loss was alsoreduced significantly because of zero-voltage and jumplesscurrent at a turn-on instance. The ZVS/ZDS condition isexpressed in Equation (1):()and()(),(1)where ωt 2πD. These conditions are referred to as “nominalcondition” for class E inverter operation. In case of maximumpower conversion efficiency, conduction losses for ESRcomponents and switch-on/off time resistance must beconsidered. This operating condition, including ESR, isreferred to as “optimal condition.” Fig. 2 shows the nominaloperating waveforms of a class E inverter when D 0.5 (dutycycle). The difference of currents through the dc-feedinductance (or choke inductance), Lchoke, and resonantnetwork (LS–CS) flows through the capacitor CP during aswitch turn-off interval. The selected operating frequency isgreater than the resonant frequency of LS–CS but less than theresonant frequency of LS–CS–CP. Furthermore, the outputresonant circuit of a class E inverter usually has ahigh-quality factor Q. Thus, load current iout is regarded as asinusoid.Class E inverters have a smaller component count, simplegate drive configuration, inherent sine-wave voltage/currentoutput, and efficient high-frequency operation because ofZVS/ZDS. ZDS operation reduces Miller effects. Althoughclass E inverters have significant advantages, they are alsoprone to few severe consequences, such as the peak switchvoltage stress across the semiconductor switch. Fig. 2 showsthat drain-to-source voltage, V DS, is 3-3.5 times higher

Compact Wireless IPT System Using a Modified Voltage-fed 279Fig. 3. Proposed voltage-fed multi-resonant class EF2 inverter.Fig. 2. Nominal operating waveforms of current-fed class Einverter (D 0.5).than the input DC voltage. This phenomenon is not desired inhigh-power and high-frequency conditions. Another majordisadvantage of a class E inverter is its high input dc-feedinductor loss because of its bulky size. Thus, core loss andESR loss are high.Several topologies have been proposed in the literature toovercome these limitations and increase the efficiency of theinverter at higher frequency ranges (tens of megahertz) [14],[17], [18]. As previously stated, most of the designs of theinverter were concentrated for very high-frequency (MHz)operations. In this study, a new voltage source single-switchmulti-resonant inverter topology is introduced. The newinverter can maintain a sine-wave output similar to that of aclass E inverter while maintaining a reduced peak switchvoltage stress. The new inverter also has a higher powerconversion efficiency than the class E inverter. Moreover, thenew inverter is suitable for contactless power transferapplication ranging from 85–100 kHz. The proposed inverterdesign focuses on reducing the peak-voltage stress and inputinductor loss while maintaining power output capability. Inthe following sections, a detailed design of this inverter ispresented.III. VOLTAGE-FED MODIFIED CLASS EF2RESONANT INVERTERFig. 3 shows the proposed inverter topology. The inputdc-feed inductance is replaced with a resonant inductance LR.In a class E inverter, the input dc-feed choke inductance isbulky and produces high losses while operating in afrequency region of 30–100 kHz. This loss has beensubstantially reduced using a resonant inductor. Thus, thevolume and value of the inductor have been reduced becausethis inductor now resonates with a frequency higher than theswitching frequency. Thus, a small core area is required toconstruct the inductor with less turn, which will result insmall magnetic and ESR loss.Furthermore, a series resonant circuit (LSR–CSR) has beeninserted between the input resonance inductor and switch toreduce the peak voltage stress across the switching device.This series resonant circuit is tuned to resonate with thesecond harmonic of the switching frequency. The extraresonant circuit with selected harmonic elimination is used toreduce the switching stress that has been discussedcomprehensively in [14], [17]-[19]. The second harmonicelimination contributes in the reduction of peak switchvoltage stress. For a class E current source inverter, themaximum peak voltage across the switch can reach up to 3.5times the input DC voltage. However, the voltage peak in theproposed multi-resonant inverter is limited to only 2 times ofthe input DC, which is shown in following sections. Thispeak switch stress reduction is necessary when high input DCis used (rectified from utility). In case of a conventional classE, when a rectified voltage of 300 V is applied, the peakswitch stress will reach up to 1 kV, which is not desirable.However, in case of the proposed inverter, the peak switchstress will reach up to 600 V, which is desirable in the rangeof the safe operating area (SOA) of the switch. Manycommercial semiconductor switches are available for thepractical implementation of the inverter.The components of the inverter are calculated such that thepeak voltage amplitude across the switch decreases andmaintains the switch-mode operation through near zerovoltage at turn-on and turn-off at a given frequency and dutyratio. Fig. 4 shows a simplified circuit diagram of theproposed inverter.A. Circuit OperationWhen the switch is ON, the current through the MOSFETis given by Equation (2). The total switch current can be

280VDS (V)Journal of Power Electronics, Vol. 18, No. 1, January 2018Fig. 4. Circuit diagram of voltage-fed single-switch multi-resonantinverter for analysis.found by determining()(.)()(Time (s))(2)The current through the input inductor is the resonantcurrent, which can be defined as Equation (3) for any dutycycle D.()().The coefficients K1 and K2 are determined based on theequation boundary conditions. Finally, the output current, iout,can be evaluated as sinusoid using the fundamental harmonicapproximation (FHA):( )(),(5)where Im is the magnitude of the output current, and “α” is theinitial phase between the current and the voltage.When the switch is OFF, the maximum voltage across thedrain to the source port of the MOSFET can be calculated bydetermining the voltage across the capacitor CP. The parallelcapacitor will charge within an arbitrary time and reach amaximum point. The maximum voltage and shape of thedrain to the source voltage, VDS, will depend on the overalldrain-to-source (Zds) characteristic. Fig. 5 shows that the VDSwill be a quasi-resonant wave. The current through CP basedon the duty cycle is given by Equation (6).( )( )( )( )(6)During the OFF condition, the current in the LSR–CSRbranch can be determined by applying KCL at the drain node( )( )( )( ). (7))()())in Equation (8), as follows:)(( ((8))()(9)The final equation of the current through the LSR – CSRbranch can be obtained by differentiating Equation (9) and()).)(10)The general solution of Equation 10, which is a linear,non-homogeneous, differential equation, is the currentthrough the series resonant branch during OFF condition, andcan be given as follows:()()()(where ,),, and(11).K3 and K4 values can be determined using the boundaryconditions of the equation. The voltage and current continuityconditions when switching ON and OFF determine theboundary condition. The current through parallel capacitorcan be obtained using Equation (9).( )(())(),(12)The voltage across the CP, which is the drain-to-sourcevoltage of the MOSFET, is given by Equation (13)()( ) ,(13)where δ is a constant that indicates the maximum drain-tosource voltage slew rate. Equation (9) can be rewritten byincorporating the ZVS condition as follows: ()(((()()The total voltage across the LSR–CSR branch is [14]:(()Equation (8) can be written as:(substituting(3)The current through the series-tuned second harmonictermination branch (LSR–CSR) can be found using Equation(4).( )()().(4)(Fig. 5. Simulated drain-to-source voltage of proposed inverter(Input: 200 VDC).))()),(14)MATLAB function “fsolve” can be used to compute thevalues of unknown variables K3, K4, n, and α for the specificvalues of D, m, and F. This is one method of calculating thevarious component of the proposed voltage-fed inverter.However, in this study, a different design technique has beenimplemented to obtain the desired result. (11) shows that VDS

Compact Wireless IPT System Using a Modified Voltage-fed 4VDS (x input DC)is dependent on m, n, F, and D, and “m” and “n” aredependent on F. Therefore, the values of F have beendeduced first. The peak voltage stress of the semiconductorswitch is dependent upon the ratio of “F”. Furthermore, thevalues of LS–CS can be calculated independently. Thus, theoverall new design procedures are described in the followingsection based on the two aforementioned insights.2813.5F 1.43F 1.2F 0.92.5F 0.82B. Derivation of Im0.30.350.4The switch current can be given as( )().()()()(15)0.450.5Duty Cycle (D)0.550.6Fig. 6. Duty cycle and VDS for different F values.The average switch current is equal to the DC input current[14]; thus,( (() ()))()(()())(16)Fig. 7. IPT system configuration schematic with proposed inverter.Solving (16), we have()(((As)()(()).)(17), substituting (17) into this equation()(()(().)(18)C. Design of Modified Voltage-Fed Class EF2 ResonantInverterCalculation of LS–CS and CPThe values of LS can be computed according to the specificapplication requirement. In this work, LS is the inductance ofthe primary coil of a loosely coupled transformer. Thesetypes of transformers are widely used in WPT application. Inthe case of WPT system, reflected impedance is also addedwith LS.CS is calculated such that the resonance frequency of LS–CSbecomes lower than the switching frequency. A properselection of this frequency is necessary to maintain theappropriate voltage gain. The combined effect of LS–CScontributes to the reduction of switch voltage stress.The value of CP is calculated to maintain the ZVSoperation of MOSFET. The following criteria must be metwhile calculating the value of CP.),(19)where fS, is the switching frequency andand(()Values of LR, LSR –CSRWhen the values of F and CP are calculated, the value ofCSR can be calculated using. LSR is calculated suchthat it resonates with CSR on the second harmonic of theswitching frequency. The value of LSR can be calculated using(21). Equation (22) shows that the resonance frequency of LRand CP will be slightly higher than the switching frequency.When the value of CP is determined, LR is calculated using(22). The resonant frequency of LR and CP could work asdesign criteria of the inverter. This resonant frequency isselected such that the ZVS of the MOSFET can be achievedup to 60% of the load change.are given by(21)( andAfter calculating the value of CP, we determine the value ofCSR using the value of F. Different values of F will result indifferent levels of voltage and current stress on thesemiconductor switch. Fig. 6 shows that a family of curveshas been given for duty cycle and VDS based on various F.The x-axis represents the duty cycle and y-axis represents thepeak switch voltage stress (multiple of input DC voltage).When F values lie between 1.2 and 1.4, VDS decreases withinthe duty cycle range of 30%-40%. Peak voltage stressincreases rapidly with duty cycle when threshold and ZVScannot be maintained.() ().(20) )(22)In summary, the overall design procedure can be described

282Journal of Power Electronics, Vol. 18, No. 1, January 2018Fig. 8. Simulation model.as follows: LS is calculated according to the applicationspecification. CS and CP are determined according to theconditions specified in (19) and (20). CSR is calculated based on CP and F. LSR is calculated using (21). The value of LR is calculated based on Equation(22).D. Simulation ModelA simulation model of the proposed voltage sourcemulti-resonant inverter with a IPT (WPT) system has beenbuilt using MATLAB/SimPowerSystem toolbox to verify thedesign concept.Figs. 7 and 8 show the schematic of the complete system andthe simulation model, respectively. The simulation model isdesigned to transfer 1 kW power across a vertical gapdistance of 8 cm. Primary inductance, secondary inductance,and mutual inductance have been measured using a LCRmeter with 8 cm vertical gap and up to 30% horizontalmisalignment [20]. Subsequently, these inductances areinserted into the simulation model. The rest of the invertercomponents are calculated using the method described in theprevious section. Fig. 7 shows that the primary or transmitterside forms a capacitor-inductor-capacitor (CLC) compensation.Series compensation has been used in the secondary orvehicle side of the system.The value of CS is obtained by setting the resonancefrequency of L S–CS to 95 kHz according to (12). Theswitching frequency in this study is selected as 100 kHz. CPis obtained again using (12). The curve in Fig. 6 shows thatthe selected “F” value ranges from 1.4–1.5. Then, CSR iscalculated according to (8), and other component values havebeen solved using consecutive steps that are described in theprevious section. The duty cycle has been maintained at 30%all the time, according to Fig. 6. The values of LR, CSR, CP,TABLE ISIMULATION PARAMETERSComponentsLRLSRCSRCSCPInductance of primary coil of IPTsystem, LSInductance of secondary coil ofIPT systemSecondary side compensationcapacitorMutual inductanceLoad resistanceDuty cycle()Values15 µH6.5 µH100 nF26 nF146 nF100.38 µH103.77 µH24.5 nF14.85 µH25 Ω30%98.517 kHz107.55 kHz107.1 kHzand CS have been changed for further tuning during thesimulation to obtain the final inverter model. The invertermaintains ZVS even in considerable load changes (60%) andprovides good power output with reduced switch voltagestress. The peak voltage stress is reduced considerablycompared with other single-switch inverters [3], [14], [15].The simulation result shows that the peak voltage onlyreaches up to 2 times the input DC voltage. However, forother single-switch inverters, this peak voltage stressincreases up to 2.5–3.5 times with the same output powertransfer capability. Besides, the proposed inverter has all theinherent advantages of a class E-type inverter. Table I showsthe final component values of the simulated model.IV. SIMULATION RESULT AND DISCUSSIONFig. 9(a) shows the drain-source voltage (VDS) and thecurrent (IDS) waveform of the proposed inverter. VDS has

Compact Wireless IPT System Using a Modified Voltage-fed 283(a)(a)(b)Fig. 10. (a) VDS and IDS at 40% load change (DC Input: 200V),(b) IDS (magnified).(b)Fig. 9. (a) VDS and IDS at full load (DC Input: 200V) (b) VGS andVDSmaintained ZVS/ZDS at turn-on and provided less peak stress,as calculated theoretically using Figure (6). Given 200 V DCinput voltage, the peak stress across the switch is 400 V.However, IDS is slightly higher in the simulation because ofthe simulation method used in the Simulink/SimPowerSystemtoolbox. This problem may be solved by developing a customcomponent model of inductor and capacitor. However, thisproblem is beyond the scope of this work. Thus, existingcomponent models have been used.Fig. 10 shows that this inverter exhibits good operatingcharacteristics during considerable load changes. DCequivalent ac resistance is used for practical and simulationpurposes to observe the load voltage and current. Fig. 11(a)shows load voltage and current waveforms. Voltage andcurrent are in phase and resonance, indicating efficient powertransfer. Fig. 11(b) shows that drain-to-source impedance(ZDS) characteristic depicts the magnitude and phase at 100kHz operating frequency. A certain ZDS magnitude and phasemust be observed to maintain ZVS and reduce peak switchstress. Fig. 11(b) shows the selected operating point for thisdesign. Some other operating points could also be selectedwhen impedance magnitude and phase are not below 20 Ωand 23 .Below these limits of impedance magnitude and phase, theproposed inverter could not maintain efficient operationbecause of hard switching. Fig. 12 shows that the overallsystem has constant output voltage characteristics with loadchange.Inverter efficiency is calculated after subtracting the lossesof LR, LSR – CSR branch, switch conduction loss, off time loss,and loss through CP. This detailed simulation model is usedto build the experiment setup. The details of the experimentalresult and discussion are provided in the next section.V.EXPERIMENT RESULT AND DISCUSSIONA 500-W experiment setup was built to verify theoperation and performance of the proposed voltage sourcemulti-resonant inverter with WPT system, as shown in Fig.

284Journal of Power Electronics, Vol. 18, No. 1, January 2018(a)(a)(b)Fig. 13. (a) Complete experiment setup (b) Proposed singleswitch inverter.(b)Fig. 11. (a) Load voltage and current (b) Drain-source impedancemagnitude and phase.142Output voltage 4050Load ResistanceFig. 12. Output voltage and Load resistance (Input DC: 200V).13. The specifications of the prototype are listed in Table II.A maximum of 150 W has been transferred to measure theefficiency and other parameters because of limited properelectromagnetic shielding and to maintain the safety of thedigital controller. The gate signal was generated using anePWM module of Texas Instruments TMS320F28335 digitalsignal processor. Figs. 14 to 16 show the experimental results.VDS and VGS completely agree with the simulation result. Thevoltage waveshape and peak stress of the VDS is exactlysimilar to the designed model. VDS has a spike during turn-offinstant because of the mismatch between gate-to-source andgate-driver output impedance. This mismatch can bemitigated by modifying the gate driver circuit design. In thecurrent gate driver, the output impedance is controlled using afixed resistor. However, the output impedance of the gatedrive circuit can be varied to match the gate-sourceimpedance of the MOSFET by introducing a variable resistor.This resistor will eliminate unwanted ringing during turn-ofcondition, which will reduce the spike of VDS. Primary sidevoltage and current are not in resonance because of themulti-resonance characteristic in the primary side. Load voltageand current have a small phase shift. This phenomenonoccurs because of the out-of-resonance operation of thesecondary side and the high leakage magnetic field of the IPTcoils, which could be reduced by properly designing the coil.This phase-shift increases and affects the power transferefficiency during misalignment condition.

Compact Wireless IPT System Using a Modified Voltage-fed 2855 µS/DIV(a)(a)(b)Fig. 15. (a) Primary-side voltage and secondary-side voltage (b)Peak VDS at 30% misalignment condition (input voltage: 50 VDC).(b)TABLE IIIFig. 14. (a) VGS and VDS (b) VDS and Load voltage.TABLE IISPECIFICATIONS OF THE PROTOTYPEInvertercomponentsLRLSRCSRCPCSCsec compMOSFETDSP (for invertercontrol)Coil parametersValueManufacturer14 µH – 15 µHCoilcraft6.5 µHCoilcraft98.55 nFKEMET(Polypropylene)146 nFKEMET(Polypropylene)26 nFKEMET(Polypropylene)25.2 nFKEMET(Polypropylene)CREE C2M0080120D SiC MOSFET(VDS 1200 V, ID 36 A at 25 CTexas Instruments TMS320F28335eZDSP board and gate driver circuitLPrimaryLSecondary100.38 µH103.77 µHTotal power500 W (150 W usedin the experiment)Input Voltage100- 130VFig. 15(a) shows that primary and secondary side voltagesare in phase, indicating proper magnetic coupling. Fig. 15(b)shows the VDS recorded at 30% misalignment. The peakvoltage stress could be maintained at 30% misalignmentPERFORMANCE EVALUATION OF PROPOSED MODIFIEDVOLTAGE-FED MULTI-RESONANT CLASS EF2 INVERTER WITH CLASSE AND CONVENTIONAL CLASS EF2 INVERTERSParametersVDS (V) (timesinput DC)Input DCvoltage (V)Output voltageand currentwaveshapeMisalignmenttoleranceInput inductorlossCirculatingcurrentEfficiencyClass E [3,4, 21]Class EF2[14, 15, 19,22]Modifiedvoltage-fedclass usoidalSinusoidal--HighHighHighLow--Low90%88%90% 2condition of IPT coils. This feature is important for primaryside inverters used in IPT system.A performance evaluation of the proposed inverter withtwo class E and class EF2 high- frequency resonant invertertopologies, as shown in Table III. In every category, theproposed inverter has demonstrated better operatingcharacteristics. The drain-to-source voltage across MOSFETin the proposed inverter is less than that of the conventionalclass EF2 inverter. LR is a resonant inductor in the proposedtopology that reduces losses and size. Thus, the system can be

286Journal of Power Electronics, Vol. 18, No. 1, January 2018(a)(a)(b)(b)Fig. 16. (a) Primary voltage and current (b) Secondary voltageand current.Fig. 18. Changes of coupling coefficient (a) during horizontalmisalignment, (b) during vertical misalignment.(a)(b)Fig. 17. Inverter efficiency (a) during horizontal misalignment,(b) during vertical misalignment.designed to become compact and power density could beincreased. The constant voltage characteristics could bemaintained (Fig. 12), which is desirable for IPT application.Besides, these inverters have the inherent sine-wavecharacteristics similar to those of conventional class EF2 andclass E inverter. The proposed modified class EF2 invertercan deliver similar output power with less device stress andlosses than its conventional counterpart.Fig. 17(a) and (b) show the efficiency of the inverter fortwo types of misalignment condition. Fig. 18(a) and (b)shows the coupling variations of the WPT coil used for thisexperiment. Efficiency during vertical misalignment is lowerthan in horizontal misalignment because of the low couplingand high leakage magnetic field of the coils. This efficiencymeasurement was conducted during 150-W power transfercondition. Power transfer was maintained in this rangebecause of some experimental limitation. At this operatingcondition, the losses in LR, LSR – CSR branches, switchconduction, off time loss, and loss through CP were calculatedusing Equations (16) to (19).The loss in the input resonant inductor is equal to( ( )),(23)whereis the ESR of the resonant inductor measured bythe LCR meter.The switch conduction loss is calculated using (17) withswitch rms current and on-time resistance rDS(ON).(( )( The power loss in CP due to ESR( ())).(24)is calculated by (25)(and the total power loss in LSR-CSR is()()),.(25)(26)

Compact Wireless IPT System U

the load network to reduce the high switching stress of a class E inverter. This type of modified class E inverter is referred to as Class EF (class E/F) inverter [14], [15]. Voltage stress in this family of inverters is reduced to 40% from class E. The performance and power output capability of this inverter

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