CMOS Monolithic Active Pixel Sensors (MAPS) For Scientific .
CMOS Monolithic Active Pixel Sensors (MAPS) for scientific applicationsR. TurchettaCCLRC-RAL, Chilton, Didcot, OX11 0QX, United Kingdomr.turchetta@rl.ac.ukAbstractCMOS Monolithic Active Pixel Sensors (MAPS) wereinvented or possibly re-invented in the early ‘90s. Their greatpotential as imaging devices was immediately recognised andsince then the number of applications has been steadilygrowing. At the end of the same decade, MAPS were alsoproposed and demonstrated as detectors for particle physicsexperiments.This talk will review the state-of-art of MAPS as imagingsensors, both for the consumer market and for scientificapplications. Emphasis will be given to those aspects, e.g.radiation damage, charge collection efficiency, , ofparticular interest for the particle physics community. The talkwill conclude on the perspective of MAPS for future scientificinstruments.I. INTRODUCTIONSilicon devices have been used since the 60s for thedetection of radiation [1]. The interest of MOS devices wasimmediately recognised and arrays were designed. However,when Charge-Coupled Devices were invented at BellLaboratory in 1970 [2], they immediately became the mainimaging devices, both in the consumer and in the scientificimaging market. About 10 years after their invention, CCDswere proposed as sensors for a vertex detector [3]. In themeanwhile, MOS and CMOS sensors were still beingdeveloped, mainly as focal plane infrared sensors [4, 5, 6, 7].Towards the end of the ’80s, helped by the reduction ofCMOS transistors, Passive Pixel Sensors (PPS) were activelydeveloped. In PPS, each pixel features one photodiode andone transistor for the selection of the pixel. The radiationgenerated charge is dumped through the selection switch intothe readout lines and read by a charge amplifier. PPS havegood fill factor because but were still suffering from relativelylow noise and speed.The big push for the development of CMOS sensors camefrom the introduction of Active Pixel Sensors (APS) in theearly ‘90s [8, 9, 10]. It was immediately recognised thatCMOS APS, or Monolithic Active Pixel Sensors, MAPS 1,have several advantages.1The terms MAPS is used to distinguish CMOS APS fromhybrid detectors (also called Hybrid Active Pixel Sensors or MAPS are made in CMOS technology, and can thentake advantage of the world-wide developments in thisfield, in particular for the reduction of minimum featuresize (MFS). Being monolithic, MAPS avoid the problems relatedto bump-bonding or other types of connections. Because of the shrinking size of transistor, pixels canbe made very small or more functionality can beintegrated in the same pixels [12 13, 14]. MAPS can have a very low power consumption [15]. Deep submicron CMOS is radiation resistant. Several functionalities can be integrated on the samechip together with the sensor arrays. This bringssimplification at the system level and hence reduction ofcosts.Pixels can be accessed randomly, trading offresolution or array size with readout speed or makingpossible to track objects at very high speed [16]. The readout and analogue-to-digital conversion isalways massively parallel, being normally columnparallel, but in some cases even pixel-parallel [12 13,14]. They can be made very easy to use, limiting thereadout system requirements to digital I/Os.II. CMOS SENSORS IN INDUSTRIAL APPLICATIONSIn sensors developed for commercial applications, we candistinguish two phases of operation: i) integration or exposureii) and readout (fig .1).The integration can normally performed in two ways,either in rolling shutter mode or in snapshot mode. Theformer is the most common. All the pixels in a row are resetand start the integration at the same time. Pixels in differentrows integrate for the same duration of time but not exactly atthe same time. In the snapshot mode, all the pixels integrateduring the same period of time. The snapshot way is closer tothe way one would normally operate a sensor but normallyrequires more than 3 transistors to operate correctly [17]. Thereadout is always done row by row.HAPS) in which the sensor and the readout electronics are ontwo different substrates, normally connected by bumpbonding. HAPS were proposed for high-energy physics [11]and they are also of interest in Infra-Red focal plane.
Most of the sensors used for commercial applications haveeither 3 or 4 transistors. Also, all the pixels in a column sharea common output bus. This architecture is fast because iscolumn-parallel, but an even higher increase in speed could beachieved by having all the pixels operating independently inthe same time. Pixel-parallel sensors were proposed anddeveloped by the Stanford University. In this case, theanalogue-to-digital conversion is done inside the pixels.Several architectures for the data conversion were proposed[12, 13], with the most recent one being an in-pixel singleramp [14]. These pixel-parallel sensors achieve higher speedthan conventional, column-parallel sensors, achieving rates o10,000 frame/sec. The conversion tends however to be limitedto 8 bit. The number of transistors in the pixel also tend to behigher thus limiting the fill factor (see the following section).matches well with the thickness of substrates used in themicroelectronic industry. Given the dependence of theabsorption length from the wavelength, it becomes thatshallow junctions, like the P /N-well or the N /P-well, tendsto be more effective in the blue than in the green or the red,while deeper junctions, like the N-well/P-epi tends to be moreeffective for these colours. It has to be stressed that efficientgreen detection is particularly important for colour cameras,since the green is the wavelength to which the eye is moresensible. This is also the reason why the most common colourfiltering pattern is the Bayer RGB pattern, which features twogreen and one red and one blue pixel every set of four.Figure 1. A commercial sensor normally operates in two sequentialphase, the integration (on the left) and then the readout. While theintegration can be done either in the rolling shutter mode (row byrow) or in the snapshot mode (all pixels at the same time, the readoutis always done row by row.Figure 2. Schematic view of the cross-section of a CMOS process.III.SENSORS IN CMOSA schematic cross-section of a CMOS circuit fabricated ina twin-well technology is given in figure 2. Since everyjunction, either metallurgical or field-induced, can potentiallybe used for radiation detection, there are several ways tocreate a detector in a CMOS circuit. As indicated in figure 2,junction can be created directly in the wells or also betweenthe wells and the substrate. This latter tends to be P-type andoften manufactured as a thin epitaxial layer on a thicksubstrate, also of P type, and whose presence is to guaranteemechanical stability during wafer handling. The thicksubstrate tends to be heavily doped, while the epitaxial layeris less doped, with a resistivity of the order of 1 – 10 Ohm cm.For visible light, or generally photon, detection, it isimportant to consider the absorption length of the radiation,which is a function of the wavelength. The energy gap forsilicon being 1.1 eV, this translates into a cut-off wavelengthof 1.1 µm, i.e. in the near infra-red. The absorption length isvery long at this wavelength and tends to decrease withincreasing wavelength, up to the UV band. In the visibleregion of the spectrum, the absorption length spans from afew microns at the red end down to fraction of a micron in theblue area. This is a rather fortunate coincidence, since itThe N-well/P-epi junction has also another importantcharacteristics, which is also illustrated in figure 2. Thedoping of this layer is lower than that of the P-wells aboveand of the P substrate below. At the boundary of the Pepitaxial layer, there exists then a potential barrier whoseheight iskT N PlnqN epiwhere NP is the doping of either the P-wells or the P-substrateand Nepi is the doping of the epitaxial layer. The otherquantities k, T and q have the usual meaning of theBoltzmann’s constant, the absolute temperature and thecharge of the electron respectively.Electrons induced by the radiation in the P epitaxial layerare minority carriers in this free-field region. The potentialbarriers at the boundaries keep the electrons inside this region.When they approach the depletion area around the N-well,they experience a field that will attract them to the anodewhere they are finally collected. This means that the entireepitaxial layer can be used as a sensitive layer for radiation.The use of the potential barriers generated by the dopinglayers to confine electrons in the epitaxial layer was wellknown to the CCD community (see for example [18]). In theCMOS field, it was first proposed for the detection of light[10] and successively proposed for the detection of chargedparticles [19]. For the detection of visible light, the detection
efficiency will still be limited by the material existing on topof the silicon surface, i.e. insulating dielectrics and metals forinterconnect. While dielectric material can be fairlytransparent, metals are opaque and constitute the mainlimitation to the detection efficiency. This is not the case forhigh-energy charged particles, since the metal layers are onlya few micron thick. In this case, the N-well/p-epi diodeachieve effectively 100% detection efficiency asdemonstrated in [20, 21, 22].IV.CMOS TECHNOLOGY FOR SENSORSSo far, the big push to the development of CMOS sensorshas come from industrial applications. This has also broughtimprovements in the technology since foundries haverecognised the commercial interest. Today, aside thetraditional ‘flavours’ of logic and mixed-mode, or analogueRF, many foundries propose a new flavour, named CMOSImage Sensors or CIS [23, 24, 25, 26]. In these CIS processes,modules are added to improve the quality of the images. Inthese developments the main guidelines are: reduction of the average leakage current reduction of ‘white spots’, i.e. of pixels with veryhigh leakage current increasing the dynamic range improving the quantum efficiency.For an example of how the first two points are tackled byindustry see for example [27]. For the third one, foundriestend to exploit the already existing feature of having multiplepower supplies, for example 2.5 and 3.3 V in a 0.25 µmprocess, and multiple Vt transistors.Sensor512x512 cameraon-a-chipEUVAPSLinCSRAL HEPAPS2The last point deserves a few more lines since it is ofparticular interest for the detection of charged particles. Asmentioned in the previous paragraph, for good quantumefficiency in the green-red area of the spectrum, the sensitivevolume has to be at least a few microns thick. Most of thefoundries involved in the development of CIS processes adoptan epitaxial layer with a few micron thickness because ofthese. This choice of substrate is particularly interesting inview of the move of many microelectronics foundries towardsSOI substrate, where the silicon layer would be too thin to beused as a useful substrate for detection. It should however bementioned that SOI substrates have also received someinterest for the detection of radiation [28]. In this case, the‘handle wafer’ is used as a sensitive layer. This has not yetentered the production lines of main manufacturers, but it isvery interesting in view of the fact that ‘handle wafer’ can bemade much thicker and with higher resistivity than epitaxiallayers, normally limited to 20 µm and about 100 Ohm cmrespectively.V. CMOS SENSORS FOR SCIENCEThe first proposal to use CMOS sensors for a scientificapplication is probably for a vertex detector in particle physics[19]. Since then, different technologies have been tested andthe results proved the original idea that 100% efficiency forcharged particle detection could be achieved with the Nwell/P-substrate diode. Also, the radiation resistance of thesensors have been tested up to level [22] of interest for thefuture Linear Collider.In CCLRC-RAL we are now working to expand the rangeof applications where CMOS sensors can be used. A list ofthe main sensors designed so far can be found in table 1.FormatPitch (µm)Area(mm*mm)Pixel type /CDS525x525 /0.27M pixels2880x4096 /11.8M pixels1x4096 /4K pixels384x256 /0.1 M pixels2513*133MOSMOSperpixel34MOS45312linearn.a.15 (20 forFAPS)7*53MOS / 4MOS/ CTIA / FAPS3/4/3 / 38TechnoReadout0.5µmCMOS0.25 µmCIS0.25 µmCIS0.25 µmCIS10-bit column-parallelADCAnalogueAnalogueAnalogueTable 1. List of the main CMOS sensors designed by CCLRC-RAL.The 512x512 was designed as a technology demonstrator[29]. It is a camera-on-a-chip. At the bottom of each column(right in the figure 3), one column amplifier and a 10-bitsingle-ramp ADC are integrated. The readout is digital on a11-bit wide digital bus, one overflow bit sent out in parallelwith the 10 data bits. An example of snapshot with visiblelight is shown in figure 4. The pixel has the simple 3 MOSstructure and the diode is N-well / P-epi and features a highdetection efficiency. It has been tested with a number ofparticles, including 140 keV electrons. An example of thetests performed with electrons can be seen in figure 5. In thiscase a focused beam was raster scanned over the sensor, andthe average number of electrons per spot was about 2. Theresults show the excellent performances of the sensor for thedetection of low-energy charged particles.
The other three sensors have been recently designed in a0.25 µm CIS process. A photo of the 200 mm wafer with thethree sensors is shown in figure 6. The first sensor is a 12Mpixel sensor which is a prototype for 16M pixel for EUVobservation of the Sun [30]. The driver application is theESA’s Solar Orbiter mission. The second one is a linearsensor, prototype of a sensor fro Earth Observation whichcould feature 3, 4 or even 5 arrays for colour and possiblyinfrared detection of the earth from Space with a very highresolution of 1 m [31].Figure 3. Photo of the 512x512 sensor. Columns are orientedhorizontally in this picture. On the right, i.e. at the bottom of thecolumns, adjustable gain column amplifiers together with a 10-bitADC per column.Figure 6. Photograph of the 200 mm wafer with the three sensorsdesigned in a 0.25 µm CIS process. In each reticle, the large sensor isthe 3k*4k sensor. On top of this, on the right is the linear sensor andof the left is the parametric test sensor.The third one is a parametric sensor, i.e. a sensor wheredifferent designs are integrated in order to test differentarchitectures. The floorplan of the sensor is shown in figure 7.Row and column decoders give random access to the singlepixels. The layout is organised in 4 vertical stripes, each witha different type of design:Figure 4. Snapshot taken with the 512x512 sensor. 3 MOS 4 MOS Charge Preamplifier Flexible Active Pixel Sensor FAPS.The last pixel is a special architecture designed with aninternal analogue buffer in each pixel. The buffer consists of10 memory cells. The pixel has also two amplifiers, one forwriting and the other one for reading the cells. This pixelarchitecture has been chosen in view of the use of CMOSsensors for the next Future Collider. The design of themachine should allow to write data at the required speed (50MHz for some designs) during the beam-on period and thenread the sample out when the beam is off. More details aboutthe architecture can be found in [32]. Tests are in progress atpresent.Figure 5. Raster scan with 140 keV electrons recorded with the512x512 device. The beam was set so that each spot carried anaverage of 2 electrons per spot. Because of Poisson statistics, thismeans that some spots will have no electron. The distribution ofelectron per spots fits well with the expected Poisson distribution.
[2] W. S. Boyle and G. E. Smith, Charge Coupledsemiconductor devices, Bell System Technical Journal, vol.49, 1970, 587-593[3] C. J. S. Damerell, F. J. M. Farley, A. R. Gillman, F. J.Wickens, Charge-coupled devices for particle detection withhigh spatial resolution, Nucl. Instr. and Methods 185 (1981)33-42[4] L. J. Kozlowski, Low noise capacitive transimpedanceamplifier performance vs. alternative IR detector interfaceschemes in submicron CMOS, Proceedings of SPIE, vol.2745, 1996, 2-11Figure 7. Floorplan of the parametric test sensor.VI.CONCLUSIONSIn the last decade, CMOS sensors have been challengingthe dominant role of Charge-Coupled Device in consumer andindustrial applications. At present, CMOS sensors representover 30% of the market and should go over 50% in a fewyears [33].In scientific applications, CMOS sensors were firstproposed as a vertex detector for particle physics, and becauseof the properties of the silicon substrate, CMOS sensors couldbe used for the detection of a wide spectrum ofelectromagnetic radiation, ranging from infrared to UV andlow-energy X-rays, of charged particles, including low-energyelectrons, and of neutrons [34].For particle physics, we have also recently proposed anovel structure [35] which would allow to increase the electricfield in the sensitive volume. The charge collection wouldthen be speeded up, resulting also in an improved radiationresistance. A sensor with this type of architecture is nowbeing currently designed and should be manufactured in thefirst half of next year (2004). This sensor could provide asolution to the design of CMOS Active Pixel Sensors forharsh radiation environment as the ones found in LHC.CMOS sensors have only started to be used for scientificapplications but their potential advantages over othersolutions promise new exciting developments in the nextyears.VII.ACKNOWLEDGEMENTSI wish to warmly thank all the people who contributed tothis work either on the designs or on the experimental tests inRAL: Mark Prydderch, Quentin Morrissey, Arwel Evans, BillGannon, Giulio Villani, Marcus French, Nick Waltham,James King, Bruce Gallop, Mike Tyndel.VIII.REFERENCES[1] E. R. Fossum, CMOS Image Sensors: ElectronicCamera-On-A-Chip, IEEE Trans. on Electron Devices, vol.44, no.10, October 1997, 1689-1698[5] B. Pain, S. K. Mendis, R. C. Schober, R. H. Nixon, E.R. Fossum, Low-power, low-noise analog circuits for onfocal-plane signal processing of infrared sensors, Proceedingsof SPIE, vol. 1946, 1993, 365-374[6] B. Pain and E. R. Fossum, Design and operation ofself-biased high-gain amplifier arrays for photon-countingsensors, Proceedings of SPIE, vol. 2745, 1996, 69-77[7] L. J. Kozlowski, L. Juo and A. Tomasini, PerformanceLimits in Visible and Infrared Imager Sensors, IEEE Digest ofTechnical Papers[8] E. R. Fossum, R. K. Bartman and A. Eisenman,Application of the active pixel sensor concept to the guidanceand navigation, Proceeding of SPIE, vol. 1949, 1993, 256-265[9] O. Yadid-Pecht, R. Ginosar and Y. Diamand, Arandom access photodiode array for intelligent imagecapture, in IEEE Trans. On Electron Devices, vo.l. 38, 17721780, Aug. 1991[10] B. Dierickx, G. Meynants, D. Scheffer, Near 100%fill factor CMOS active pixels, Extended programme of the1997 IEEE CCD & Advanced Image Sensors Workshop,Brugge, Belgium[11] E. Heijne, P. Jarron, A. Olsen et N. Redaelli, Thesilicon micropattern detector: a dream?,in NuclearInstruments and Methods A 273, 615-619, 1988[12] D. X. D. Yang, A. El Gamal, B. Fowler and H. Tian,A 640x512 CMOS Image Sensors with Ultrawide DynamicRange Floating-Point Pixel-Level ADC, IEEE Journal ofSolid-State Circuits, vol. 34, n. 12, 1821-1834[13] D. X. D. Yang, B. Fowler and A. El Gamal, ANyquist-Rate Pixel-Level ADC for CMOS Image Sensor,IEEE Journal of Solid-State Circuits, vol. 34, n. 3, 348-356[14] S. Kleinfelder, S. H. Lim, X. Liu and A. El Gamal, A10,000 frames/s 0.18 µm CMOS Digital Pixel Sensor withPixel-Level Memory, presented at the 2001 International SolidState Circuits Conference[15] K.-B. Cho, A. Krymski, E. Fossum, A MicropowerSelf-Clocked Camera-on-a-chip, Extended programme of the2001 IEEE CCD & Advanced Image Sensors Workshop,Lake Tahoe, USA[16] G. Yang, C. Sun, C. Wrig
CMOS APS, or Monolithic Active Pixel Sensors, MAPS 1, have several advantages. 1 The terms MAPS is used to distinguish CMOS APS from hybrid detectors (also called Hybrid Active Pixel Sensors or MAPS are
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Used vanilla CMOS process available at many foundries Single-stage "CCD" in each pixel to allow complete charge transfer In-pixel source-follower amplifier for charge gain Allows low noise CDS operation In-column FPN reduction Permitted high performance camera-on-a-chip Basis of all modern CMOS image sensors
CMOS APS: The CMOS pixel sensors use a photogate or photodiode to capture the photon flux and convert it into corresponding electrical charge. The main photodiode type MOS pixel sensors which use the photon flux integration mode can be divided into 2 basic approaches, i.e. of passivepixels (PPS) and active pi
the various types of image sensors, complementary metal oxide semiconductor (CMOS) based active pixel sensors (APS), which are characterized by reduced pixel size, give fast readouts and reduced noise. APS are used in many applications such as mobile cameras, digital cameras, Webcams, and many consumer, commercial and scientific applications.Cited by: 2Publish Year: 2007Au
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Two monolithic APS have been employed in this study; a standard 3T APS (Fig. 1. a) and a novel APS that offers high pixel level integration (Fig. 1. b) utilizing the recent advances in standard CMOS technology. Description of the two pixel
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AutoCAD education, and apply them right away to your fi rst real drawing. Let us take a look at the Layers Properties Manager. This is AutoCAD’s Layers dialog box, where everything important related to layers happens. Open a new fi le and, if you decide to use toolbars, also bring up the Layer toolbar. We take a closer look at that toolbar in Section 3.3 , but for now you need only the .
