Qualcomm Crypto Engine Core Version 5.4.2 FIPS 140-2 Non .

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Qualcomm Crypto Engine CoreVersion 5.4.2FIPS 140-2 Non-Proprietary Security PolicyVersion: 1.02019-03-12Prepared for:Qualcomm Technologies, Inc.5775 Morehouse DriveSan Diego, CA 92121Prepared by:atsec information security Corp.9130 Jollyville Road, Suite 260Austin, TX 78759Qualcomm Snapdragon and Qualcomm Crypto Engine Core are products of Qualcomm Technologies, Inc. and/or itssubsidiaries. Qualcomm and Snapdragon are trademarks of Qualcomm Incorporated, registered in the United States andother countries.

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security PolicyTABLE OF CONTENTS1. Introduction .41.1. Purpose of the Security Policy .42. Cryptographic Module Specification .52.1. Module description .52.1.1. Hardware Description .62.1.2. Module Validation Level .62.2. Description of Modes of Operations .72.3. Cryptographic Module Boundary.72.3.1. Hardware Block Diagram .73. Cryptographic Module Ports and Interfaces . 104. Roles, Services and Authentication . 114.1. Roles . 114.1.1. Crypto Officer Role . 114.1.2. User Role . 114.2. Services. 114.3. Identification and Authentication. 144.4. Strength of Authentication. 144.5. Authentication Data Protection . 145. Physical Security. 155.1. Type . 156. Operational Environment . 166.1. Applicability . 167. Cryptographic Key Management . 177.1. Key/CSP Generation Management. 177.2. Zeroization . 177.3. Key/CSP Lifecycle . 178. Electromagnetic Interference/Electromagnetic Compatibility (EMI/EMC). 189. Power up Tests . 199.1. Cryptographic algorithm tests (known answer tests). 1910. Design Assurance . 2010.1. Configuration Management . 2010.1.1. Crypto Officer Guidance. 2011. User Guidance. 21 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.2 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy12. Mitigation of Other Attacks . 2213. Terms and Abbreviations. 23 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.3 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy1. IntroductionThis document is a FIPS 140-2 Security Policy for the Qualcomm Crypto Engine Core cryptographicmodule. The version number of this Qualcomm Crypto Engine Core is 5.4.2. This documentcontains a specification of the rules under which the Qualcomm Crypto Engine Core must operate.It also describes how this Qualcomm Crypto Engine Core meets the requirements as specified inFederal Information Processing Standards Publication 140-2 (FIPS PUB 140-2) for a Security Level 2module. It is intended for the FIPS 140-2 testing lab, Cryptographic Module Validation Program(CMVP), developers working on the release, administrators and users of the Qualcomm CryptoEngine Core.For more information about the FIPS 140-2 standard and validation program, refer to the NISTwebsite at e-validation-program.1.1.Purpose of the Security PolicyThere are three major reasons that a security policy is required: It is required for FIPS 140-2 validation.It allows individuals and organizations to determine whether the implemented QualcommCrypto Engine Core satisfies the stated security policy.It allows individuals and organizations to determine whether the described capabilities,level of protection, and access rights provided by the Qualcomm Crypto Engine Core meettheir security requirements. 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.4 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy2. Cryptographic Module Specification2.1.Module descriptionThe Qualcomm Crypto Engine Core is a single-chip hardware module implemented as a sub-chip inthe Qualcomm Snapdragon 855 SoC. From the validation perspective, the Qualcomm CryptoEngine Core is configured as a single chip hardware module. The cryptographic services providedby the Qualcomm Crypto Engine Core are: Data encryption / decryption utilizing symmetric ciphers, i.e., Triple-DES, and AESalgorithms. Computation of hash values, i.e., SHA-1, SHA-256, SHA-384 and SHA-512. Message authentication utilizing HMAC-SHA1, HMAC-SHA256, HMAC-SHA384, HMACSHA512, AES CMAC, hashing algorithms. Hashing and ciphering operations using AES CCM.Table 2-1: Summary of FIPS approved and FIPS non-approved algorithms in the Qualcomm CryptoEngine CoreFIPS ApprovedAES-128 CBC, AES-256 CBCAES-128 ECB, AES-256 ECBAES-128 CTR, AES-256 CTRAES-128 CCM, AES-256 CCMTriple-DES CBC (three-key)Triple-DES ECB (three-key)SHA-1SHA256SHA-384SHA-512HMAC SHA-1 with key sizes between 112 bitsand 512 bitsHMAC SHA-256 with key sizes between 112bits and 512 bitsHMAC SHA-384 with key sizes between 112bits and 512 bitsHMAC SHA-512 with key sizes between 112bits and 512 bitsAES-CMACFIPS Non-ApprovedAES-128 XTS, AES-256 XTS1DES CBCDES ECBHMAC SHA-1 with key sizes below 112 bitsHMAC SHA-256 with key sizes below 112 bits1Implemented Algorithmsencryption, decryptionencryption, decryptionencryption, decryptionencryption, decryption (with messageauthentication code)encryption, decryptionencryption, decryptionHashingHashingHashingHashingmessage authentication codemessage authentication codemessage authentication codemessage authentication codemessage authentication codeImplemented Algorithmsencryption, decryptionencryption, decryptionencryption, decryptionmessage authentication codemessage authentication codeAES-XTS mode is not approved because the check required by IG A.9 for Key 1 not equal Key 2 is not performed. 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.5 of 23

QTI Crypto Engine CoreHMAC SHA-384 with key sizes below 112 bitsHMAC SHA-512 with key sizes below 112 bitsAEAD-SHA-1 AES CBCAEAD-SHA-1 AES CTRAEAD-SHA-1 DES CBCAEAD-SHA-1 Triple-DES CBCFIPS 140-2 Non-Proprietary Security Policymessage authentication codemessage authentication codeencryption, decryption (with messageauthentication code)encryption, decryption (with messageauthentication code)encryption, decryption (with messageauthentication code)encryption, decryption (with messageauthentication code)2.1.1.Hardware DescriptionThe Qualcomm Crypto Engine Core is implemented in the Qualcomm Crypto Engine Core 5.4.2hardware, which resides in Snapdragon 855 processors. The Qualcomm Crypto Engine Core 5.4.2provides a series of algorithms (as listed in Table 2-1) implemented in the device hardware.2.1.2.Module Validation LevelThe Qualcomm Crypto Engine Core is intended to meet requirements of FIPS 140-2 at an overallSecurity Level 2. The following table shows the security level claimed for each of the elevensections that comprise the validation:Table 2-2: Security LevelsFIPS 140-2 SectionsSecurity LevelN/A12Cryptographic Module SpecificationXCryptographic Module Ports and InterfacesXRoles, Services and AuthenticationXFinite State ModelXPhysical SecurityXOperational Environment4XCryptographic Key ManagementXEMI/EMCXSelf-TestsXDesign AssuranceXMitigation of Other Attacks3X 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.6 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security PolicyThe Qualcomm Crypto Engine Core is classified as a single-chip hardware module for the purposeof FIPS 140-2 validation. The logical cryptographic boundary is the sub-chip implementing theQualcomm Crypto Engine Core, while the physical boundary is the Snapdragon 855 SoC. TheQualcomm Crypto Engine Core was tested as a sub-chip implemented within the Snapdragon 855SoC.2.2.Description of Modes of OperationsThe Qualcomm Crypto Engine Core supports two modes of operation: FIPS approved mode and anon-approved mode. The mode of operation is implicitly assumed depending on the serviceinvoked. The Qualcomm Crypto Engine Core enters FIPS approved mode after successfulcompletion of the power up self-tests. Invoking a non-approved service will result in the QualcommCrypto Engine Core implicitly switching to non-approved mode. After completion of the service theQualcomm Crypto Engine Core will immediately switch back to the FIPS approved mode. Thendepending on the next service call it will either remain in FIPS mode or will transition to nonapproved mode. All CSPs are kept separate between the two modes.Table 2-1 provides a summary of all security functions (both FIPS Approved and FIPS nonApproved). Table 4-1 lists the roles. Table 4-2 and Table 4-3 illustrate the services available toeach role (Crypto Officer and User).2.3.Cryptographic Module BoundaryThe physical boundary of the Qualcomm Crypto Engine Core is the physical boundary of theSnapdragon 855 SoC, which contains the Qualcomm Crypto Engine Core which is implemented asa sub-chip. Consequently, the embodiment of the Qualcomm Crypto Engine Core is a Single-chipcryptographic module. The logical boundary is the Qualcomm Crypto Engine Core.2.3.1.Hardware Block DiagramIn the hardware block diagram, the arrows depict the flow of the status, control and data.Parameters are passed to the Qualcomm Crypto Engine Core and results received from theQualcomm Crypto Engine Core, are via Direct Memory Access (DMA) writing and reading theQualcomm Crypto Engine Core's registers.The CSPs, such as the encryption key, are written directly to registers or submitted via the FIFOchannel to be stored within the Qualcomm Crypto Engine Core 5.4.2 hardware. The remainder ofthe Snapdragon 855 SoC, which is not part of the Qualcomm Crypto Engine Core, either passes theCritical Security Parameters (CSP) from the software executing on top of the SoC, to theQualcomm Crypto Engine Core, or as a “user” of cryptographic services generates the CSP anddelivers them to the Qualcomm Crypto Engine Core. 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.7 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security PolicyFigure 1: Hardware Block DiagramThe CSPs are passed via Direct Memory Access (DMA) to First In First Out queues (FIFOs) andprocessed by the Qualcomm Crypto Engine Core. All parameters to the Qualcomm Crypto EngineCore are also provided via FIFOs. 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.8 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security PolicyFigure 2: Snapdragon 855 processor 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.9 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy3.Cryptographic Module Ports and InterfacesTable 3-1 Ports and InterfacesFIPS InterfaceData InputData OutputControl InputStatus OutputPower InputPortsData in FIFOsData out FIFOsRegistersRegistersPhysical power connectorAs indicated in Table 3-1, all status ports and control ports are directed through the interface ofthe Qualcomm Crypto Engine Core’s logical boundary, which is the registers of the QualcommCrypto Engine Core for control input. For data input and data output, the FIFOs implement thehigh-speed interface. The status output is provided via registers.Once the Qualcomm Crypto Engine Core finishes initialization and all self-tests completesuccessfully, all cryptographic functions are made available. If any of the Qualcomm Crypto EngineCore’s KAT fails, the Qualcomm Crypto Engine Core self-test causes the Qualcomm Crypto EngineCore to enter into a locked state (see Section 9.1 for more details). To recover from a KAT failure areset of the Qualcomm Crypto Engine Core is required. The reset causes it to reinitialize and re-runall KATs.Caller-induced or internal errors do not reveal any sensitive material to callers. Cryptographicbypass capability is not supported by the Qualcomm Crypto Engine Core. The Qualcomm CryptoEngine Core ensures that there is no means to obtain CSP or key data from the Qualcomm CryptoEngine Core by placing the CSPs into write-only registers. This action prevents any entityinteracting with the Qualcomm Crypto Engine Core from being able to read the CSPs. Additionally,key zeroization can be performed by issuing a reset event to the Qualcomm Crypto Engine Core.There is no means to obtain sensitive information from the Qualcomm Crypto Engine Core.If a caller wants to use a non-Approved cipher, a separate “pipe pair” must be used or a new keyfor the non-Approved cipher must be loaded. 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.10 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy4.Roles, Services and Authentication4.1.RolesThe Qualcomm Crypto Engine Core supports two roles: a Crypto Officer role and a User role. Rolesare implicitly assumed based on the services requested.Users of the Qualcomm Crypto Engine Core are the boot loader and software applications loadedonto the Snapdragon 855 SoC. In a typical use case scenario of the Qualcomm Crypto Engine Core,an Original Equipment Manufacturer (OEM) places a hash of their RSA public key into the OneTime Programmable (OTP) memory, within the Qualcomm Crypto Engine Core upon the purchaseof Snapdragon 855 SoC. The OEM uses the uniquely matching private key to sign the boot loaderand software application images along with the software IDs. The OEM also includes a copy of theOEM’s x.509 certificate in each signed image.The user authentication is based on RSA signature verification and is explained in more detail inthe following sections.4.1.1.Crypto Officer RoleThe boot loader assumes the Crypto Officer role when it initializes the Qualcomm Crypto EngineCore by properly setting up keys/CSPs in the designated key registers or the FIFOs that will belater used by the software applications.4.1.2.User RoleThe software applications assume the User role when requesting any services provided by theQualcomm Crypto Engine Core. The User role has access to all of the Qualcomm Crypto EngineCore’s services except Qualcomm Crypto Engine Core initialization.Table 4-1 RolesRolesUserCrypto OfficerServices (see Table 4-2 and 4-3)Utilization of cryptographic services of the QualcommCrypto Engine CoreInitialize Qualcomm Crypto Engine Core keys for use byuser role4.2.ServicesThe Qualcomm Crypto Engine Core does not provide a bypass capability through which somecryptographic operations are not performed or where certain controls implemented during normaloperation are not enforced.All services are implemented within the Qualcomm Crypto Engine Core.The following tables (Table 4-2 and Table 4-3) illustrate the roles and corresponding services of theCrypto Officer and User. 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.11 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security PolicyTable 4-2 Approved ServicesCSPModesIs FIPSApproved?If Yes Cert icesSymmetric AlgorithmsAESencryptionanddecryption AES Symmetric key(128, 256 bit)CBC, ECB, Cert. C 442CTR, CCMTriple-DES Triple DES Symmetric CBC, ECBkey (192 bits)Read/WriteFIPS 197SP 800-38[A,C,E]Cert. C 442Read/WriteFIPS 46-3SP 800-38AHash FunctionsSHA-1 NoneN/ACert. C 442Read/WriteFIPS 180-4SHA-256 NoneN/ACert. C 442Read/WriteFIPS 180-4SHA-384 NoneN/ACert. C 442Read/WriteFIPS 180-4SHA-512 NoneN/ACert. C 442Read/WriteFIPS 180-4HMAC SHA-1 HMAC SHA-1 key (key N/Alength between 112bits and 512 bits)Cert. C 442Read/WriteFIPS 198-1HMAC SHA256 HMAC SHA-256 (keylength between 112bits and 512 bits)N/ACert. C 442Read/WriteFIPS 198-1HMAC SHA384 HMAC SHA-384 keyN/A(key length between112 bits and 512 bits)Cert. C 442Read/WriteFIPS 198-1HMAC SHA512 HMAC SHA-512 (keylength between 112bits and 512 bits)N/ACert. C 442Read/WriteFIPS 198-1AES-CMAC AES Symmetric key(128, 256 bit)CMACCert. C 442Read/WriteSP 800-38BMessage Authentication Codes (MACs)Miscellaneous 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.12 of 23

QTI Crypto Engine CoreInitializeQualcommCryptoEngine Corekeys for useby User role2CSPModesIs FIPSApproved?If Yes Cert icesFIPS 140-2 Non-Proprietary Security Policy NoneN/AN/AN/AN/ASelf Tests NoneN/AN/AN/AN/AZeroization All CSPsN/AN/ARead/WriteN/ANoneN/AN/AN/AN/AQuery status Table 4-3 Non-Approved ServicesRoles2COUserServicesAES-XTS DES HMAC SHA-1 with key size less than 112 bits HMAC SHA-256 with key size less than 112 bits HMAC SHA-384 with key size less than 112 bits HMAC SHA-512 with key size less than 112 bits AEAD-SHA-1 AES AEAD-SHA-1 DES AEAD-SHA-1 Triple-DES The methodology for setting the encryption keys is described in the “Crypto Core Hardware Programming Guide” manual 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.13 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy4.3.Identification and AuthenticationAs mentioned previously, user authentication is based on RSA signatures. Each OEM utilizes theirunique RSA private key to sign the boot loader and software application images along with itsx.509 certificate. The x.509 certificate contains the OEM’s public key. The OU field (i.e. the fieldindicating the Certification Services Division) of the signed x.509 certificate contains the softwareID. Finally, the OEM puts a hash of its public key into non-volatile read-only OTP memory within theQualcomm Crypto Engine Core.The user is identified via the software ID embedded in the loadable image. The user authenticationperformed is twofold. First, the OEM’s public key in the x.509 certificate within the image is hashedand the hash value is compared to the hash of the RSA public key stored in read-only memorywithin the Qualcomm Crypto Engine Core. If the hashes match, the OEM’s public key is verified.Then, the OEM’s public key is used to verify the RSA signature of the boot loader or the softwareimage to be loaded. If the RSA signature verification succeeds, then the image is authenticatedand hence can be loaded and executed on the Snapdragon 855 SoC.4.4.Strength of AuthenticationStoring a hash of the OEM’s public key within the Qualcomm Crypto Engine Core's read-onlymemory allows the OEM to choose the size of the RSA key they want to use for authentication tothe Qualcomm Crypto Engine Core. The minimum RSA key size that an OEM may use is 2048-bits.According to table 1 in FIPS IG 7.5, an RSA key size of 2048 bits provides a minimum of 112 bits ofstrength and a key size of 3072 bits provides a minimum of 128 bits of strength. Therefore, thestrength of the authentication mechanism in use is a minimum of 1 / 2112 or 1.925929944e-34. Theability to successfully authenticate the RSA signed image is dependent on the ability to guess thesigning RSA private key that matches the verified public key. Even using a rate of 1µs per failedauthentication, which would allow 60,000,000 consecutive attempts per minute (60s / 0.001s),only provides a probability of successfully authenticating that is less than or equal to 60,000,000 *1 / 2112 ( 6.933347799e-19) which is much less than 1 / 100,000 or 0.00001.4.5.Authentication Data ProtectionThe hash of the RSA public key stored in the read-only memory of the Qualcomm Crypto EngineCore is used as the means to verify the OEM’s public key. Since this memory is non-volatile readonly memory, it cannot be modified. The verified public key is used to verify the OEM’s RSAsignature of the signed boot loader or software application images. Only the images that aresigned by the OEM can be authenticated to the Qualcomm Crypto Engine Core. Any image with analtered RSA signature won’t be authenticated. Hence, it won’t be loaded and get to use theQualcomm Crypto Engine Core. 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.14 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy5.Physical Security5.1.TypeThe Qualcomm Crypto Engine Core Cryptographic Module is a single-chip hardware module whichconforms to the Level 2 requirements for physical security. The Qualcomm Crypto Engine Core is asub-chip enclosed in a production grade component.At the time of manufacturing, the die is embedded within a printed circuit board (PCB), whichprevents visibility into the internal circuity of the Qualcomm Crypto Engine Core. The layeringprocess which is used to embed the die into the PCB also prevents tampering of the physicalcomponents without leaving tamper evidence.The Qualcomm Crypto Engine Core is further protected by being enclosed in commercial off theshelf mobile device utilizing production grade commercially available components and that themobile device enclosure completely surrounds the Qualcomm Crypto Engine Core. 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.15 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy6.Operational Environment6.1.ApplicabilityThe Qualcomm Crypto Engine Core is a single chip hardware module. The procurement, build andconfiguring procedure are controlled. Therefore, the operational environment is considered nonmodifiable. 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.16 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy7.Cryptographic Key Management7.1.Key/CSP Generation ManagementThe Qualcomm Crypto Engine Core does not perform key generation for any algorithms.The Qualcomm Crypto Engine Core does not provide any asymmetric algorithms. Manual key entryor key output capabilities are not provided. All Keys/CSPs can only be written to the QualcommCrypto Engine Core by the boot loader by writing to the key registers or into the FIFOs assigned tothe particular use case.Callers pass keys and similar sensitive information to the Qualcomm Crypto Engine Core by writingto specific assigned registers by sending the data via DMA request. Any attempt to write to a nonassigned FIFO is blocked. Keys are stored within the Qualcomm Crypto Engine Core in write-onlyregisters or the Qualcomm Crypto Engine Core’s internal key store. Therefore any attempt to readCSPs are blocked and zeros are returned rather than the actual CSP.Keys and CSPs can be explicitly zeroized by sending an access control reset event to theQualcomm Crypto Engine Core.7.2.ZeroizationAs stated previously, the Qualcomm Crypto Engine Core stores all keys and CSPs internally. Allkeys and CSPs are stored write-only and are not readable outside of the Qualcomm Crypto EngineCore. When the Qualcomm Crypto Engine Core receives a reset event, it will zeroize all CSPscontained within the Qualcomm Crypto Engine Core.7.3.Key/CSP LifecycleThe following table shows the generation, storage and zeroization of all CSPs used by theQualcomm Crypto Engine Core.Table 7-1 Key/CSP LifecycleKey/CSPGenerationStorageZeroizationAES KeysN/AInternal key storagememory orRegister set (legacy use)During module resetor when overwritten by newkeyTriple-DES KeysN/AInternal key storagememory orRegister set (legacy use)During module resetor when overwritten by newkeyHMAC KeysN/AInternal key storagememory orRegister set (legacy use)During module resetor when overwritten by newkeyCMAC KeysN/AInternal key storagememory orRegister set (legacy use)During module resetor when overwritten by newkey 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.17 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy8.Electromagnetic Interference/Electromagnetic Compatibility(EMI/EMC)The Qualcomm Crypto Engine Core hardware component cannot be certified by the FCC, as it isnot a standalone device. It is a sub-chip embedded in the Snapdragon 855 SoC, which is also not astandalone device. However, it is intended to be used within a COTS device which would undergostandard FCC certification for EMI/EMC.According to 47 Code of Federal Regulations, Part 15, Subpart B, Unintentional Radiators, theQualcomm Crypto Engine Core is not subject to EMI/EMC regulations because it is a subassemblythat is sold to an equipment manufacturer for further fabrication. That manufacturer is responsiblefor obtaining the necessary authorization for the equipment with the Qualcomm Crypto EngineCore embedded prior to further marketing to a vendor or to a user. 2019 Qualcomm Technologies, Inc. and/or its subsidiaries. All rights reserved.18 of 23

QTI Crypto Engine CoreFIPS 140-2 Non-Proprietary Security Policy9.Power up TestsPower up self-tests consist of known-answer tests of algorithm implementations. The QualcommCrypto Engine Core power up tests are automatically performed, independently of any user duringpower up of the Qualcomm Crypto Engine Core. All self-tests are performed as a single atomicaction that has two possible results: success or failure. If the result is success, the QualcommCrypto Engine Core becomes operational, if it is failure, the Qualcomm Crypto Engine Core entersinto an error state and cryptographic functions cannot be performed.The power up tests are also run when a reset event is received. If any of the tests fail, theQualcomm Crypto Engine Core will enter into an error state. The Qualcomm Crypto Engine Corecannot be used in this state. To recover from the error state it needs to be re-initialized. This isachieved via the successful execution of the power up tests, which can be triggered by either apower-off/power-on cycle or the receipt of a reset event.The power up tests trigger immediately when a reset occurs and execute all needed tests untilcompletion. Once completed successfully, the logic releases the Qualcomm Crypto Engine Core forexternal usage. If an error is detected during the tests, the logic locks the Qualcomm CryptoEngine Core and prevents external usage. Once locked, the Qualcomm Crypto Engine Core willonly respond to a reset, which will cause the Qualcomm Crypto Engine Core to re-execute thepower up tests. If the error persists, the Qualcomm Crypto Engine Core will remain unavailable.“On demand” tests which are required by FIPS 140-2 can be performed by either of the followingmethods: A power-off/power-on cycle of the Qualcomm Crypto Engine CoreIssuing a Crypto Core reset to the Qualcomm Crypto Engine CoreThe Qualcomm Crypto Engine Core implements the following self-tests to ensure properfunctioning of the Qualcomm Crypto Engine Core implemented self-tests include power up selftests of all approved algorithms.9.1.Cryptographic algorithm tests (known answer tests)Table 9-2 Power up TestsAlgorithmTestAES encryption (CCM)KATAES decryption (CCM)KATAES encryption (ECB)KATAES decryption (ECB)KATTriple-DES encryption (ECB)KATTriple-DES decryption (ECB)KATHMAC SHA-1KATHMAC SHA-256KAT

Qualcomm Technologies, Inc. 5775 Morehouse Drive San Diego, CA 92121 Prepared by: atsec information security Corp. 9130 Jollyville Road, Suite 260 Austin, TX 78759 Qualcomm Snapdragon and Qualcomm Crypto Engine Core are products of Qualcomm Technologies

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