11.9: A 105 Gb/s Dielectric-Waveguide Link In 130nm BiCMOS .

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11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nmBiCMOS Using Channelized 220-to-335GHz Signaland Integrated Waveguide CouplerJack W. Holloway1,2, Georgios C. Dogiamis3, Ruonan Han11MassachusettsInstitute of Technology, Cambridge, MA2Raytheon Technologies, Tewksbury, MA3Intel, Chandler, AZ 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler1 of 59

Self Introduction S.B. Mathematics, S.B. Electrical Engineering MITM.Eng. Electrical Engineering & Computer Science MITPh.D. Electrical Engineering MITUnited States Marine Corps 2006 – 2019Office of Naval Research 2014 – 2017MIT Lincoln Laboratory 2015 – 2018Naval Research Laboratory 2014 – 2020Raytheon Technologies 2018 – PresentInterests 2021 IEEEInternational Solid-State Circuits ConferenceHigh-performance RF/mixed signal microelectronicsHeterogenous integration/packagingAnalog signal processingMicrowave photonics11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler2 of 59

Outline IntroductionArchitectureCircuit DescriptionExperimental ResultsConclusion 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler3 of 59

Introduction: ApplicationIntermediate Reach IOInterconnect Reach 2021 IEEEInternational Solid-State Circuits ConferenceIntermediate range ( 1m)High-rate (100 Gbps)MonolithicSimple packagingEnergy-efficient ( pJ/bit)Throughput density (300 Gbps/mm)11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler4 of 59

Introduction: ApplicationBackplane Package-Package Interconnect Better energy efficiency thanphotonics or copper in meterclass links 2021 IEEEInternational Solid-State Circuits Conference High data rates over .1-1m Large throughput density Low-cost integration/packaging11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler5 of 59

Introduction: ApplicationBackplane-Backplane Fly-Over Cable Concept The waveguide flexibility Small cross section Efficient operation over 1m 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler6 of 59

Key Enabler: Sub-THz Dielectric WaveguidesChannel Loss, 1 Meter0S21 (dB)-5Sub-THz DielectricWaveguide Est. Loss-10Dielectric Waveguides-15-20Unclad Dielectric Waveguides-255Ey11-3001m Twinax101520400 μm25Channel Bandwidth (GHz)235 GHz275 GHz30[J. Holloway et al., IEDM, 2020]315 GHzEx11FieldStrengthEx11𝑥𝐸11Waveguide BondSurface Contour400 μm235 GHz 2021 IEEEInternational Solid-State Circuits Conference275 GHz315 GHz11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler7 of 59

Comparison[S. Fukuda et al., JSSC, 2011] 57 GHz and 80 GHz duplex operationSingle-channel schemeOff-chip couplerPlanar coupler/waveguide architectureDemonstration: Data rate: 12.5 Gbps, full-duplex (25 Gbps) Link efficiency: 5.7 pJ/bit 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler8 of 59

Comparison[M. Sawaby et al., SSC-L, 2018] 130 GHz operationSingle-channel schemeOff-chip couplerPlanar coupler/waveguide architecture 2021 IEEEInternational Solid-State Circuits ConferenceDemonstration: Data rate: 36 Gbps Link efficiency: 6 pJ/bit (transmitter only)11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler9 of 59

Comparison[M. De Wit et al., ESSCIRC, 2016] 140 GHz operationSingle-channel schemeOff-chip couplerOrthogonal coupler/waveguideschemeDemonstration: Data rate: 12 Gbps Link efficiency: 19.2 pJ/bit 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler10 of 59

Comparison with Dielectric Waveguide Links Electrical links provide high efficiency below 56 Gbps– Dielectric links must maintain competitive efficiency and show data ratescaling beyond 100 Gbps to be competitive 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler11 of 59

Comparison with Dielectric Waveguide Links Research focus on planar monolithic/in-package links Multiple sub-THz channels to maximize available guide bandwidth Higher frequency operation to improve bandwidth and reduce size 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler12 of 59

Outline IntroductionArchitectureCircuit DescriptionExperimental ResultsConclusion 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler13 of 59

Architecture ConceptFreq. Synth. & BasebandControlSub-THzSource On-chip sub-THz carrier generation 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler14 of 59

Architecture ConceptFreq. Synth. & BasebandControlSub-THzSourceBaseband Data 1(BD1)BD 2BD 3Transmit Data StreamDigital Block Baseband bit streams modulate each carrier 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler15 of 59

Architecture ConceptFreq. Synth. & BasebandControlSub-THzSource35GHzBaseband Data 1(BD1)fC1BD 2Transmit Data StreamDigital Block5GHzfC2fC3BD 3220-335 GHz Multiplexer220260300GHz A sub-THz multiplexer combines channels 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler16 of 59

Architecture ConceptFreq. Synth. & lectric WaveguideSub-THzSource35GHzBaseband Data 1(BD1)fC1BD 2Transmit Data StreamDigital Block5GHzfC2fC3BD 3220-335 GHz Multiplexer220260300GHz Power coupled to- and transported along low-loss dielectric waveguides 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler17 of 59

Architecture ConceptFreq. Synth. & BasebandControlBroadbandCouplerFreq. Synth. & BasebandControlBroadbandCouplerDielectric WaveguideSub-THzSource35GHzBaseband Data 1(BD1)fC1BD 2Transmit Data StreamDigital BlockSub-THzSource5GHzfC2fC3Receive Data StreamBD 3Digital Block220-335 GHz Multiplexer220260300GHz Independent channels separated and demodulated on receive 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler18 of 59

Link DemonstrationTX ChipFreq. Synth. & BasebandControlSub-THzMixerSub-THzSourceRX ChipSub-THzSourceBD 1BD 2BD 3 Designed and implemented in IHP 130 nm BiCMOS process– SG13G2, 𝑓𝑡 300 GHz, 𝑓𝑚𝑎𝑥 500 GHZ HBT Three-channel transmitter, single-channel receiver for testing 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler19 of 59

Transmitter Architecture[J. Holloway et al., ISSCC, 2021] Single-chip generates three sub-harmonic carriersSystem performs harmonic doubling and modulationOn-chip multiplexer channelizes/aggregates RF spectraBroadband coupler launches the sub-THz energy 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler20 of 59

Outline IntroductionArchitectureCircuit DescriptionExperimental ResultsConclusion 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler21 of 59

Link Transmitter Chip: Amp. Multiplier Chain130GHz TriplerVCC 1.6VVB2VCC 1.6Vfin 43.3GHzD120GHz I/QVB1T1PA2 Off-chip V-band source Multiplied and amplifiedto generate a 130 GHz 130GHz PAseed carrierFreq.-DoublingModulatorPA2fC1fLO2 2fC2fC3fLO3 150GHzFreq.-DoublingModulatorPA220GHz I/Q1VB4VCC 1.6VVCC 1.6VVB4VB5VB3T4T3 2021 IEEEInternational Solid-State Circuits ConferencePRBS(35x3 Gbps)SSB Mixerfin 43.3GHz130GHzTriplerD3fLO1 110GHzTo130GHzPAT2D2PA2(Tuned at110, 130 &150GHz)T6T511.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler22 of 59

Link Transmitter Chip: AMCOutput Power (dBm)Output Power (dBm)3.63.43.232.80D120GHz I/QD2D3PRBS(35x3 Gbps)fLO1 110GHz-45 dBc-20PA2SSB Mixerfin A2fC1fLO2 O3 150GHzPA2-60fC2Freq.-DoublingModulatorPA220GHz I/Q0123Input Power (dBm)45-80406080100 120 140 160 180Frequency (GHz) Nominal 0 dBm input power, 3.2 dBm output power 45 dBc spur performance Approx. 8 GHz input LO BW: 48 GHz sub-THz BW5Output Power (dBm)2.6-5 -4 -3 -2 -10 8 GHz BW-5-10-15-20384042444648Input Frequency (GHz) 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler23 of 59

Link Transmitter Chip: 5dB Coupler𝑍0 75Ω𝑅260ΩR11 260ΩP3𝑍0 65Ω 75 @ 130 GHz 92 @ 130 GHz𝑅22 320Ω 320ΩRP4-5.3S-Parameters (dB)P1P2-5.4D120GHz I/QD3PRBS(35x3 Gbps)fLO1 ModulatorSSB Mixerfin 43.3GHzfC1fLO2 5.8PA2fC2fC3fLO3 150GHzPA2-5.9110D2Freq.-DoublingModulator20GHz I/Q120130140150Frequency (GHz) A two-stage 3-way Wilkinson divider-based 5dB coupling– Provides 5.4 – 5.8 dB coupling– Less than 0.1dB asymmetry across 110-150 GHz 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler24 of 59

Link Transmitter Chip: SSB Mixers130 GHz LangeCoupler130GHz Quadrature NetworkVCC 1.6VVCC 1.6VV90LOVLOVCC 1.6VVB3VB3V0LOV180LO130 GHzMarchand 1VB1TL2VBT8VB1TL1𝑉𝐴V90LOT7VB1𝑉𝐵T2To PA2VB2V270LOT6VB1LSB𝑉𝐷VB2V180 LOT5USBT10T9V270LOVCTL4TL3T3VDT4𝑉𝐶 A quadrature SSB mixer generates 110 GHz and 150 GHz carriers Single mixer core, up/down conversion via 𝑉𝐴 𝑉𝐷 phase reordering 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler25 of 59

Link Transmitter Chip: SSB Mixers PAsLSB Mixing0-0.4 dBmOutput Power (dBm)Output Power (dBm)0USB Mixing-20-37.3 dBc-40-57.1 dBc-60-80100120140160180Frequency (GHz)200-2.3 dBm-30.6 dBc-20-39.0 dBc-40-60-80100120140160180200Frequency (GHz) Tuned PA2 amplifiers provide an additional sideband suppression and gain Simulated output power: -2.3 dBm to -0.4 dBm 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler26 of 59

Link Transmitter Chip: Doubler-ModulatorVBBroadbandStopVCC 2.5VT10D120GHz I/QD2D3PRBS(35x3 Gbps)fLO1 110GHzC2 75fFHi-Z @ fOUT75fFfLO From PAfOUTPA2130GHzTriplerPA1Data InfC1fLO2 130GHzPA25dBCoupler -Freq.-DoublingModulatorSSB Mixerfin fLO3 150GHzT7 T8PA2Lo-Z @ 2fLOT9PA2fC2Freq.-DoublingModulator20GHz I/QC1 300fF A combined doubler-modulator provides modulated power 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler27 of 59

Link Transmitter Chip: Doubler-Modulator1500-10𝑆11𝑆21-20 Zin ( )S-Parameters (dB)0P2-3035 GHz OpenTuned Across BandUsing cy (GHz)10000200250300350Frequency (GHz) Single broadband stop provides high impedance across band 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler28 of 59

Link Transmitter Chip: Doubler-ModulatorVBVCC 2.5VT10C2 75fFHi-Z @ fOUT75fFfLO From PAfOUTToTriplexer Data InT7 T8Lo-Z @ 2fLOT9C1 300fF-5Module Output Power (dBm)BroadbandStopCH1 (2fLO 220GHz)CH2 (2fLO 260GHz)CH3 (2fLO 300GHz)-10-15PLO,IN 0dBm-2001020304050MModulationodulation FrequencyFrequency (GHz)(GHz) Simulated upper sideband modulation power: -14 dBm to -9.5 dBm 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler29 of 59

Sub-THz Channelizers𝑓𝑐1 𝑓𝑐2𝑓𝑐3[J. Holloway et al., Micro. Mag., 2020] Channelizer performance impacts receiver SINR– Directly impacts link efficiency, capacity, and bit error rate (BER) Channel fractional bandwidth and filter roll-off drive higher-orderconventional filters– Lower on-chip passive quality factor at sub-THz worsens insertion loss 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler30 of 59

On-Chip Channelizers: Channel FiltersP2M1M2M3M4M5M6P1 Quarter-wave microstrip tuned to maximize individual resonator 𝑄𝑢 Mixed electric & magnetic coupling used to realize filter response 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler31 of 59

On-Chip ChannelizersP2P3P1P4050100µm Excellent agreement betweensimulation and measurements 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler32 of 59

Integrated Sub-THz Coupler315 GHzGuided ModeWaveguide Hybrid Mode Profile235 GHzDielectricWaveguideBEOL Coupler Structure𝑉𝑖𝑛[J. Holloway et al., T-MTT, 2017] 𝜆/2E-Field Tapered, enclosed structure, differentially driven Guide mode matched to slot-line leaky mode 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler33 of 59

Integrated Sub-THz Coupler Wideband single-ended to differential transition Direct waveguide bonding 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler34 of 59

Link Receiver ChipSub-THzMixerSub-THzSourceRX Chip Single-channel receiver chip 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler35 of 59

Link Receiver ChipVCC 3.3VVCC 2.5V220, 260or 300GHzLOINMarchandBalun250ΩVCC 2.5VVCC 2.5V250ΩT18T19T11 T12T27T24T26Sub-THzSourceT13 T141.5mAT20T15T16T25Sub-THzMixer DataOutT17T23T21T22RX ChipVB Single-channel receiver chip Gilbert switching quad provides down-conversion– Tail transistors provide wideband differential current and match to coupler– Emitter followers provide voltage translation 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler36 of 59

Link Receiver ChipVCC 3.3VVCC 2.5V220, 260or 300GHzLOINMarchandBalun250ΩVCC 2.5VVCC 2.5V250ΩT18T19T11 T12T27T24T26Sub-THzSourceT13 T141.5mAT20T15T16T25Sub-THzMixer DataOutT17T23T21T22RX ChipVB Single-channel receiver chip Gilbert switching quad provides down-conversion– Tail transistors provide wideband differential current and match to coupler– Emitter followers provide voltage translation 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler37 of 59

Link Receiver ChipVCC 3.3VVCC 2.5V220, 260or 300GHzLOINMarchandBalun250ΩVCC 2.5VVCC 2.5V250ΩT18T19T11 T12T27T24T26Sub-THzSourceT13 T141.5mAT20T15T16T25Sub-THzMixer DataOutT17T23T21T22RX ChipVB Single-channel receiver chip Gilbert switching quad provides down-conversion– Tail transistors provide wideband differential current and match to coupler– Emitter followers provide voltage translation Wideband baseband amplifier pair drives off-chip measurements 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler38 of 59

Link Receiver Chip-5-1000-2-23dB BW-4-6-8-6220 GHz LO2302402502603dB BW-4-8-10220-15Gc SSB (dB)Gc SSB (dB)Gc SSB (dB)0260 GHz LO-10260270280290300RF Frequency (GHz)RF Frequency (GHz)0240260280300320340RF Frequency (GHz) Simulation with full-wave interconnect demonstratesmore than 30 GHz of receiver bandwidth in all channels Simulated DC power consumption:– 20 mW (mixer) 45 mW (baseband amplifiers) 2021 IEEEInternational Solid-State Circuits Conference-2Gc SSB (dB)-20220270-43dB BW-6-8300 GHz LO-10300310320330340RF Frequency (GHz)11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler39 of 59

Outline IntroductionArchitectureCircuit DescriptionExperimental ResultsConclusion 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler40 of 59

2.4 mmLink Transmitter Chip3-ChannelTransmitterChip3.9 mm Measured 3.9 x 2.4 mm Consumes 256 mW 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler41 of 59

Link Receiver Chip0.9 mmSub-THzMixerSingle-Channel ReceiverChipSub-THzSourceRX Chip0.9 mm The final circuit measures 0.9 mm x 0.9 mm and consume 73 mW 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler42 of 59

Power MeasurementLow for CH3D3Low for CH2Signal Source(HP 83650A)Low for CH1D2D1DielectricFiber( 27cm)TX Chipfin 43.3 50GHzI/Q GenerationNetwork20GHz I/QWR-3.4 toWR-10 TaperWR-3.4 HornErikson PM5Power MeterSensor HeadμWSignal S ource(Agilent E8257D) Waveguide power meter used to measure TX power in each channel 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler43 of 59

Received Power (dBm)Power Measurement-15CH 1CH 2CH 3-20-25-30-35-40220240260280300320Frequency (GHz) Waveguide power meter used to measure TX power in each channel 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler44 of 59

Received Power (dBm)Power Measurement-15-20MeasuredModeled 5 dB-25-30-35-40220240260280300320Frequency (GHz) Waveguide power meter used to measure TX power in each channel Measured power agrees with the simulation– Waveguide – horn mode conversion not modeled 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler45 of 59

Link Testing: Setup Waveguide bonded to the chipsurfaces Two wideband PRBS generatorsused to excite two adjacentchannels at a time 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler46 of 59

Link Testing: Data Transmission Single-channel basebandmeasurements confirm PRBSspectrum Adjacent channelunmodulated carrier present– Attenuated by RX mixer andbaseband amplifiers 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler47 of 59

Link Testing: Data TransmissionCH1 (35Gbps)35GHzfC1CH2 0300GHz26022035G PRBS Eye diagram measurements usinguncorrelated adjacent channel PRBSdata 35Gbps verified across all threechannelsGHz30035G PRBS35G PRBS(measurement)35G PRBS(measurement) 2021 IEEEInternational Solid-State Circuits ConferencefC3CH3 (35Gbps)35GHzfC15GHzfC2fC314.5mV11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler220260300GHz35G PRBS35G PRBS(measurement)48 of 59

Link Testing: Data Transmission– 5 10 8 for 35Gbps, 30cm– 10 8 for 35Gbps, 5cm Eye closure from SNR, notfrom dispersion, ISI, or jitterBit Error Rate BER for two link lengths BER:01010-235G, 30 cmCH 110-4CH 2CH 310-635G, 5 cmCH 1CH 2CH 3AdditionalChannelLoss10-8-101000.20.40.60.81Unit Interval 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler49 of 59

Adjacent Channel Interference[J. Holloway et al., Micro. Mag., 2020]Adjacent Channel InterferenceBit Error Rate10-135G, 5cmCH 1 OnlyCH 1 CH210-310-510-7AdjacentChannelInterference-910 Single 5cm link, 35Gbps0 Single-channel and two-channel operation-11100.20.40.60.81Unit Interval– 10x worse BER from adjacent channel interference– Remaining VSB power degrades SINR 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler50 of 59

Outline IntroductionArchitectureCircuit DescriptionExperimental ResultsConclusion 2021 IEEEInternational Solid-State Circuits Conference11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler51 of 59

Link ComparisonTech.JSSC2011 [1]SSC-L2018 [2]ESSCIRC2016 [3]JSSC2019 [4]†40nmCMOS55nmSiGe40nmCMOS28nmCMOS130nmThis WorkBiCMOSCarrierFreq.(GHz)Data Rate(Gbps)BER57, 8012.5 12.5† 10-1213036 10-8@ 25G12017.7 10-1214012 10-12220, 260,& 30035 3‡30 3‡5 10-8 10-12Full-duplex transmission (12.5Gbps each direction)‡The link is demonstrated with a three-channel TX and one-channel RXDemoWaveguide Fiber Size LinkCoupler (W H, mm) Length(cm)Quasi Yagi8 1.1120(Off-Chip)Vivaldi1.3 1.3100(Off-Chip)Tapered Slot2100(Off-Chip) (Circular)CPW-WG1.9 1.0100(Off-Chip)Leaky SIW0.4 0.2530(Integrated)††‡‡TX DCPower 63pJ/bit65mW5.4pJ/bit256mW††2.4pJ/bitRX DCDensityPower &FOMEfficiency (Gbps/mm)87mW3.5pJ/bit8.4No J/bit8.98.7332.0Input signal sources (16.25GHz in [2], 43.3, & 20GHz in this work) not includedRX LO source (220 300 GHz) not included Demonstration exceeds the aggregate data rate of the state of the art byapproximately 3x at commensurate BER[1] S. Fukuda, et. al., “A 12.5 12.5 Gb/s Full-Duplex Plastic Waveguide Interconnect,” JSSC, 2011.[2] M. Sawaby, et. al., “A Fully Packaged 130-GHz QPSK Transmitter With an Integrated PRBS Generator,” SSC-L, 2018. 2021 IEEEInternational Solid-State Circuits Conference[3] N. van Thienen, et. al., “An 18Gbps Polymer Microwave Fiber (PMF) Communication Link in 40nm CMOS,” ESSCIRC, 2016.[4] M. de Wit, et. al., “Analysis and Design of a Foam-Cladded PMF Link with Phase Tuning in 28-nm CMOS,” JSSC, 2019.11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler52 of 59

Link ComparisonTech.JSSC2011 [1]SSC-L2018 [2]ESSCIRC2016 [3]JSSC2019 [4]†40nmCMOS55nmSiGe40nmCMOS28nmCMOS130nmThis WorkBiCMOSCarrierFreq.(GHz)Data Rate(Gbps)BER57, 8012.5 12.5† 10-1213036 10-8@ 25G12017.7 10-1214012 10-12220, 260,& 30035 3‡30 3‡5 10-8 10-12Full-duplex transmission (12.5Gbps each direction)‡The link is demonstrated with a three-channel TX and one-channel RXDemoWaveguide Fiber Size LinkCoupler (W H, mm) Length(cm)Quasi Yagi8 1.1120(Off-Chip)Vivaldi1.3 1.3100(Off-Chip)Tapered Slot2100(Off-Chip) (Circular)CPW-WG1.9 1.0100(Off-Chip)Leaky SIW0.4 0.2530(Integrated)††‡‡TX DCPower 63pJ/bit65mW5.4pJ/bit256mW††2.4pJ/bitRX DCDensityPower &FOMEfficiency (Gbps/mm)87mW3.5pJ/bit8.4No J/bit8.98.7332.0Input signal sources (16.25GHz in [2], 43.3, & 20GHz in this work) not includedRX LO source (220 300 GHz) not included Only published link incorporating a monolithically-integrated coupler[1] S. Fukuda, et. al., “A 12.5 12.5 Gb/s Full-Duplex Plastic Waveguide Interconnect,” JSSC, 2011.[2] M. Sawaby, et. al., “A Fully Packaged 130-GHz QPSK Transmitter With an Integrated PRBS Generator,” SSC-L, 2018. 2021 IEEEInternational Solid-State Circuits Conference[3] N. van Thienen, et. al., “An 18Gbps Polymer Microwave Fiber (PMF) Communication Link in 40nm CMOS,” ESSCIRC, 2016.[4] M. de Wit, et. al., “Analysis and Design of a Foam-Cladded PMF Link with Phase Tuning in 28-nm CMOS,” JSSC, 2019.11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler53 of 59

Link ComparisonTech.JSSC2011 [1]SSC-L2018 [2]ESSCIRC2016 [3]JSSC2019 [4]†40nmCMOS55nmSiGe40nmCMOS28nmCMOS130nmThis WorkBiCMOSCarrierFreq.(GHz)Data Rate(Gbps)BER57, 8012.5 12.5† 10-1213036 10-8@ 25G12017.7 10-1214012 10-12220, 260,& 30035 3‡30 3‡5 10-8 10-12Full-duplex transmission (12.5Gbps each direction)‡The link is demonstrated with a three-channel TX and one-channel RXDemoWaveguide Fiber Size LinkCoupler (W H, mm) Length(cm)Quasi Yagi8 1.1120(Off-Chip)Vivaldi1.3 1.3100(Off-Chip)Tapered Slot2100(Off-Chip) (Circular)CPW-WG1.9 1.0100(Off-Chip)Leaky SIW0.4 0.2530(Integrated)††‡‡TX DCPower 63pJ/bit65mW5.4pJ/bit256mW††2.4pJ/bitRX DCDensityPower &FOMEfficiency (Gbps/mm)87mW3.5pJ/bit8.4No J/bit8.98.7332.0Input signal sources (16.25GHz in [2], 43.3, & 20GHz in this work) not includedRX LO source (220 300 GHz) not included Smallest published waveguide cross section[1] S. Fukuda, et. al., “A 12.5 12.5 Gb/s Full-Duplex Plastic Waveguide Interconnect,” JSSC, 2011.[2] M. Sawaby, et. al., “A Fully Packaged 130-GHz QPSK Transmitter With an Integrated PRBS Generator,” SSC-L, 2018. 2021 IEEEInternational Solid-State Circuits Conference[3] N. van Thienen, et. al., “An 18Gbps Polymer Microwave Fiber (PMF) Communication Link in 40nm CMOS,” ESSCIRC, 2016.[4] M. de Wit, et. al., “Analysis and Design of a Foam-Cladded PMF Link with Phase Tuning in 28-nm CMOS,” JSSC, 2019.11.9: A 105 Gb/s Dielectric-Waveguide Link in 130nm BiCMOS Using Channelized 220-to-335GHz Signal and Integrated Waveguide Coupler54 of 59

Link ComparisonTech.JSSC2011 [1]SSC-L2018 [2]ESSCIRC2016 [3]JSSC2019 [4]†40nmCMOS55nmSiGe40nmCMOS28nmCMOS130nmThis WorkBiCMOSCarrierFreq.(GHz)Data Rate(Gbps)BER57, 8012.5 12.5† 10-1213036 10-8@ 25G12017.7 10-1214012 10-12220, 260,& 30035 3‡30 3‡5 10-8 10-12Full-duplex transmission (12.5Gbps each direction)‡The link is demonstrated with a three-channel TX and one-channel RXDemoWaveguide Fiber Size LinkCoupler (W H, mm) Length(cm)Quasi Yagi8 1.1120(Off-Chip)Vivaldi1.3 1.3100(Off-Chip)Tapered Slot2100(Off-Chip) (Circular)CPW-WG1.9 1.0100(Off-Chip)Leaky SIW0.4 0.2530(Integrated)††‡‡TX DCPower 63pJ/bit65mW5.4pJ/bit256mW††2.4pJ/bitRX DCDensityPower &FOMEfficiency (Gbps/mm)87mW3.5pJ/bit8.4No J/bit8.98.7332.0Input signal sources (16.25GHz in [2], 43.3, & 20GHz in this work) not includedRX LO source (220 300 GHz) not included Total link efficiency similar to lower-frequency implementation[1] S. Fukuda, et. al., “A 12.5 12.5 Gb/s Full-Duplex Plastic Waveguide Interconnect,” JSSC, 2011.[2] M. Sawaby, et. al., “A Fully Packaged 130-GHz QPSK Transmitter With an Integrated PRBS Generator,” SSC-L, 2018. 2021 IEEEInternational Solid-State Circuits Conference[3] N. van Thienen, et. al., “An 18Gbps Polymer Microwave Fiber (PMF) Communication Link in 40nm CMOS,” ESSCIRC, 2016.[4] M. de Wit, et. al., “Analysis a

S.B. Mathematics, S.B. Electrical Engineering MIT M.Eng. Electrical Engineering & Computer Science MIT Ph.D. Electrical Engineering MIT United States Marine Corps 2006 –2019 Office of Naval Research 2014 –2017 MIT Lincoln Laboratory 2015 –2018 Naval Research Laboratory 2014 –2020 Raytheon Technologies 2018 –Present

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