PIC SERIES MICROCOMPUTER DATA MANUAL
GENERALINSfRUMENfPIC SERIESMICROCOMPUTERDATA MANUALMicroelectronics DivisionGeneral Instrument Corporation
GENERALINSfRUMENTPIC SERIESMICROCOMPUTERDATA MANUALARCHITECTUREINSTRUCTION SETPRODUCTION CYCLEROUTINESAPPLICATIONSITABLE OF CONTENTS-PAGE 2IAPRIL 1983(OCopyright 1983 GENERAL INSTRUMENT CORPORATIONThe information in this publication, including schematics, issuggestive only. General Instrument Corporation does not warrant,nor will it be responsible or liable for,(a) the accuracy of suchinformation, (b) its use or (c) any infringement of patents or otherrights of third parties.
Table ofContents1. INTRODUCTION1.11.21.31.4Description .Features.Support .Microcomputer Fundamentals .1.4.1 Basic Microcomputer Architecture. . . . . . . . . . . . . . . . . . . . . .1.4.2 CPU Functional Description. . . . . . . . . . . . . . . . . . . . . . . . . . . .1.4.3 The Program .1.5 Development Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5.1 Software Development. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5.2 Hardware Development . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5.3 In-Circuit Emulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5.4 Field Demonstration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5566781113141919192. ARCHITECTURE2.1 PIC Basic Functional Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.1.1 Instruction Decode and Control Unit. . . . . . . . . . . . . . . . . .2.1.2 Program Counter (F2) . . . . .2.1.3 Stack.2.1.4 File Select Register (F4) .2.1.5 Arithmetic Logic Unit (ALU). . . . . . . . . . . . . . . . . . . . . . . . . .2.1.6 Working Register (W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.1.7 Status Word Register (F3) . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.1.8 Real-Time Clock Counter Register.2.1.9 I/O Register .2.1.10 Program Memory (ROM) .2.1.11 Data Memory (RAM) .2.1.12 Clock Generator .2.2 PIC1650A . . .2.3 PIC1654 .2.4 PIC1655A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5 PIC16C58.2.6 PIC1656 .2.6.1 Interrupt Logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.6.2 Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.6.3 Stack. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.6.4 RTCC Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.6.5 I/O Registers (F5-F7) .2.6.6 Clock Generator .2.7 PIC1670 .2.7.1 Interrupt System .2.7.2 External Interrupt .2.7.3 Real-Time Clock Interrupt. . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.7.4 Input/Output Capability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.8 Pin Assignments 939393941433. INSTRUCTION SET3.1 General I nstruction Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2 General File Register Operations. . . . . . . . . . . . . . . . . . . . . . . . . . . .3.2.1 Data Transfer Operations .3.2.2 Arithmetic Operations .3.2.3 Logical Operations . -. . . . . . . . . . . . . . . . . . . . . . .3.2.4 Rotate Operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2464950515557
3.3 Bit Level File Register Operations . . . . . 593.3.1 Bit Manipulations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 593.3.2 Conditional Skips on Bit Test. . . . . . . . . . . . . . . . . . . . . . . . . . 603.4 Literal and Control Operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 613.4.1 Literal Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 613.4.2 Control Operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 633.5 Special Instruction Mnemonics . 653.5.1 Move File To W Register. 653.5.2 Test File. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 653.5.3 Two's Complement Register Contents. 663.5.4 Unconditional Branch . 663.5.5 Status Bit Manipulations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 663.5.6 Conditional Skips on Status Bit Test. . . . . . . . . . . . . . . . . . . 683.5.7 Conditional Branches on Status Bit Test. . . . . . . . . . . . . . . . 693.5.8 Carry and Digit Carry Arithmetic . 713.6 PIC1670 Series Instruction Set. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 743.6.1 Additionall Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 753.7 I/O Programming Caution. 793.8 Sample Program . 814. PRODUCTION CYCLE4.1 Hardware Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.1.1 ROMless Development PIC . '.' . . . . . . . . . . . . . . . . . . . .4.1.2 PICES II-PIC In-Circuit Emulation System. . . . . . . . . . . . . .4.1.3 PFD-PIC Field Demo System. . . . . . . . . . . . . . . . . . . . . . . . . .4.2 Software Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.2.1 PICAL-PIC Macroassembler . . . . . . . . . . . . . . . . . . . . . . . . . . .9191929495955. MATH ROUTINES5.1a5.1 b5.25.35.45.55.65.7a5.7b5.85.95.105.11Unsigned BCD Addition .Unsigned BCD Addition of 2 Digits .Unsigned BCD Subtraction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Signed BCD Addition .Signed BCD Subtraction .Two Digit BCD Multiply .Four Digit BCD Divide .Binary To BCD Conversion Method I .Binary To BCD Conversion (2 digits) Method" .BCD To Binary Conversion .Double Precision Signed Integer Math Package .Floating-Point Double Precision Math Package .Square Root Algorithm Using Newton's Method .96981001021061091121201231251281341436. MISCELLANEOUS ROUTINES6.1 Keyboard Scan Program Reads And Debounces 16 Keys AndStores Key Closures in Two Files .6.2 Eight Digit Seven-Segment Display Refreshing Program .6.3 Pseudo Random Number Generator .6.3.1 7 Bit Pseudo Random Number Generator .6.3.2 16 Bit Pseudo Random Number Generator .6.4 Potentiometer AID Conversion Routine .6.5 Analog To Digital Conversion .6.5.1 How The Program Works . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.5.2 Conclusion .3146146152152153154154155158
6.6 Time Delay Routine .6.7 A Digital Clock Subroutine Using the PIC Microcomputer .6.7.1 Theory .6.7.2 Time Counting .6.7.3 Use in Program .6.7.4 Use of TIMADD as Time Set .1581591591601611617. APPLICATION NOTES7.17.27.37.47.57.6Serial Data Transmission with a PIC Microcomputer .PIC Microcomputer as a Keyboard Encoder .Sound Generation Using a PIC Microcomputer .Frequency Locked Loop Tuning with a PIC Microcomputer .PIC Microcomputers in Subscriber End Equipment .PIC Microcomputer-Based Control Smoothes UniversalMotor Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7.7 Interfacing a PIC Microcomputer with the ER1400 EAROM .7.8 Interfacing the PIC Microcomputer with the ER2055 EAROM .4162166175188194202211220
1 INTRODUCTION1.1Dt scription1.2FeaturesThe General Instrument PIC Family is a series of MOS/LSI8-bit microcomputers manufactured to meet the requirements of the costcompetitive controller market. The PIC microcomputer containsRAM, I/O and a central processing unit, as well as customer-definedROM on a Single chip. The 8-bit input/output registers provide latchedlines for interfacing to a limitless variety of applications including:o Industrial timingo RadiolTV Tuningo Consumer applianceso Motor controlo Display controlo Repertory dialerso Vending machineso Security deviceso Automotive dashboardThe architecture of each device in the PIC Family is based on a registerfile concept with a concise yet powerful instruction set designed toperform bit, byte and register transfer operations. The architecturalfeatures of the PIC family are outlined C1670PIC1672ROM512 x512 x512 x512 x512 x1024 x2048 ACKAGE40182828284040PINPINPINPINPINPINPINThe PIC microcomputer was designed to be an efficient control processor as well as an arithmetic processor. It has an instruction set whichallows the user to directly set, reset and to test and skip on the status ofany RAM bit, including 1/0 lines. The "wide" instruction word (12 or 13bits) gives the PIC Family capabilities which are not found in other8-bitmicrocomputers:o All Instructions Single Wordo All Registers Directly Addressableo Registers Indirectly Addressableo Set, Clear any Bit in any Registero Test and Skip on Bit Statuso 2 Destinations for ALU Operationso More Than 20 1/0 Instructions5
These added capabilities allow the user to produce compact and efficient code. In other words, many functions requiring a 1024 x8 bit ROMmay very well be programmed into a 512 x 12 bit ROM resident in thePIC1650 and at a lower cost.1.3SupportHardware and software development support is provided by a widerange of products available from General Instrument. These supportproducts include the ROMless development microcomputer, the PICIn-Circuit Emulation System (PICES II), the PIC Field Demo System(PFD), and the PIC Cross-Assembler (PICAL). The PIC1664 DEVELOPMENT MICROCOMPUTER is designed as auseful tool for engineering prototyping and f.ield trial demonstration.The contents of the program counter (ROM address) and the instruction word lines (ROM data) are brought out to pins for connection toexternal RAM or EPROM. The addition of a HALT pin enables singlestepping of the development program. The PIC IN-CIRCUIT EMULATION SYSTEM allows the userto loadhis PIC program into RAM and test it in the actual environment of hishardware application. A powerful interactive debugging program (PICBUG) is provided for easy troubleshooting and program corrections.The PICES system is provided complete with its own enclosure andpower supply for stand-alone or peripheral applications. The PICAL CROSS-ASSEMBLER PROGRAM converts symbolicsource programs into object code for the PIC family of microcomputers.PICAL, coded in FORTRAN TIl or BASIC, is intended for use on minicomputer, larger main-frame computers, and time-sharing systems.1.4MicrocomputerFundamentalsA microcomputer provides, on a single-chip, all of the functionalelements of a minicomputer or a large main-frame computer. Basically, these functional elements include a central processing unit(CPU), program memory (ROM), data memory (RAM), and an input!output interface (I/O). It also provides the means for implementingmany combinations of arithmetic and logical operations. By selecting the proper combinations of operations relevant to a particularapplication, a microcomputer can be used to perform logical processing, basic code conversions, formatting, and to generate fundamental timing and control Signals for I/O devices.A microcomputer is best suited for applications in which the cost ofdeveloping and manufacturing customized controller hardwarewould exceed the cost and/or space requirements of a generalpurpose microcomputer with a specially-designed control program.6
1.4.1 BASIC MICROCOMPUTER ARCHITECTUREFigure 1 is a, functional block diagram of a typical microcomputer,including the CPU, ROM, RAM, and liD . Central Processing Unit. The CPU performs the processing andcontrol functions of the microcomputer. The CPU fetches instructionwords from memory, decodes them, and generates the appropriatesignals that cause the instruction to be executed. The CPU implementsits various arithmetic and logical operations on operands obtainedfrom memory. It also tests the results of arithmetic and logical operations, and as a result of these tests, chooses between alternatebranches in the program . Program Memory. The instructions for the CPU to execute arestored in a Read-Only Memory (ROM). The ROM provides permanent non-volatile storage of the program. Power interruptions orequipment shutdown will not alter the contents of the ROM.Program memory size is defined by the number of addressablelocations available for program storage and by the size of the word(number of bits) stored in each location.1 TYPICAL MICROCOMPUTER BLOCK DIAGRAM - - - - - INSTRUCTION WORDvPROGRAM ADDRESS ( S EQ U E N CE C O N T RO L ) , ,Vt IN T E RN A L D AT A B U S----1\CENTRALPROCESSINGUNIT(CPU) PROGRAMMEMORY(ROM)110vttINTERFACE\f / DATAMEMORY(RAM)11 t1 - - -1ADDRESS BUSREAD/WRITE7CONTROL SIGNALEXTERNALCONNECTIONS i
For example, the notation 512 x 12 specifies that there are 512addressable locations for program words and each word has 12 bits.Each instruction word is selected from the program memory (ROM)by a combination of 1's and D's on the address bus. Each uniquecombination of 1's and D's addresses a unique location in programmemory; the number of locations that can be addressed is thereforedetermined by the number of combinations of 1's and D's available.This, of course, is a function of the number of address lines (i.e., thenumber of bits in the program counter) . Data Memory. The data memory provides temporary storage fordata processed by the CPU. Data memory is usually a RandomAccess Memory (RAM). Any data stored can be obtained from thesame location (address) in which it was stored. RAM is volatile, whichmeans that after equipment shutdown or a power interruption, validdata is no longer present. Since the information stored is usually of atemporary nature anyway, volatility is not a serious consideration.The size of data memory (RAM) is defined using the same notationdescribed in the program memory (ROM) discussion.The same address is used with RAM to both read data from and writedata to a particular memory location. A readlwrite signal determinesthe direction of data transfer . 1/0 Interface. The liD interface permits the microcomputer tocommunicate with external devices. A typical interface consists ofone or more liD registers communicating with an external 110 bus orindividual liD lines. The CPU can address these liD registers andeither input data from an external device or output the result of itsprocessing to an external device. In order for information to betransferred between the liD ports and the external devices atappropriate times, the program logic must be written so as toanticipate significant external events.For example, to determine if data is present, one or more bits of aninput port can be tested periodically. When data from a particularinput device is made available, the corresponding "flag" bit can be setby the external device. This "flag" bit could then be reset via an outputport once the input data has been stored.In some microcomputers, "interrupt" logic is incorporated in theCPU to direct the control function when an external device signals forservice by activating an external interrupt line.1.4.2 CPU FUNCTIONAL DESCRIPTIONFigure 2 is a functional block diagram of a typical CPU. The typicalCPU consists of an instruction decode and control unit, an arithmeticlogic unit (ALU), and several special purpose registers. Theseregisters usually include at least an accumulator, a status register, aprogram counter, and a stack or stack pointer . Instruction Decode and Control Unit.The instruction decode andcontrol unit fetches an instruction word from the program memory,decodes it, and generates the appropriate signals that cause thedesired operations to take place. The instruction decode and controlunit also controls the program counter.8
Program Counter. The program counter is a register that holds theaddress of the next instruction to be fetched out of program memory.Since a program is usually executed in the order in which it is written,the program counter is automatically incremented by one after theexecution of every instruction, except for the following operations:-A conditional jump instruction whose criteria have been met-An unconditional jump instruction-A jump to subroutine (call) instruction-A return from subroutine instruction-An interruptStack. The stack is a group of registers used for temporary storageof program addresses required for returns from subroutines. Asubroutine is a frequently used group of instructions that, forconvenience and for program economy, is written once and islocated in a separate part of program memory. Whenever this groupof instructions is to be executed, the subroutine is called. This isaccomplished by storing the contents of the program counterplus one (PC 1) in the top element of the stack and placing thestarting address of the subroutine into the program counter. Whenthe subroutine has been executed, the program must return to thenext instruction following that which called the subroutine. This isaccomplished by transferring the contents of the top element of thestack (PC 1) back into the program counter. 2INSTRUCTION WORD.,,IISEQUENCECONTROL .'"STACK PROGRAMADDRESS .PROGRAMCOUNTERINSTRUCTIONREADIWRITE TO REGISTERSDECODECONTROL . AND DATAAND. ORYADDRESS'BUSLACCUMULATOR".AI.I".AIALU STATUSREGISTERCPU9.DATA BUS"I:- 'll .I"1/0REGISTERSEXTERNALCONNECTIONS.AI".v
It is not uncommon for one subroutine to call a second subroutine,and perhaps the second subroutine to call a third subroutine, and soforth, in a process called nesting. To provide for the proper executionof nested subroutines and the subsequent return to the mainprogram, the last subroutine, after it has executed, must return to thepreceding subroutine from which it had been called. After thepreceding subroutine has finished executing, it in turn must return tothe subroutine from which it had been called. This sequencecontinues until the first subroutine has executed fully and theprogram co
products include the ROMless development microcomputer, the PIC In-Circuit Emulation System (PICES II), the PIC Field Demo System (PFD), and the PIC Cross-Assembler (PICAL). The PIC1664 DEVELOPMENT MICROCOMPUTER is designed as a useful tool for engineering prototyping and f.ield trial demonstration.
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Chapter 7 - The Microchip PIC 129 7.0 The PICMicro Microcontroller 129 7.0.1 Programming the PIC 130 PIC Programmers 131 Development Boards 131 7.0.2 Prototyping the PIC Circuit 132 7.1 PIC Architecture 134 7.1.1 Baseline PIC Family 134 PIC10 Devices 135 PIC12 Devices 135 PIC14 Devices 138 7.1.2 Mi
System Bus Fig. 1-1-2 Three basic units of microcomputer system A bus is a collection of wires used to transmit signals in parallel. According to the purpose, the buses of a microcomputer can be divided into three types: address bus, data bus, and control bus. Three buses are shown are shown in Fig. 1-1-3. Fig. 1-1-3 System bus of microcomputer .
Microcomputer architecture and Basic Blocks of a Microcomputer Basic Blocks of a Microcomputer A microcomputer has three basic blocks: a central processing unit (CPU), a memory unit, and an input/output (I/O) unit. The CPU(microprocessor) executes all the instructions and performs arithmetic and logic operations on data.
PIC K150 Manual 1-10 The USB PIC K150 microcontroller programmer Hardware version V2.0 File version V2.0 Product Image. Product Description K150 is the latest of a low-cost high-performance PIC programmer, support most popular PIC chip bur
a PIC microcontroller by serial communication. Serial communication between the PC and the PIC microcontroller is enabled by using a DB-9 serial connection between the PC and a PIC development programmer that hosts the PIC microcontroller. Two widely used PIC development programmers are Microchip’s PICS
Master Series Compact Microcomputer Service Manual BBC Master Series Compact Microcomputer Service Manual Contents - Section 1 1 - Introduction 2 - Packaging and installation 3 - Disassembly and assembly 4 - Selection links and Test Points 5 - Hardware description 5.1 Introduction 5.2 Core machine 5.3 Internal I/O 5.4 External I/O 6 - Fault .
Grade 2 ELA Curricular Frameworks with ELL Scaffolds . Grade 2 Unit 2 Reading Literature and Reading Informational Unit 2: RL.2.1, RI.2.1, and WIDA Standards . Reading Literature and WIDA Standards Reading Informational Text and WIDA Standards Critical Knowledge and Skills WIDA Criterion RL.2.1. Ask and answer such questions as who, what, where, when, why, and how to demonstrate .
