Gate Driver Providing Galvanic Isolation Series Isolation . - LCSC
Datasheet Gate Driver Providing Galvanic isolation Series Isolation voltage 2500Vrms 1ch Gate Driver Providing Galvanic Isolation BM6104FV-C Key Specifications General Description The BM6104FV-C is a gate driver with isolation voltage 2500Vrms, I/O delay time of 150ns, and minimum input pulse width of 90ns, and incorporates the fault signal output functions, undervoltage lockout (UVLO) function, and short current protection (SCP, DESAT) function. Isolation Voltage: Maximum Gate Drive Voltage: I/O Delay Time: Minimum Input Pulse Width: Package Features W(Typ) x D(Typ) x H(Max) 6.50mm x 8.10mm x 2.01mm SSOP-B20W Providing Galvanic Isolation Active Miller Clamping Fault Signal Output Function (Adjustable Output Holding Time) Undervoltage Lockout Function Short Current Protection Function (Adjustable Reset Time) Soft Turn-Off Function For Short Current Protection (Adjustable Turn-Off Time) Supporting Negative VEE2 Output State Feedback Function UL1577 Recognized:File No. E356010 AEC-Q100 Qualified(Note 1) (Note 1:Grade1) 2500Vrms 24V 150ns(Max) 90ns(Max) Applications IGBT Gate Driver MOSFET Gate Driver Typical Application Circuits GND1 Latch OSFB INB FLTRLS S Q R ENA PROOUT INA - FB VEE2 OUT1L - Timer FLT OUT1H VCC1 VCC2 UVLO Regulator UVLO FLT LOGIC INA VREG OUT2 ENA LOGIC TEST S Q R GND2 VEE2 - GND1 SCPIN 1pin Figure 1. For using 4-pin IGBT (for using SCP function) GND1 INA Latch OSFB INB FLTRLS ENA - VEE2 FB OUT1L - Timer FLT PROOUT S Q R OUT1H VCC1 VCC2 UVLO UVLO FLT Regulator LOGIC INA OUT2 ENA TEST GND1 VREG LOGIC S Q R GND2 - Figure 2. For using 3-pin IGBT (for using DESAT function) VEE2 SCPIN 1pin Product structure：Silicon integrated circuit This product is not designed protection against radioactive rays www.rohm.com TSZ02201-0717ABH00030-1-2 2012 ROHM Co., Ltd. All rights reserved. 1/35 25.Dec.2015 Rev.004 TSZ22111・14・001
BM6104FV-C Recommended Range Of External Constants Pin Name Recommended Value Symbol Typ CFLTRLS - 0.01 0.47 µF RFLTRLS 50 200 1000 kΩ VREG CVREG 1.0 3.3 10.0 µF VCC1 CVCC1 0.1 1.0 - µF VCC2 CVCC2 0.33 - - µF FLTRLS Max Unit Min Pin Configurations (TOP VIEW) SCPIN 1 VEE2 2 GND2 3 OUT2 4 VREG 5 VCC2 6 OUT1H 7 OUT1L 8 820 19 8 18 8 17 8 16 8 15 8 14 8 13 8 12 8 11 8 VEE2 9 PROOUT 10 GND1 TEST ENA INA FLT VCC1 FLTRLS INB OSFB GND1 Pin Descriptions Pin No. Pin Name 1 SCPIN Short current detection pin Function 2 VEE2 Output-side negative power supply pin 3 GND2 Output-side ground pin 4 OUT2 MOSFET control pin for Miller Clamp 5 VREG Power supply pin for driving MOSFET for Miller Clamp 6 VCC2 Output-side positive power supply pin 7 OUT1H Source side output pin 8 OUT1L Sink side output pin 9 VEE2 10 PROOUT 11 GND1 Input-side ground pin 12 OSFB Output state feedback output pin Output-side negative power supply pin Soft turn-off pin 13 INB 14 FLTRLS Control input pin B 15 VCC1 16 FLT Fault output pin 17 INA Control input pin A 18 ENA Input enabling signal input pin 19 TEST Mode setting pin 20 GND1 Input-side ground pin Fault output holding time setting pin Input-side power supply pin www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 2/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C Description of pins and cautions on layout of board 1) VCC1 (Input-side power supply pin) The VCC1 pin is a power supply pin on the input side. To suppress voltage fluctuations due to the current to drive internal transformers, connect a bypass capacitor between the VCC1 and the GND1 pins. 2) GND1 (Input-side ground pin) The GND1 pin is a ground pin on the input side. 3) VCC2 (Output-side positive power supply pin) The VCC2 pin is a positive power supply pin on the output side. To reduce voltage fluctuations due to OUT1H/L pin output current and due to the current to drive internal transformers, connect a bypass capacitor between the VCC2 and the GND2 pins. 4) VEE2 (Output-side negative power supply pin) The VEE2 pin is a power supply pin on the output side. To suppress voltage fluctuations due to OUT1H/L pin output current and due to the current to drive internal transformers, connect a bypass capacitor between the VEE2 and the GND2 pins. To use no negative power supply, connect the VEE2 pin to the GND2 pin. 5) GND2 (Output-side ground pin) The GND2 pin is a ground pin on the output side. Connect the GND2 pin to the emitter / source of a power device. 6) IN (Control input terminal) The IN is a pin used to determine output logic. ENA INB H X L H L H L L L L INA X L H L H OUT1H Hi-Z Hi-Z Hi-Z Hi-Z H OUT1L L L L L Hi-Z 7) FLT (Fault output pin) The FLT pin is an open drain pin used to output a fault signal when a fault occurs (i.e., when the undervoltage lockout function (UVLO) or short current protection function (SCP) is activated). Pin FLT While in normal operation Hi-Z When an Fault occurs L (When UVLO or SCP is activated) 8) FLTRLS (Fault output holding time setting pin) The FLTRLS is a pin used to make setting of time to hold a Fault signal. Connect a capacitor between the FLTRLS pin and the GND1 pin, and a resistor between it and the VCC1 pin. The Fault signal is held until the FLTRLS pin voltage exceeds a voltage set with the V FLTRLS parameter. To set holding time to 0 ms, do not connect the capacitor. Short-circuiting the FLTRLS pin to the VCC1 pin will cause a high current to flow in the FLTRLS pin and, in an open state, may cause the IC to malfunction. To avoid such trouble, be sure to connect a resistor between the FLTRLS and the VCC1 pins. 9) OUT1H, OUT1L (Output pin) The OUT1H pin is a source side pin used to drive the gate of a power device, and the OUT1L pin is a sink side pin used to drive the gate of a power device. 10) OUT2 (MOSFET control pin for Miller Clamp) The OUT2 is a pin for controlling the external MOS switch to prevent the increase in gate voltage due to the miller current of the power device connected to OUT1H/L pin. 11) VREG (Power supply pin for driving the MOSFET for Miller Clamp) The VREG pin is a power supply pin for Miller Clamp (typ 10V). Be sure to connect a capacitor between VREG pin and VEE2 pin to prevent oscillation and to reduce voltage fluctuations due to OUT2 pin output current. 12) PROOUT (Soft turn-off pin) The PROOUT is a pin used to put the soft turn-off function of a power device in operation when the SCP function is activated. This pin combines with the gate voltage monitoring pin for Miller Clamp function and OSFB function which output the gate state. 13) SCPIN (Short current detection pin) The SCPIN is a pin used to detect current for short current protection. When the SCPIN pin voltage exceeds VSCDET (typ 0.7V), the SCP function will be activated. This may cause the IC to malfunction in an open state. To avoid such trouble, short-circuit the SCPIN pin to the GND2 pin if the short current protection is not used. In order to prevent the wrong detection due to noise, the noise mask time tSCPMSK (typ 0.8µs) is set. www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 3/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 14) OSFB (Output state feedback output pin) The OSFB pin is an open drain pin used to output the gate state. If the IN and the OUT1H/L pin are at the same level, the OSFB pin output the “Hi-Z” level, otherwise the OSFB pin output the “L” level and hold “L” until ENA H or UVLO on low voltage side is activated. 15) TEST(Mode setting pin) The TEST pin is an operation mode setting pin. This pin is usually connected to GND1 pin. If the TEST pin is connected to the VCC1 pin, Input-side UVLO function is disabled. Description of functions and examples of constant setting 1) Miller Clamp function When OUT1H/L Hi-Z/L and PROOUT pin voltage VOUT2ON (typ 2V), H is output from OUT2 pin and the external MOS switch is turned ON. When OUT1H/L H/Hi-Z, L is output from OUT2 pin and the external MOS switch is turned OFF. While the short-circuit protection function is activated, L is output from OUT2 pin and the external MOS switch is turned OFF. Short current SCPIN IN PROOUT OUT2 Detected Not less than VSCDET X X L X L Not less than VOUT2ON L X L less than VOUT2ON H X H X L Not detected VCC2 PREDRIV ER OUT1H/L PREDRIV ER PROOUT PREDRIV ER LOGIC VREG REGULATOR PREDRIV ER OUT2 PREDRIV ER V OUT2ON - GND2 VEE2 Figure 3. Block diagram of Miller Clamp function. tPON (typ 115ns) tPOFF (typ 115ns) IN OUT1H/L PROOUT (Monitor the gate voltage) VOUT2ON tOUT2ON (typ 25ns) OUT2 Figure 4. Timing chart of Miller Clamp function www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 4/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 2) Fault status output This function is used to output a fault signal from the FLT pin when a fault occurs (i.e., when the undervoltage lockout function (UVLO) or short current protection function (SCP) is activated) and hold the Fault signal until the set Fault output holding time is completed. The Fault output holding time t FLTRLS is given as the following equation with the settings of capacitor CFLTRLS and resistor RFLTRLS connected to the FLTRLS pin. For example, when CFLTRLS is set to 0.01 F and RFLTRLS is set to 200k , the holding time will be set to 2 ms. tFLTRLS [ms] CFLTRLS [µF] RFLTRLS [k ] To set the fault output holding time to “0” ms, only connect the resistor RFLTRLS. Status FLT pin Normal Hi-Z Fault occurs L Fault occurs (The UVLO or SCP function is activated.) Status UVLO FLT VFLTRLS S SCP FLTRLS R VCC1 CFLTRLS RFLTRLS Hi-Z FLT L FLTRLS H OUT1H/L FLT L GND1 Fault output holding time (tFLTRLS) ECU Figure 5. Fault Status Output Timing Chart Figure 6. Fault Output Block Diagram 3) Undervoltage Lockout (UVLO) function The BM6104FV-C incorporates the undervoltage lockout (UVLO) function both on the low and the high voltage sides. When the power supply voltage drops to the UVLO ON voltage (low voltage side typ 3.4V, high voltage side typ 9.05V), the OUT1 and the FLT pin both will output the “L” signal. When the power supply voltage rises to the UVLO OFF voltage (low voltage side typ 3.5V, high voltage side typ 9.55V), these pins will be reset. However, during the fault output holding time set in “2) Fault status output” section, the OUT1 pin and the FLT pin will hold the “L” signal. In addition, to prevent malfunctions due to noises, mask time tUVLO1MSK (typ 10µs) and tUVLO2MSK (typ 10µs) are set on both low and high voltage sides. H L IN VUVLO1H VUVLO1L VCC1 FLT OUT1H/L Figure 7. Low voltage side UVLO Function Operation Timing Chart Hi-Z L H L H L IN VUVLO2H VUVLO2L VCC2 FLT OUT1H/L Figure 8. High voltage side UVLO Operation Timing Chart www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 5/35 Hi-Z L H Hi-Z L TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 4) Short current protection function (SCP, DESAT) When the SCPIN pin voltage exceeds VSCDET (typ 0.7V), the SCP function will be activated. When the SCP function is activated, the OUT1H/L pin voltage will be set to the “Hi-Z/HiZ” level first, and then the PROOUT pin voltage to the “L” level (soft turn-off).Next, after tSTO (min 30µs, max 110µs) has passed after the short-circuit current falls below the threshold value, OUT1H/L pin becomes HiZ/L and PROOUT pin becomes L. Finally, when the fault output holding time set in “2) fault status output” section on page 5 is completed, the SCP function will be released. VCOLLECTOR/VDRAIN which Desaturation Protection starts operation (VDESAT) and the blanking time (tBLANK) can be calculated by the formula below; R3 R 2 V FD1 R3 R3 R 2 R1 VCC 2 MIN V VSCDET R3 R 2 R1 R3 R 2 R1 VSCDET t BLANKouternal s R3 (C BLANK 24 10 12 ) ln(1 ) 0.2 10 6 R3 R 2 R1 R3 VCC 2 VDESAT V VSCDET Reference Value VDESAT R1 R2 R3 4.0V 15 kΩ 39 kΩ 6.8 kΩ 4.5V 15 kΩ 43 kΩ 6.8 kΩ 5.0V 15 kΩ 36 kΩ 5.1 kΩ 5.5V 15 kΩ 39 kΩ 5.1 kΩ 6.0V 15 kΩ 43 kΩ 5.1 kΩ 6.5V 15 kΩ 62 kΩ 6.8 kΩ 7.0V 15 kΩ 68 kΩ 6.8 kΩ 7.5V 15 kΩ 82 kΩ 7.5 kΩ 8.0V 15 kΩ 91 kΩ 8.2 kΩ 8.5V 15 kΩ 82 kΩ 6.8 kΩ 9.0V 15 kΩ 130 kΩ 10 kΩ 9.5V 15 kΩ 91 kΩ 6.8 kΩ 10.0V 15 kΩ 130 kΩ 9.1 kΩ VCC2 VCC1 R1 D1 OUT1H/L LOGIC S FLTRLS - PROOUT Q R R2 FLT SCPIN VFLTRLS SCPMASK - VSCDET CBLANK R3 GND2 GND2 VEE2 Figure 9. Block Diagram for DESAT www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 6/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C IN A OUT1H/L OUT2 PROOUT SCPIN FLT tSCPMSK tcomp delay VSCPTH (typ 0.95µs) VSCPTH t BLANKouternal tBLANK BLAN t BLANKouternal tBLANK BLAN K tSCPMSK tcomp delay K Figure 10. DESAT Operation Timing Chart H L INA VSCDET SCPIN H Hi-Z L H Hi-Z L OUT1 OUT2 Hi-Z L Hi-Z L PROOUT FLT tSTO tSTO Fault output holding time (Note 2) Fault output holding time (Note 2) (Note 2): “2) Fault status output” section on page 5 Figure 11. SCP Operation Timing Chart www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 7/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C Start OUT1H/L Hi-Z/L、OUT2 H No VSCPIN VSCDET VFLTRLS VTFLTRLS No Yes Yes No Exceed mask time Yes FLT Hi-Z OUT1H/L Hi-Z/Hi-Z、OUT2 L、 PROOUT L、FLT L IN H No No VSCPIN VSCDET Yes OUT1H/L H/Hi-Z、OUT2 L、 PROOUT Hi-Z Yes No Exceed tSTO Yes Figure 12. SCP Operation Status Transition Diagram VCC2 VCC1 OUT1H/L LOGIC FLTRLS S - PROOUT Q R FLT SCPIN VFLTRLS SCPMASK GND2 VSCDET GND2 VEE2 Figure 13. Block Diagram for SCP www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 8/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 5）I/O condition table Input No . Status 1 SCP 2 Output E N A I N B I N A P R O O U T O U T 1 H O U T 1 L O U T 2 P R O O U T F L T O S F B VCC1 VCC2 S C P I N H L L H X Hi-Z Hi-Z L L L Hi-Z UVLO X L X X X H Hi-Z L L Hi-Z L Hi-Z UVLO X L X X X L Hi-Z L H Hi-Z L Hi-Z X UVLO L X X X H Hi-Z L L Hi-Z L Hi-Z X UVLO L X X X L Hi-Z L H Hi-Z L Hi-Z L H X X H Hi-Z L L Hi-Z Hi-Z Hi-Z L H X X L Hi-Z L H Hi-Z Hi-Z Hi-Z L L H X H Hi-Z L L Hi-Z Hi-Z L L L H X L Hi-Z L H Hi-Z Hi-Z Hi-Z L L L L H Hi-Z L L Hi-Z Hi-Z L L L L L L Hi-Z L H Hi-Z Hi-Z Hi-Z L L L H H H Hi-Z L Hi-Z Hi-Z Hi-Z L L L H L H Hi-Z L Hi-Z Hi-Z L VCC1UVLO 3 4 VCC2UVLO 5 6 Disable 7 8 INB Active 9 10 Normal Operation L Input 11 12 Normal Operation H Input 13 : VCC1 or VCC2 UVLO, X:Don't care www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 9/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 6) Power supply startup / shutoff sequence H L IN VUVLO1L VCC1 VCC2 VUVLO2H VUVLO1L VUVLO2H VUVLO1L VUVLO2H 0V 0V VEE2 H Hi-Z L H Hi-Z L Hi-Z L Hi-Z L OUT1H/L OUT2 PROOUT FLT H L IN VCC1 VCC2 VUVLO1L VUVLO1H VUVLO2H VUVLO1H VUVLO2L 0V VUVLO2L VEE2 OUT2 PROOUT FLT H L IN VCC1 VUVLO1L VUVLO2H VUVLO1L VUVLO2H VUVLO1H 0V VUVLO2L VEE2 OUT2 PROOUT FLT H L IN VCC2 0V 0V H Hi-Z L H Hi-Z L Hi-Z L Hi-Z L OUT1H/L VCC1 0V 0V H Hi-Z L H Hi-Z L Hi-Z L Hi-Z L OUT1H/L VCC2 0V VUVLO1H VUVLO1H VUVLO2L VUVLO1H VUVLO2L 0V VUVLO2L VEE2 0V 0V H Hi-Z L H Hi-Z L Hi-Z L Hi-Z L OUT1H/L OUT2 PROOUT FLT : Since the VCC2 to VEE2 pin voltage is low and the output MOS does not turn ON, the output pins become Hi-Z conditions. : Since the VCC1 pin voltage is low and the FLT output MOS does not turn ON, the output pins become Hi-Z conditions. Figure 14. Power supply startup / shutoff sequence www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 10/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C Absolute Maximum Ratings Parameter Symbol Limits Unit VCC1 -0.3 7.0(Note 3) V VCC2 -0.3 30.0(Note 4) V Output-Side Negative Supply Voltage VEE2 -15.0 0.3(Note 4) V Maximum Difference Between Output-Side Positive and Negative Voltages VMAX2 36.0 V INA, INB, ENA Pin Input Voltage VIN -0.3 VCC1 0.3 or 7.0(Note 3) V OSFB, FLT Pin Input Voltage VFLT -0.3 VCC1 0.3 or 7.0(Note 3) V VFLTRLS -0.3 VCC1 0.3 or 7.0(Note 3) V SCPIN Pin Input Voltage VSCPIN -0.3 VCC2 0.3(Note 4) V VREG Pin Output Current IVREG 10 mA OUT1H, OUT1L, PROOUT Pin Output Current (Peak 10μs) IOUT1PEAK 5.0(Note 5) A OUT2 Pin Output Current (Peak 10μs) IOUT2PEAK 1.0(Note 5) A IOSFB 10 mA FLT Output Current IFLT 10 mA Power Dissipation Pd 1.19(Note 6) W Operating Temperature Range Topr -40 125 C Storage Temperature Range Tstg -55 150 C Junction Temperature Tjmax 150 C Input-Side Supply Voltage Output-Side Positive Supply Voltage FLTRLS Pin Input Voltage OSFB Output Current (Note 3) Relative to GND1. (Note 4) Relative to GND2. (Note 5) Should not exceed Pd and Tj 150 C. (Note 6) Derate above Ta 25 C at a rate of 9.5mW/ C. Mounted on a glass epoxy of 70 mm 70 mm 1.6 mm. Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. Recommended Operating Ratings Parameter Symbol Min Max Units VCC1 4.5 5.5 V Output-Side Positive Supply Voltage(Note 8) VCC2 10 24 V Output-Side Negative Supply Voltage(Note 8) VEE2 -12 0 V Maximum Difference Between Output-Side Positive and Negative Voltages VMAX2 10 32 V Input-Side Supply Voltage(Note 7) (Note 7) Relative to GND1. (Note 8) Relative to GND2. Insulation Related Characteristics Parameter Symbol Characteristic Units RS 109 Ω Insulation Withstand Voltage / 1min VISO 2500 Vrms Insulation Test Voltage / 1sec VISO 3000 Vrms Insulation Resistance (VIO 500V) www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 11/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C Electrical Characteristics （Unless otherwise specified Ta -40 C 125 C, VCC1 4.5V 5.5V, VCC2 10V 24V, VEE2 -12V 0V） Parameter Symbol Min Typ Max Unit Conditions General Input Side Circuit Current 1 ICC11 0.38 0.51 0.64 mA OUT1 L Input Side Circuit Current 2 ICC12 0.38 0.51 0.64 mA OUT1 H Input Side Circuit Current 3 Input Side Circuit Current 4 ICC13 ICC14 0.47 0.54 0.62 0.72 0.77 0.90 mA mA INA 10kHz, Duty 50% INA 20kHz, Duty 50% Output Side Circuit Current 1 Output Side Circuit Current 2 ICC21 ICC22 1.5 1.3 2.0 1.8 2.5 2.3 mA mA VCC2 14V, OUT1 L VCC2 14V, OUT1 H Output Side Circuit Current 3 Output Side Circuit Current 4 Output Side Circuit Current 5 Output Side Circuit Current 6 Logic Block Logic High Level Input Voltage Logic Low Level Input Voltage ICC23 ICC24 ICC25 ICC26 1.6 1.3 1.8 1.5 2.2 1.9 2.5 2.1 2.8 2.5 3.2 2.7 mA mA mA mA VCC2 18V, OUT1 L VCC2 18V, OUT1 H VCC2 24V, OUT1 L VCC2 24V, OUT1 H VINH VINL 2.0 0 - VCC1 0.8 V V INA, INB, ENA INA, INB, ENA Logic Pull-Down Resistance Logic Pull-Up Resistance RIND RINU 25 25 50 50 100 100 kΩ kΩ INA, INB ENA Logic Input Mask Time ENA Mask Time tINMSK tENAMSK 4 10 90 20 ns µs INA, INB ENA Output OUT1H ON Resistance RONH 0.7 1.8 4.0 Ω IOUT1H 40mA OUT1L ON Resistance RONL 0.4 0.9 2.0 Ω OUT1 Maximum Current IOUTMAX 3.0 4.5 - A PROOUT ON Resistance RONPRO 0.4 0.9 2.0 Ω IOUT1L 40mA VCC2 18V Guaranteed by design IPROOUT 40mA tPONA 90 115 150 ns INA PWM, INB L tPONB 100 125 160 ns INA H, INB PWM tPOFFA 90 115 150 ns INA PWM, INB L Turn ON Time Turn OFF Time Propagation Distortion tPOFFB 80 105 140 ns INA H, INB PWM tPDISTA tPDISTB -25 -45 0 -20 20 0 ns ns tPOFFA - tPONA tPOFFB - tPONB tRISE tFALL - 50 50 - ns ns 10nF between OUT1-VEE2 RON2H RON2L 2.0 1.5 4.5 3.5 9.0 7.0 Ω Ω IOUT2 10mA IOUT2 10mA VOUT2ON tOUT2ON 1.8 - 2 25 2.2 50 V ns Relative to VEE2 VREG CM 9 100 10 - 11 - V kV/µs Relative to VEE2 Design assurance Rise Time Fall Time OUT2 ON Resistance (Source) OUT2 ON Resistance (Sink) OUT2 ON Threshold Voltage OUT2 Output Delay Time VREG Output Voltage Common Mode Transient Immunity www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 12/35 10nF between OUT1-VEE2 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C Electrical Characteristics （Unless otherwise specified Ta -40 C 125 C, V CC1 4.5V 5.5V, VCC2 10V 24V, VEE2 -12V 0V） Protection functions VCC1 UVLO OFF Voltage VUVLO1H 3.35 3.50 3.65 V VUVLO1L tUVLO1MSK 3.25 4 3.40 10 3.55 30 V µs VCC2 UVLO OFF Voltage VCC2 UVLO ON Voltage VUVLO2H VUVLO2L 8.95 8.45 9.55 9.05 10.15 9.65 V V VCC2 UVLO Mask Time SCPIN Input Voltage tUVLO2MSK VSCPIN 4 - 10 0.1 30 0.22 µs V SCP Threshold Voltage SCP Detection Mask Time VSCDET tSCPMSK 0.665 0.55 0.700 0.8 0.735 1.05 V µs Soft Turn OFF Release Time OSFB Threshold Voltage H tSTO VOSFBH 30 4.5 5.0 110 5.5 µs V Respective to GND2 OSFB Threshold Voltage L OSFB Output Low Voltage VOSFBL VOSFBOL 4.0 - 4.5 0.18 5.0 0.40 V V Respective to GND2 IOSFB 5mA OSFB Filter Time FLT Output Low Voltage tOSFBON VFLTL 1.5 - 2.0 0.18 2.6 0.40 µs V IFLT 5mA VTFLTRLS 0.64 VCC1 -0.1 0.64 VCC1 0.64 VCC1 0.1 V VCC1 UVLO ON Voltage VCC1 UVLO Mask Time FLTRLS Threshold INA 50% ISCPIN 1mA 50% tPON tPOFF OUT1H/L 90% 50% 90% 10% tFALL tRISE 50% 10% Figure 15. INA-OUT1 Timing Chart UL1577 Ratings Table Following values are described in UL Report. Parameter Values Units Side 1 (Input Side) Circuit Current 0.51 mA VCC1 5.0V, OUT1H/L L Side 2 (Output Side) Circuit Current 2.2 mA VCC2 18V, VEE2 0V, UT1H/L L Side 1 (Input Side) Consumption Power 2.55 mW VCC1 5.0V, OUT1H/L L Side 2 (Output Side) Consumption Power 39.6 mW VCC2 18V, VEE2 0V, OUT1H/L L Isolation Voltage 2500 Vrms Maximum Operating (Ambient) Temperature 125 Maximum Junction Temperature 150 Maximum Strage Temperature 150 Maximum Data Transmission Rate 2.5 MHz www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 13/35 Conditions TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C Typical Performance Curves 0.64 0.64 Input side circuit current [mA] Input side circuit current [mA] Ta 125 C 0.51 Ta 25 C 0.51 Vcc1 5.5V Vcc1 5.0V Vcc1 4.5V Ta -40 C 0.38 4.50 0.38 4.75 5.00 VCC1 [V] 5.25 -40 5.50 -20 0 20 40 60 Ta [ C] 80 100 120 Figure 17. Input side circuit current vs. Temperature (OUT1 L) Figure 16. Input side circuit current vs. VCC1 (OUT1 L) 0.64 0.64 Input side circuit current [mA] Input side circuit current [mA] Ta 125 C 0.51 Ta 25 C 0.51 Vcc1 5.5V Vcc1 5.0V Vcc1 4.5V Ta -40 C 0.38 4.50 0.38 4.75 5.00 VCC1 [V] 5.25 5.50 Figure 18. Input side circuit current vs. VCC1 (OUT1 H) www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 14/35 -40 -20 0 20 40 60 Ta [ C] 80 100 120 Figure 19. Input side circuit current vs. Temperature (OUT1 H) TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
0.77 0.77 0.72 0.72 Ta 125 C Input side circuit current [mA] Input side circuit current [mA] BM6104FV-C 0.67 0.62 Ta 25 C 0.57 0.52 Vcc1 5.5V 0.67 0.62 Vcc1 5.0V 0.57 0.52 Vcc1 4.5V Ta -40 C 0.47 4.50 0.47 4.75 5.00 VCC1 [V] 5.25 5.50 -40 Figure 20. Input side circuit current vs. VCC1 (INA 10 kHz, Duty 50%) 0 20 40 60 Ta [ C] 80 100 120 Figure 21. Input side circuit current vs. Temperature (INA 10 kHz, Duty 50%) 0.89 0.89 0.84 Input side circuit current [mA] 0.84 Input side circuit current [mA] -20 Ta 125 C 0.79 0.74 0.69 Ta 25 C 0.64 Vcc1 5.5V 0.79 0.74 Vcc1 5.0V 0.69 0.64 Vcc1 4.5V 0.59 0.59 Ta -40 C 0.54 4.50 0.54 4.75 5.00 VCC1 [V] 5.25 5.50 Figure 22. Input side circuit current vs. VCC1 (INA 20 kHz, Duty 50%) www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 -40 -20 0 20 40 60 Ta [ C] 80 100 120 Figure 23. Input side circuit current vs. Temperature (INA 20 kHz, Duty 50%) 15/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 3.1 3.1 Output side circuit current [mA] Output side circuit current [mA] Ta 125 C 2.9 2.7 2.5 2.3 Ta 25 C 2.1 1.9 Ta -40 C 1.7 2.7 2.5 2.3 Vcc2 18V 2.1 Vcc2 14V 1.9 1.7 1.5 1.5 14 16 18 20 VCC2 [V] 22 -40 24 Figure 24. Output side circuit current vs. VCC2 (OUT1 L) -20 0 20 40 60 Ta [ C] 80 100 120 Figure 25. Output side circuit current vs. Temperature (OUT1 L) 2.7 2.7 Ta 125 C 2.5 Output side circuit current [mA] 2.5 Output side circuit current [mA] Vcc2 24V 2.9 2.3 2.1 Ta 25 C 1.9 1.7 Ta -40 C 2.3 2.1 1.9 Vcc2 14V 1.5 1.3 1.3 16 18 20 VCC2 [V] 22 24 Figure 26. Output side circuit current vs. VCC2 (OUT1 H) www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 Vcc2 18V 1.7 1.5 14 Vcc2 24V -40 -20 0 20 40 60 Ta [ C] 80 100 120 Figure 27. Output side circuit current vs. Temperature (OUT1 H) 16/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 24 3.0 20 Ta -40 C Ta 25 C Ta 125 C 2.0 16 OUT1 [V] VINH / VINL [V] 2.5 H level 1.5 L level 1.0 12 8 Ta -40 C Ta 25 C Ta 125 C 0.5 0.0 4.50 4 0 4.75 5.00 VCC1 [V] 5.25 5.50 0 1 2 3 4 5 INA [V] Figure 28. Logic (INA/INB/ENA) High/Low level input voltage vs. VCC1 Figure 29. OUT1 vs. INA input voltage (VCC1 5V, VCC2 18V, Ta 25 C) 100.0 75.0 75.0 RINU [kΩ ] RIND [kΩ ] 100.0 Ta -40 C 50.0 Ta -40 C 50.0 Ta 25 C Ta 25 C Ta 125 C 25.0 4.50 4.75 5.00 VCC1 [V] Ta 125 C 5.25 5.50 25.0 4.50 Figure 30. Logic pull-down resistance vs. VCC1 www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 4.75 5.00 VCC1 [V] 5.25 5.50 Figure 31. Logic pull-up resistance vs. VCC1 17/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 90 90 80 80 70 70 Ta -40 C Ta -40 C 60 tINMSK [ns] tINMSK [ns] 60 50 40 30 Ta 125 C 20 50 40 30 Ta 25 C Ta 25 C Ta 125 C 20 10 10 0 4.50 4.75 5.00 VCC1 [V] 5.25 5.50 0 4.50 4.75 5.00 VCC1 [V] 5.50 5.25 Figure 33. Logic (INA/INB) input mask time vs. VCC1 (Low pulse) Figure 32. Logic (INA/INB) input mask time vs. VCC1 (High pulse) 20 3.7 16 3.1 RONH [Ω ] tENAMSK [µs] Ta -40 C 12 2.5 Ta 125 C 1.9 8 Ta 25 C 1.3 Ta 25 C Ta 125 C Ta -40 C 4 4.50 0.7 4.75 5.00 VCC1 [V] 5.25 5.50 16 18 20 VCC2 [V] 22 24 Figure 35. OUT1H ON resistance vs. VCC2 Figure 34. ENA mask time vs. VCC1 www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 14 18/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 2.0 2.0 1.6 1.6 RONPRO [Ω ] RONL [Ω ] Ta 125 C Ta 125 C 1.2 Ta 25 C 0.8 1.2 Ta 25 C 0.8 Ta -40 C Ta -40 C 0.4 0.4 14 16 18 20 VCC2 [V] 22 24 14 Figure 36. OUT1L ON resistance vs. VCC2 18 20 VCC2 [V] 22 24 Figure 37. PROOUT ON resistance vs. VCC2 150 150 140 140 130 130 tPON [ns] Ta -40 C tPON [ns] 16 120 110 120 110 Ta 25 C Ta 125 C 100 100 90 90 14 16 18 20 VCC2 [V] 22 24 Figure 38. Turn ON time vs VCC2 (INA PWM, INB L) www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 -40 -20 0 20 40 60 Ta [ C] 80 100 120 Figure 39. Turn ON time vs Temperature (VCC2 24V, INA PWM, INB L) 19/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
150 150 140 140 130 130 Ta 125 C tPOFF [ns] tPOFF [ns] BM6104FV-C 120 110 120 110 Ta -40 C Ta 25 C 100 100 90 90 14 16 18 20 VCC2 [V] 22 24 -40 Figure 40. Turn OFF time vs. VCC2 (INA PWM, INB L) 100 90 90 20 40 60 Ta [ C] 80 100 120 80 Ta 125 C 70 70 60 60 tFALL [ns] tRISE [ns] 0 Figure 41. Turn OFF time vs. Temperature (VCC2 24V, INA PWM, INB L) 100 80 -20 50 Ta 125 C 50 40 40 Ta 25 C 30 Ta 25 C 30 Ta -40 C Ta -40 C 20 20 10 10 0 0 14 16 18 20 VCC2 [V] 22 24 16 18 20 VCC2 [V] 22 24 Figure 43. Fall time vs. VCC2 (10nF between OUT1-VEE2) Figure 42. Rise time vs. VCC2 (10nF between OUT1-VEE2) www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 14 20/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 9.0 6.5 Ta 125 C 8.0 Ta 125 C 5.5 RON2L [Ω ] RON2H [Ω ] 7.0 6.0 Ta 25 C 5.0 Ta 25 C 4.5 3.5 4.0 2.5 3.0 Ta -40 C Ta -40 C 2.0 14 16 1.5 18 20 VCC2 [V] 22 14 24 16 18 20 VCC2 [V] 22 24 Figure 45. OUT2 ON resistance (Sink) vs. VCC2 Figure 44. OUT2 ON resistance (Source) vs. VCC2 2.2 50 Ta 125 C 40 2.1 Ta 25 C tOUT2ON [ns] VOUT2ON [V] Ta 125 C 2.0 30 Ta 25 C 20 Ta -40 C Ta -40 C 1.9 10 1.8 0 14 16 18 20 VCC2 [V] 22 24 16 18 20 VCC2 [V] 22 24 Figure 47. OUT2 output delay time vs. VCC2 Figure 46. OUT2 ON threshold voltage vs. VCC2 www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 14 21/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 11.0 11.0 Vcc2 24V Vcc2 18V Vcc2 14V 10.5 10.5 VREG [V] VREG [V] Ta -40 C 10.0 10.0 Ta 25 C Ta 125 C 9.5 9.5 9.0 9.0 14 16 18 20 VCC2 [V] 22 -40 24 -20 0 20 40 60 Ta [ C] 80 100 120 Figure 49. VREG output voltage vs. Temperature Figure 48. VREG output voltage vs. VCC2 5 28 4 Ta -40 C tUVLO1MSK [µs] FLT [V] 3 24 Ta -40 C Ta 125 C 2 Ta 125 C 20 16 12 Ta 25 C Ta 25 C 1 0 3.25 8 4 3.35 3.45 VCC1 [V] 3.55 3.65 -20 0 20 40 60 Ta [ C] 80 100 120 Figure 51. VCC1 UVLO mask time vs. Temperature Figure 50. FLT vs. VCC1 (VCC1 UVLO ON/OFF voltage) www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 -40 22/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 6 28 5 24 Ta 125 C FLT [V] Ta 125 C 3 Ta 25 C Ta 25 C Ta -40 C tUVLO2MSK [µs] 4 2 20 16 12 Ta -40 C 1 8 0 4 8.6 9.1 -40 9.6 -20 0 VCC2 [V] 20 40 60 Ta [ C] 80 100 120 Figure 53. VCC2 UVLO mask time vs. Temperature Figure 52. FLT vs. VCC2 (VCC2 UVLO ON/OFF voltage, VCC1 5V) 0.22 0.73 Ta 25 C VSCDET [V] VSCPIN [V] Ta 125 C 0.11 Ta -40 C Ta 25 C 0.70 Ta -40 C Ta 125 C 0.00 0.67 14 16 Figure 54. 18 20 VCC2 [V] 22 24 SCPIN Input voltage vs. VCC2 (ISCPIN 1mA) www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 14 16 18 20 VCC2 [V] 22 24 Figure 55. SCP threshold voltage vs. VCC2 23/35 TSZ02201-0717ABH00030-1-2 25.Dec.2015 Rev.004
BM6104FV-C 110 1.05 0.95 90 0.85 tSTO [µs] tSCPMSK [µs] Ta -40 C 0.75 Ta 25 C Vcc2 14V Vcc2 18V Vcc2 24V 70 Ta 125 C Vcc2 14V Vcc2 18V Vcc2 24V Max. 50 0.65 Min. 30 0.55 14 16 18 20 VCC2 [V] 22 -40 24 -20 0 20 40 60 Ta [ C] 80 100 120 Figure 57. Soft turn OFF release time vs. Temperature Figure 56. SCP detection mask time vs. VCC2 0.4 5.40 Ta 25 C Ta 125 C Ta -40 C 5.20 Ta 125 C 0.3 OSFB H VOSFBOL [V] VOSFB [V] 5.00 4.80 4.60 0.2 Ta 25 C OSFB L 4.40 0.1 Ta 125 C Ta -40 C Ta 25 C 4.20 Ta -40 C 4.00 14 16 18 20 VCC2 [V] 22 24 Figure 58. OSFB threshold voltage H/L vs. VCC2 www.rohm.com 2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 24/35 0.0 4.50 4.75 5.00 VCC2 [V] 5.25 5.50 Figure
Gate Driver Providing Galvanic isolation Series. Isolation voltage 2500Vrms. 1ch Gate Driver Providing Galvanic . Isolation BM6104FV-C. General Description. The BM6104FV-C is a gate driver with isolation voltage . 2500Vrms, I/O delay time of 150ns, and minimum input pulse width of 90ns, and incorporates the fault signal
NOTE: In a DUAL GATE INSTALLATION the gate opener on the same side of the driveway as the control box is known as the MASTER GATE OPENER and that gate is refered to as the MASTER GATE. Conversly the gate opener on the other gate is refered to as the SLAVE GATE OPENER and the gate is refered to as the SLAVE GATE. For Mighty Mule FM702, GTO/PRO .
Galvanic Spa System II What is a Galvanic Treatment? For more than 50 years, spa and salon professionals have used gentle galvanic currents in customized treatments to refresh and energize the skin. These treatments, through a gentle massaging action, help to focus cellular energy and enhance circulation. How does a Galvanic Treatment work? Pre .
BENCH SEAT SEAT SEAT SEAT TPTP TP TP TP TP SEP TP TP TP PP PP PP TP WV WV WV WV WV WV WV SP SP P GP SEP SP SP SP SP SP SP BBQ PS GATE GATE GATE GATE GATE L B B B B B B B B B B B B B B SEAT B SEAT SEP GATE GATE GATE GATE GATE SEAT L BR. . Raised planter box for grape vine and BBQ her
Gate Drain Gate controls this. Gate can not control below that. So current can leak through there. PDSOI Gate 1V Gate controls this. No leakage path. FDSOI Gate 1V Leak Source Drain FinFET Si Gate 1V Gate Source Drain Better Electrostatics Stronger Gate Control - Lower V t for the same leakage - Shorter channel for the same V t
Lecture 2: Basic Physics of Galvanic Cells & Electrochemical Energy Conversion In this lecture, we talk about the basic science of the galvanic cells and give several commonly-seen examples in real application. 1: Electrochemical cells and its operating parts The galvanic cell, or called voltaic cell, is an electrochemical cell that converts
ageLOC Galvanic Spa System II 01 101332 ageLOC Edition Galvanic Spa System II (white) 343.00 240.00 228.00 01 101333 ageLOC Edition Galvanic Spa System II (black) 343.00 240.00 228.00 01 003876 Galvanic Spa Facial Gels with ageLOC 46.00 32.00 30.40 01 102704 Tru Face Line Corrector 48.00 34.00 32.30 01
The Trendmaster Galvanic Isolator is powered from an external power supply which enables several Galvanic Isolators to be connected in parallel to one TIM line from DSM or SPA. Each Galvanic Isolator can interface and power up t
eral thousands of genes, but only for a few hundred tissue samples. The classical statistical methods are often simply not applicable in these \high-dimensional" situations. The course is divided into 4 chapters (of unequal size). Our rst chapter will start by introducing ridge regression, a simple generalisation of ordinary least squares. Our study of this will lead us to some beautiful .
