TMS320x2833x Analog-to-Digital Converter (ADC
TMS320x2833x Analog-to-Digital Converter(ADC) ModuleReference GuideLiterature Number: SPRU812ASeptember 2007 – Revised October 2007
2SPRU812A – September 2007 – Revised October 2007Submit Documentation Feedback
ContentsPreface . 71Analog-to-Digital Converter (ADC)Features . 101.2Autoconversion Sequencer Principle of Operation1.3.1.2.1 Sequential Sampling Mode .1.2.2 Simultaneous Sampling Mode .Uninterrupted Autosequenced Mode .1.41.51.61.71.81.91.101.11121314191.3.1Sequencer Start/Stop Mode (Sequencer Start/Stop Operation With MultipleTime-Sequenced Triggers) . 211.3.2Simultaneous Sampling Mode . 23.1.3.4 Interrupt Operation During Sequenced Conversions .ADC Clock Prescaler .1.4.1 ADC-module Clock and Sample Rate .Low-power Modes .Power-up Sequence .Sequencer Override Feature .ADC Calibration .1.8.1 ADC Cal Assembly Routine Method .1.8.2 Pointer to-Function Method .Internal/External Reference Voltage Selection .Offset Error Correction.ADC to DMA Interface .1.3.32. 91.1Input Trigger Description23242626262727282929303132. 33. 34Maximum Conversion Channels Register (ADCMAXCONV) . 38Autosequence Status Register (ADCASEQSR) . 40ADC Status and Flag Register (ADCST) . 41ADC Reference Select Register (ADCREFSEL) . 43ADC Offset Trim Register (ADCOFFTRIM) . 43ADC Input Channel Select Sequencing Control Registers . 44ADC Conversion Result Buffer Registers (ADCRESULTn). 45ADC Registers2.12.22.32.42.52.62.72.8ADC Control RegistersSPRU812A – September 2007 – Revised October 2007Submit Documentation FeedbackContents3
List of ock Diagram of the ADC Module .Sequential Sampling Mode (SMODE 0) .Simultaneous Sampling Mode (SMODE 1) .Block Diagram of Autosequenced ADC in Cascaded Mode .Block Diagram of Autosequenced ADC With Dual Sequencers .Flow Chart for Uninterrupted Autosequenced Mode .Example of ePWM Triggers to Start the Sequencer .Interrupt Operation During Sequenced Conversions .ADC Core Clock and Sample-and-Hold (S/H) Clock .Clock Chain to the ADC .External Bias for 2.048-V External Reference .Flow Chart of Offset Error Correction Process .Ideal Code Distribution of Sampled 0-V Reference.ADC Control Register 1 (ADCTRL1) (Address Offset 00h) .ADC Control Register 2 (ADCTRL2) (Address Offset 01h) .ADC Control Register 3 (ADCTRL3) (Address Offset 18h) .Maximum Conversion Channels Register (ADCMAXCONV) (Offset Address 02h) .Autosequence Status Register (ADCASEQSR) (Address Offset 07h) .ADC Status and Flag Register (ADCST) (Address Offset 19h) .ADC Reference Select Register (ADCREFSEL) (Address Offset 1Ch) .ADC Offset Trim Register (ADCOFFTRIM) (Address Offset 1Dh) .ADC Input Channel Select Sequencing Control Registers (ADCCHSELSEQ1) (Address Offset 03h) .ADC Input Channel Select Sequencing Control Registers (ADCCHSELSEQ2) (Address Offset 04h) .ADC Input Channel Select Sequencing Control Registers (ADCCHSELSEQ3) (Address Offset 05h) .ADC Input Channel Select Sequencing Control Registers (ADCCHSELSEQ4) (Address Offset 06h) .ADC Conversion Result Buffer Registers (ADCRESULTn) - (Addresses 0x7108-0x7117) .ADC Conversion Result Buffer Registers (ADCRESULTn) - (Addresses 0x0B00-0x0B0F) .List of 44444444545SPRU812A – September 2007 – Revised October 2007Submit Documentation Feedback
List of 72-82-92-102-11ADC Registers .Comparison of Single and Cascaded Operating Modes .Values for ADCCHSELSEQn Registers (MAX CONV1 Set to 6) .Values for ADCCHSELSEQn (MAX CONV1 set to 2) .Values After Second Autoconversion Session .Input Triggers .Clock Chain to the ADC .Power Options .ADC Control Register 1 (ADCTRL1) Field Descriptions .ADC Control Register 2 (ADCTRL2) Field Descriptions .ADC Control Register 3 (ADCTRL3) Field Descriptions .Maximum Conversion Channels Register (ADCMAXCONV) Field Descriptions .Bit Selections for MAX CONV1 for Various Number of Conversions .Autosequence Status Register (ADCASEQSR) Field Descriptions .State of Active Sequencer .ADC Status and Flag Register (ADCST) Field Descriptions .ADC Reference Select Register (ADCREFSEL) Field Descriptions.ADC Offset Trim Register (ADCOFFTRIM) Field Descriptions .CONVnn Bit Values and the ADC Input Channels Selected .SPRU812A – September 2007 – Revised October 2007Submit Documentation FeedbackList of Tables111720232323262734353739394040414343445
6List of TablesSPRU812A – September 2007 – Revised October 2007Submit Documentation Feedback
PrefaceSPRU812A – September 2007 – Revised October 2007Read This FirstNotational ConventionsThis document uses the following conventions. Hexadecimal numbers are shown with the suffix h or with a leading 0x. For example, the followingnumber is 40 hexadecimal (decimal 64): 40h or 0x40. Registers in this document are shown in figures and described in tables.– Each register figure shows a rectangle divided into fields that represent the fields of the register.Each field is labeled with its bit name, its beginning and ending bit numbers above, and itsread/write properties below. A legend explains the notation used for the properties.– Reserved bits in a register figure designate a bit that is used for future device expansion.Related Documents From Texas InstrumentsThe following documents are available for download from the Texas Instruments website, www.ti.com.Data Manual—SPRS439— TMS320F28335, F28334, F28332 Digital Signal Controllers (DSCs) Data Manual containsthe pinout, signal descriptions, as well as electrical and timing specifications for the F2833xdevices.CPU User's Guides—SPRU430— TMS320C28x DSP CPU and Instruction Set Reference Guide describes the centralprocessing unit (CPU) and the assembly language instructions of the TMS320C28x fixed-pointdigital signal processors (DSPs). It also describes emulation features available on these DSPs.SPRUEO2— TMS320C28x Floating Point Unit and Instruction Set Reference Guide describes thefloating-point unit and includes the instructions for the FPU.Peripheral Guides—SPRU566— TMS320x28xx, 28xxx Peripheral Reference Guide describes the peripheral reference guidesof the 28x digital signal processors (DSPs).SPRUFB0— TMS320x2833x System Control and Interrupts Reference Guide describes the variousinterrupts and system control features of the 2833x digital signal controllers (DSCs).SPRU812— TMS320x2833x Analog-to-Digital Converter (ADC) Reference Guide describes how toconfigure and use the on-chip ADC module, which is a 12-bit pipelined ADC.SPRU949— TMS320x2833x External Interface (XINTF) User's Guide describes the XINTF, which is anonmultiplexed asynchronous bus, as it is used on the 2833x devices.SPRU963— TMS320x2833x Boot ROM User's Guide describes the purpose and features of thebootloader (factory-programmed boot-loading software) and provides examples of code. It alsodescribes other contents of the device on-chip boot ROM and identifies where all of the informationis located within that memory.SPRUFB7— TMS320x2833x Multichannel Buffered Serial Port (McBSP) User's Guide describes theMcBSP available on the F2833x devices. The McBSPs allow direct interface between a DSP andother devices in a system.SPRUFB8— TMS320x2833x Direct Memory Access (DMA) Reference Guide describes the DMA on the2833x devices.SPRU812A – September 2007 – Revised October 2007Submit Documentation FeedbackRead This First7
www.ti.comRelated Documents From Texas InstrumentsSPRU791— TMS320x28xx, 28xxx Enhanced Pulse Width Modulator (ePWM) Module Reference Guidedescribes the main areas of the enhanced pulse width modulator that include digital motor control,switch mode power supply control, UPS (uninterruptible power supplies), and other forms of powerconversion.SPRU924— TMS320x28xx, 28xxx High-Resolution Pulse Width Modulator (HRPWM) describes theoperation of the high-resolution extension to the pulse width modulator (HRPWM).SPRU807— TMS320x28xx, 28xxx Enhanced Capture (eCAP) Module Reference Guide describes theenhanced capture module. It includes the module description and registers.SPRU790— TMS320x28xx, 28xxx Enhanced Quadrature Encoder Pulse (eQEP) Reference Guidedescribes the eQEP module, which is used for interfacing with a linear or rotary incrementalencoder to get position, direction, and speed information from a rotating machine in highperformance motion and position control systems. It includes the module description and registers.SPRU074— TMS320x28xx, 28xxx Enhanced Controller Area Network (eCAN) Reference Guide describesthe eCAN that uses established protocol to communicate serially with other controllers in electricallynoisy environments.SPRU051— TMS320x28xx, 28xxx Serial Communication Interface (SCI) Reference Guide describes theSCI, which is a two-wire asynchronous serial port, commonly known as a UART. The SCI modulessupport digital communications between the CPU and other asynchronous peripherals that use thestandard non-return-to-zero (NRZ) format.SPRU059— TMS320x28xx, 28xxx Serial Peripheral Interface (SPI) Reference Guide describes the SPI a high-speed synchronous serial input/output (I/O) port - that allows a serial bit stream ofprogrammed length (one to sixteen bits) to be shifted into and out of the device at a programmedbit-transfer rate.SPRU721— TMS320x28xx, 28xxx Inter-Integrated Circuit (I2C) Reference Guide describes the featuresand operation of the inter-integrated circuit (I2C) module that is available on the TMS320x280xdigital signal processor (DSP).Tools Guides—SPRU513— TMS320C28x Assembly Language Tools User's Guide describes the assembly languagetools (assembler and other tools used to develop assembly language code), assembler directives,macros, common object file format, and symbolic debugging directives for the TMS320C28x device.SPRU514— TMS320C28x Optimizing C Compiler User's Guide describes the TMS320C28x C/C compiler. This compiler accepts ANSI standard C/C source code and produces TMS320 DSPassembly language source code for the TMS320C28x device.SPRU608— The TMS320C28x Instruction Set Simulator Technical Overview describes the simulator,available within the Code Composer Studio for TMS320C2000 IDE, that simulates the instructionset of the C28x core.SPRU625— TMS320C28x DSP/BIOS Application Programming Interface (API) Reference Guidedescribes development using DSP/BIOS.8Read This FirstSPRU812A – September 2007 – Revised October 2007Submit Documentation Feedback
Chapter 1SPRU812A – September 2007 – Revised October 2007Analog-to-Digital Converter (ADC)The TMS320x2833x ADC module is a 12-bit pipelined analog-to-digital converter (ADC). The analogcircuits of this converter, referred to as the core in this document, include the front-end analog multiplexers(MUXs), sample-and-hold (S/H) circuits, the conversion core, voltage regulators, and other analogsupporting circuits. Digital circuits, referred to as the wrapper in this document, include programmableconversion sequencer, result registers, interface to analog circuits, interface to device peripheral bus, andinterface to other on-chip modules.This reference guide is applicable for the ADC found on the TMS320x2833x family of processors. Thisincludes all Flash-based, ROM-based and RAM-based devices within the 2833x atures.Autoconversion Sequencer Principle of Operation .Uninterrupted Autosequenced Mode .ADC Clock Prescaler .Low-power Modes .Power-up Sequence .Sequencer Override Feature .ADC Calibration .Internal/External Reference Voltage Selection .Offset Error Correction .ADC to DMA Interface .SPRU812A – September 2007 – Revised October 2007Submit Documentation l Converter (ADC)9
www.ti.comFeatures1.1FeaturesThe ADC module has 16 channels, configurable as two independent 8-channel modules to service theePWM modules. The two independent 8-channel modules can be cascaded to form a 16-channel module.Although there are multiple input channels and two sequencers, there is only one converter in the ADCmodule. Figure 1-1 shows the block diagram of the ADC module.The two 8-channel modules can autosequence a series of conversions; each module has the choice ofselecting any one of the respective eight channels available through an analog MUX. In the cascadedmode, the autosequencer functions as a single 16-channel sequencer. On each sequencer, once theconversion is completed, the selected channel value is stored in its respective ADCRESULT register.Autosequencing allows the system to convert the same channel multiple times, allowing the user toperform oversampling algorithms. This oversampling gives increased resolution over traditionalsingle-sampled conversion results.Functions of the ADC module include: 12-bit ADC core with built-in dual sample-and-hold (S/H) Simultaneous sampling or sequential sampling modes Analog input: 0 V to 3 V Fast conversion time runs at 12.5 MHz, ADC clock, or 6.25 MSPS 16-channel, multiplexed inputs Autosequencing capability provides up to 16 "autoconversions" in a single session. Each conversioncan be programmed to select any 1 of 16 input channels. Sequencer can be operated as two independent 8-state sequencers or as one large 16-statesequencer (i.e., two cascaded 8-state sequencers). Sixteen result registers (individually addressable) to store conversion values– The digital value of the input analog voltage is derived by:when input 0 VDigital Value 0,Digital Value 4096Digital Value 4095,Awhen 0 V input 3 Vwhen input 3 VAll fractional values are truncated. 10Input Analog Voltage * ADCLO3Multiple triggers as sources for the start-of-conversion (SOC) sequence– S/W - software immediate start– ePWM 1-6– GPIO XINT2Flexible interrupt control allows interrupt request on every end-of-sequence (EOS) or every other EOSSequencer can operate in "start/stop" mode, allowing multiple "time-sequenced triggers" tosynchronize conversions.ePWM triggers can operate independently in dual-sequencer mode.Sample-and-hold (S/H) acquisition time window has separate prescale control.Analog-to-Digital Converter (ADC)SPRU812A – September 2007 – Revised Oc
Analog-to-Digital Converter (ADC) The TMS320x2833x ADC module is a 12-bit pipelined analog-to-digital converter (ADC). The analog circuits of this converter, referred to as the core in this document, include the front-end analog multiplexers (MUXs), sample-and-hold (S/H) circuits,
Getting analog inputs to digital form D/A conversion “digital to analog” Getting digital inputs to analog form Digital I/O Sometimes you can fake analog values with digital (e.g., digital pulsing) 8 D/A Conversion “DAC” “D/A Converter” “Digital To Analog Converter
What is a Digital Analog Converter? Introduction In electronics, a digital-to-analog converter (DAC or D-to-A) is a device for converting a digital (usually binary) code to an analog signal (current, voltage or electric charge). An analog-to-digital converter (ADC) performs the
Converter (ADC) and Digital-to-Analog Converter (DAC). 1.2.2. Analog-to-Digital Converter (ADC) The transducer’s electrical analog output serves as the analog input to the ADC. The ADC converts this analog input to a digital output. This digital output consists of a number of bits that
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II. Evolution of the Analog RF-Digital Interface The analog RF-digital interface is significantly affected by the placement of the analog-to-digital converter (ADC)/digital-to-analog converter (DAC) pair. For most of the wireless systems designed in the 1990s, the ADC/ DACs we
AN0021: Analog to Digital Converter (ADC) This application note describes how to use the Analog to Digital Converter (ADC) of EFM32 Gecko Series 0 and 1 devices to con-vert an analog input voltage to a digital value. Many aspects of . Automated clock gating to save power when not convertingFile Size: 470KB
There are mainly four types dc-dc converters: buck converter, boost converter, buck-boost converter, and flyback converter. The function of buck converter is to step down the input voltage. The function of boost converter, on the other hand, is to step up the input voltage. The function of buck-boost combines the functions of both buck converter
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