The Engineering, Design, And Fabrication Facility: A .
H. K. CHARLES, JR.,ANDJ. A. WEINERThe Engineering, Design, and Fabrication Facility:A Unique APL ResourceHarry K. Charles, Jr., and Joel A. WeinerThe Engineering, Design, and Fabrication (EDF) Facility is a unique resourceproviding a wide range of development, engineering, design, fabrication, and testingservices for APL and its external customers. The facility consists of modern laboratoriesand specialized equipment and processes. It is staffed by skilled engineers, scientists,technicians, and craftspeople, all dedicated to the production of high-quality electronic,electromechanical, and mechanical hardware. The EDF is a flexible, dynamic resourcethat responds rapidly to customer needs in both traditional and new business arenas.With its technology and personnel, the EDF is poised to deliver advanced services andhardware for many years to come. (Keywords: Electronic services, Engineering design,Fabrication, Hardware, Mechanical and material services, Prototyping.)INTRODUCTIONThe Engineering, Design, and Fabrication Facility(EDF) of the Technical Services Department (TSD) isan integrated Laboratory resource for the development,design, fabrication, testing, and qualification of prototype, one-of-a-kind, and limited-quantity advancedelectronic, electromechanical, and mechanical hardware. The facility consists of extensive equipment andlaboratory resources, coupled with the expertise ofskilled scientists, engineers, technicians, and craftspeople. It also maintains almost 200 standard processes andprocedures that capture detailed design and fabricationknowledge to facilitate project documentation andtechnology transfer. These resources reside primarily inTSD’s Electronic Services Group (TSE) and Mechanical Services Group (TSM); additional support comes478from the Department’s computer and information systems services (especially computer-aided engineering)and fiscal administration. The groups are functionallyaligned, with a minimum of overlap and service duplication. Figure 1 illustrates the major facility capabilitiesand service functions. Further details of EDF servicescan be found in articles by Hider et al. and Wilson etal., this issue, and Ref. 1.By charter, EDF staff maintain a working knowledgeof modern engineering, design, fabrication, and testingmethods to serve as the Laboratory’s principal resourcefor manufactured hardware. This expertise is a key element in APL’s ability to transfer technical hardwareknowledge to industrial partners. Particularly notablesuccesses in this area have been the Transit2 and Aegis3JOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 21, NUMBER 4 (2000)
THE ENGINEERING, DESIGN, AND FABRICATION FACILITYWhen the requirements of ourcustomers exceed EDF’s capacity/Mechanical Servicescapabilities, staff members canMachiningSheet metalhelp them obtain services throughRapid prototypingoff-site blanket contracts withMechanical designStress and thermaltrusted, high-quality suppliers (deanalysisTensilePro/QC/QAsign, board fabrication, machining,testingComputer andEngineer,APL QA PlanInformation Servicesetc.plating, and others) or by directingMetrologyComputer systemsDocumentationthem to other experts or resources.SEM,Library partsStandard practicesFEA MaterialsNDEWork flow monitoringBy providing this service, the EDFConfiguration controlCAE/CADPWBISO 9000Mentoris able to save APL clients neededcrosstools,sectionstime and effort in developing theiretc.Electronic Serviceshardware applications.Electronic packagingEDF (and its predecessor organiIC design and testzations6,7) has supplied many thouElectronic assemblyDesign and layoutsands of hours of service a year forBoard and substratefabricationmore than three decades. Ourprojects range from simple repairs,parts fabrication, and assembly inFigure 1. Major EDF capabilities and services. The overlapping regions indicate thevolving a few hours to majorclose relationship and integrated nature of the entire spectrum of activities performed bythe facility. (CAE computer-aided engineering, CAD computer-aided design,projects entailing tens to hundredsFEA finite-element analysis, IC integrated circuit, NDE nondestructive evaluation,of thousands of hours (Fig. 2).PWB printed wiring board, QA quality assurance, QC quality control, SEM scanningExamples of recent major projectselectron microscopy.)include NEAR8 ( 106,000 h or725 staff months) and TIMED9( 150,000 h or 1026 staff months).programs, as well as several biomedical device developExcept for extremely small projects, which are usuallyment efforts, including an ingestible thermal monitoringhandled by a particular EDF group or involve only a fewpill4 used by Senator John Glenn in his 1998 space flight.people, projects ordinarily call on multiple EDF resources that transcend group boundaries and use the fullSimilarly, because of its expertise in industrial practices,gamut of the facility’s services (Fig. 1). A typical projectEDF facilitates the transfer of industrial methods towill comprise several key elements: engineering, design,APL’s government sponsors and has been called upon onand analysis support; package engineering and layoutoccasion to rescue outside designs and fabricated proddesign; electrical and mechanical fabrication; electronicucts that do not meet APL or government requirements.and physical testing; and quality control and assuranceSupport of a given program or project begins when(including work flow tracking, ISO 9000 compliance,a potential customer (either internal or external) meetsand equipment calibration). Each of these service elewith an EDF staff member to discuss a hardware productments is described in the following sections, whichor service. Each staff member (more than 130) is familinclude examples from current and past EDF projects.iar with all EDF service and product areas and canWe emphasize not only the products and services prodirect the customer to the appropriate group or personvided, but also the project planning, estimation, andfor further assistance. Each group in the EDF has a workwork flow tracking support available in the EDF, alongflow administrator as well as essential engineering prowith developments and improvements made possible byfessionals who can help customers define their requireAPL funding through the Technical Facilities Pool.ments in relationship to the services offered. At thisstage, EDF staff can also provide a preliminary assessment of task complexity, initial cost, and schedule tothe prospective client.ENGINEERING, DESIGN, ANDThe EDF operates on a direct charge basis (like theANALYSIS SUPPORTrest of the Laboratory) that bills the customer for thedirect labor charges, materials, and facility overhead.The full range of EDF engineering development,The EDF overhead rate is comparable to those arounddesign, and analysis services encompasses electrical,the Laboratory, running in the 90 to 100% range, demechanical, materials, and chemical engineering. Ourpending on the yearly business base. Special materialselectrical engineers have participated in all majorand supplies that are charged directly to the customer’sAPL electronic system development projects, includingaccount are billed at cost. (References 1 and 5 containdigital, analog, and microwave electronics. A curfurther details on doing business with the EDF.)rent example of our electrical engineering expertiseJOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 21, NUMBER 4 (2000)479
H. K. CHARLES, JR.,ANDJ. A. WEINERmultilayer technology has beenused to package some of the dens(a)(b)est APL-produced circuitry toPPSD7.9%date. The role of such dense, highRTDC4.2%( 100K to8.9%SSD 500K)chip count modules, called multi6.5%chip modules (MCMs),13 is exSTDpected to increase.10.3%Other15.9%(BISD/HRSD/CLO)( 25K to 100K)Building MCMs, because of15.9%38.8%( 5K)their large population of denselyplaced chips, requires a great emTSDphasis on chip reliability to ensureSD24.3%20.1%module yield. Figure 5 presents the36.0%( 5K to 25K)yield of an MCM containing twoADSD9.8%different chip types (Type 1 andType 2) as a function of the knowngood die (KGD) probabilities.14(c)Here, module total cost is comparedSTDTSD6%for the “no repair” case and a “singleSSD14%6%repair” with increasing complexity.It is clear from the sequence shownthat repair capability is key to improving the yield and lowering theADSDcost of high-density MCMs. The24%SD37%EDF has developed several repairmethodologies for its MCM technology. Besides these thin film deOtherposited MCMs (MCM-D), others,8%e.g., MCM-Cs (ceramic-based) andMCM-Ls (laminate-based), havePPSDRTDC2%been described elsewhere.153%In addition to the ingestible pill4Figure 2. Distribution of customer-supported work for FY99 in the EDF. (a) Percentagenoted earlier, our engineers haveof projects by department. (b) Percentage of projects by dollar value. (Note that almost 75%supported several other APL bioof EDF’s projects are at the 25,000 level or less.) (c) Percentage of dollar expendituresby department. (APL department designations: ADSD Air Defense Systems,medical initiatives, including anBISD Business and Information Services, CLO Director’s Office, HRSD Humaninfrared sensing system for the blindResources and Services, PPSD Power Projection Systems, RTDC Research and(IRIIS16), a virtual reality goggleTechnology Development, SD Space, SSD Strategic Systems, STD SubmarineTechnology, TSD Technical Services.)projection system for the JohnsHopkins Medical Institution andHonda Motor Company, advancedthree-dimensional bone modeling to study osteoporosis(Fig. 3) is the Digital Multibeam Steering (DIMUS)and injury, intravascular magnetic resonance imagingchip, a custom-designed integrated circuit (IC) for acoils,17 and a dual-energy X-ray densitometer18 to meadigital multibeam sonar beamformer (steering ele10ment). This chip contains approximately 2 millionsure bone and muscle loss in space. For these efforts,EDF personnel have performed a full range of engineertransistors and is about 3.5 cm2. A DIMUS chip, whening development and design services along with fabriintegrated with nine others on a single printed wiringcation and system evaluation. Other EDF engineeringboard (PWB), replaces an entire floor-standing rack ofactivities have provided design and analysis for adelectronic equipment in APL’s Trident Sonar Processorvanced APL projects such as the Cryogenic CrossbarAnalyzer (TSPAN) System.11Switch,19 chip-on-board (COB) packaging,20 the palmFigure 4 illustrates our thin film multilayer technology. This high-density substrate technology uses a silsized Command and Data Handling System,20 etc.icon carrier coated with multiple layers of copper metElectrical simulation models and thermal (temperallization (with chromium adhesion layers) andature) and associated thermomechanical (stress/strain)polyimide interlayer dielectrics. The technology is camodels are fundamental to the development of adpable of trace densities12 approaching 200 cm/cm2. Atvanced electronic and mechanical systems for space,underwater, and biomedical applications. A typicalthese densities approximately 1 mile of circuit trackelectrical simulation model (SPICE Equivalent) and itscould be placed in a 25 25 cm space. Thin film0.5%0.9%( 500K to ( 1M) 1M)480JOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 21, NUMBER 4 (2000)
THE ENGINEERING, DESIGN, AND FABRICATION FACILITY121 lead pingrid array packageRing capacitorsFigure 3. DIMUS IC chip custom-designed in the EDF. DIMUSuses CMOS technology and was designed with APL’s MAGIC,IRSIM, and ModelSim software and fabricated through theMOSIS network. It contains 2 million transistors and uses 0.8- mdesign rules.(a)Figure 4. Thin film multilayer MCM. The substrate was fabricated using EDF’s copper/polyimide MCM-D technology. It isabout 13 cm2 and contains three buried layers of circuitry. Theassembled unit has 16 chips and over 1200 wirebonds.(b)30Total cost ( K)Total cost ( K)301500.9KGD00.91.0probability Type 11.0 0.9abiprobKGD2ypelity T(c)KGD1.0probability TyTy1.0 0.9ilitybaborppe 1KGDpe 2(d)30Total cost ( K)30Total cost ( K)151500.9KGD1501.0probability Type 11.0 0.9KGobaD prbilityType 21.00.9KGDprobability Tyty1.0 0.9abiliprobpe 1DKGType 2Figure 5. MCM cost as a function of known good die (KGD) for a dual-chip population under conditions of no repair (a) and single repairof low (b), medium (c), and high (d) complexity.JOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 21, NUMBER 4 (2000)481
H. K. CHARLES, JR.,ANDJ. A. WEINERresults are shown in Fig. 6. Figure 7 shows thermalcontours and vibration amplitude for the Global Positioning System (GPS) Full Signal Translator Modulecircuit board due to temperature increases of the individual components. The EDF’s thermal stress analysiscapability has furnished design and fabrication guidelines for a wide range of electronic, electromechanical,and mechanical hardware. Figure 8 presents the resultsof a finite-element analysis performed on a TIMEDspacecraft packaging component.PACKAGE ENGINEERING ANDLAYOUT DESIGNThe EDF has a long history of providing innovative package design and detailed layout support for avariety of APL programs. Our packaging engineersand layout designers use modern, advanced engineering workstations coupled with specialized softwaretools to yield the drawings and electronic files necessary to drive automated manufacturing ted power (S21)–600812Frequency (GHz)16(e)0–10Near-end noise (S23)–20–30Far-end noise (S53)–40–50–6004812Frequency (GHz)16201.0Incident reflected0.80.60.4Transmitted0.205020Noise amplitude (V)Magnitude (dB)(d)41.2Signal amplitude (V)Magnitude (dB)Transmitted power (S11)100150200250Time (ps)3003504000.040Near-end noise0.0300.0200.010Far-end noise0100150200250Time (ps)300350400Figure 6. High-speed stripline cables to MCM-soldered interconnection. (a) Physical layout (dimensions in mils; ports labeled 1 to 6).(b) S-parameter data for cable to MCM-soldered interconnection. (c) Signal transmission/reflection analysis (9% reflected noise).(d) Cross-talk analysis S-parameter data for coupled three-line model for cable to MCM-soldered interconnection. (e) Cross-talk noiseanalysis (3.7% near-end noise, 1% far-end noise).482JOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 21, NUMBER 4 (2000)
THE ENGINEERING, DESIGN, AND FABRICATION FACILITY(a)(a)Temperature ( actDirection ofapplied loadPrintedcircuitboardSolder joint(b)(b)F 20 grams-forceVon Mises stress(MPa)One-half symmetrymodel ofsurface-mountedconnector receptaclecontactFigure 7. Analysis of the GPS Full Signal TranslatorModule chassis. (a) Constant temperature (isothermal) contours.(b) Dominant vibrational mode.(photoplotters, board testers, numerically controlledmachine tools, etc.).The EDF provides APL electrical engineers with adiverse set of design automation tools for use withCOB, MCMs, application-specific ICs (ASICs), fieldprogrammable gate arrays (FPGAs), and PWBs. Mostof these tools are supplied by Mentor Graphics and cansupport both traditional schematic capture and themore recent hardware descriptive language (HDL)approach to design creation. The schematic entrymethod still accounts for almost 100% of the PWBdesign work, although APL engineers have begun toembrace HDL for their FPGA and ASIC designs.An important aspect of any computer-aided design isthe ability to simulate the functionality and timing ofa design before building the hardware. We performed theservice, for each of the circuit application types mentioned, with Mentor Graphics Software tools (AccuSim,QuickSim, ModelSim, H-Spice, and Continuum).These tools not only provide specific simulators forhomogeneous applications (e.g., all analog, all digital,etc.), but can also be combined on a single design usingthe Continuum Back Plane Mixed Signal Simulationkernel, thereby simultaneously simulating a mixed analog, digital, and HDL design.Key to the effective use of design automation toolsat APL is a standardized parts library. The EDF now ximum Von Mises stressin solder joint ( 7 MPa)Figure 8. Finite-element analysis of a Minitek surface-mountconnector used on the TIMED spacecraft. (a) One-half symmetryfinite-element model of a single Minitek surface-mount receptaclecontact. (b) Von Mises stress contours for the Minitek connector.over 10,000 parts in its Mentor library. Each part defined in the library contains our in-house design rulesfor fabrication and assembly, and includes a schematicsymbol and board geometry. The library covers a widevariety of part types, including specific ASIC libraryelements that can be directly linked to the MOSISfoundries through Mentor’s Higher Education Program.As circuit designs embrace the latest in IC technology,the EDF will continue to maintain the library and buildnew library parts as an important service to the Laboratory’s engineering community.Access to the library is gained through a simplemenu structure. The library is divided by circuit function, i.e., resistors are in the resistor menu, ICs in theIC menu, etc. In addition, the EDF provides simulationmodels for many of the library parts. Through an annualsubscription contract, we can access (in addition to ourown models) over 13,000 digital simulation models. Wealso make a Mentor Graphics analog simulation libraryavailable for customer use.Recently, the EDF has acquired a microelectromechanical systems (MEMS)21 software package developed by Mentor Graphics. This allows direct supportJOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 21, NUMBER 4 (2000)483
H. K. CHARLES, JR.,ANDJ. A. WEINERof the Laboratory’s MEMS efforts and provides asmooth interface with the Defense Advanced ResearchProjects Agency–subsidized MEMS foundry at theMicroelectronics Center of North Carolina. The package includes a component library consisting of simulation models and layout generators for inertial sensors,actuators, optical devices, radio-frequency devices (RFMEMS), display devices, and test structures.The EDF maintains an on-site environmentally controlled Class A Halon-protected drawing vault thatcontains tens of thousands of engineering drawingsdating back to the 1970s. In addition to paper drawings,we have tape archives, i.e., CAE system backups andaperture cards (microfilm-like copies of each drawing),for each design. Hand-drawn and/or written forms suchas drawing change notices are scanned and added to thearchives along with the drawings they reference.Since 1994, we have accomplished the online archival storage (and retrieval) of design information anddatabases using a product data management (PDM)tool. The PDM product currently being used isMetaphase by SDRC. It contains data for over 11,000drawings and over 1700 drawing change notices andengineering change requests. The data are available byaccessing a CD-ROM jukebox that now holds 34 CDswith over 13 GB of data. The PDM has been configuredto facilitate the drawing sign-off/approval for all drawing configuration levels (1, 2a, 2, and 3). The PDMproduct resides on an HP UNIX server and has anOracle database engine. Over 40 users (mostly engineers and designers) routinely access the PDM eitherdirectly from a UNIX workstation or from a PC runningan X-server package. PDM users can acquire report datavia an APL internal Web browser. Drawings and othergraphical attachments are in HDGL or TIFF format andcan be viewed with a readily available plug-in.The EDF has a documented system for the rapidprototyping of PWBs. Depending on design complexity,as determined by component density and number ofboard layers, different software tools are used in therapid prototyping process. Pantheon Intercept softwareis used to create parts and perform the layout androuting of simple-to-medium complexity designs. Mentor tools are used for more complex designs. A welldefined path through design, fabrication, and assemblyhas been established to provide contingencies for delaysat any step. The process has been employed successfullyon several Level 1 designs. Typical turnaround timeshave been on the order of 1 week.On the mechanical side, the major piece of designsoftware is Pro/Engineer developed by Parametric Technologies, Inc. Pro/E, as it is commonly called, is aninteractive tool based on parametric design methods.For example, instead of indicating the dimensions of abox as 10 cm in length (l), 5 cm in width (w), and 150cm in height (h), the box dimensions are described as484an analytic expression (e.g., lwh). The expression canbe composed of independent variables (such as l, w, orh), or one or more of the variables can be dependenton other variables being used to define the measurements of other objects in the design (e.g., the boxlength is equal to twice its width). This parametricapproach results in an increased emphasis on the creation of a model of the design rather than a drawingof the design. The drawings are then simply the outputproducts of the model. Until the model or parametricrelationships are changed, the model remains invariantunder scaling. Thus, a change in an input (independent) dimension will change the output drawings toreflect the dimensional change, but the model willremain the same.Pro/E can check for interference and can also calculate the weight (based on the density of the constituentmaterials) and center of gravity of the set of objectscomprising a design. A clipping feature allows a modelto be cross-sectioned at any depth, which enables theengineer or designer to better understand the relationships of objects within the design. In addition to drawings, Pro/E is capable of outputing databases that can beused directly by EDF’s numerically controlled machinetools. This allows for the unattended fabrication ofintricate mechanical parts, composite-resin rapid prototypes, and complex sheet metal assemblies.ELECTRICAL AND MECHANICALFABRICATIONEDF’s electrical and electronic fabrication facilitiesare located in Building 13 (the Steven Muller Centerfor Advanced Technology). They include our certifiedPWB fabrication line (certified to MIL-PRF-55110Fand MIL-P-50884, Type 3 (GI Material) and Type 4(adhesiveless)) and Class 1,000 clean rooms22 used tofabricate and assemble microelectronic devices andmodules such as the large, multilayer, high-densityPWB produced for the TRIAGE Program shown inFig. 9. The MCM substrate shown in Fig. 4 is a recentexample of our microelectronic activity.Recent EDF work on fine-line boards with blind andstaggered vias for COB applications20 is illustrated inFig. 10. COB can potentially miniaturize APL systemsby a factor of 10 to 100. Examples of a COB implementation of a standard spacecraft electronics box areshown in Fig. 11. Essential to making the COB processwork was EDF’s development of a neutral pH autocatalytic gold plating solution, along with associated processing methods.23Other advanced board development efforts have involved the use of electro-optic–sensitive polymers suchas the dielectric layers in MCMs. These layers can beprobed nondestructively using a laser. Laser mapping ofthe electric fields within the dielectric layers adjacent toJOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 21, NUMBER 4 (2000)
THE ENGINEERING, DESIGN, AND FABRICATION FACILITYFigure 10. COB substrate containing blind and staggered vias.This 12.3 12.3 cm board is being used for the palm-sizedCommand and Data Handling System.19Figure 9. High-density PWB developed for the TRIAGE Program. This radar data collection board contains 10 circuit layers,4883 vias, and 422 components, with 6052 internal componentconnections and 624 input/output pins. This single board replacedthe five boards used in a previous system.use and support myriad one-of-a-kind experiments conducted by our scientists and engineers, both at the Laboratory and off-site.Mechanical fabrication is performed with advancedmachine tool equipment located in Buildings 14, 39,and 41. This equipment includes computer-numerically-controlled (CNC) lathes, mills, turning centers, andsheet metal punches. Three CNC electrical dischargemachine tools, plus both carbon dioxide26 and Nd:YAGlasers (in Bldg. 13), are the heart of EDF’s advancedcontactless machining activity.device structures of interest can be made. This APLinvention offers great promise for testing complex electronic structures.24 The polymer material is made electrooptic by doping and selective poling (application of astrong electric field while material iscured). Thus, regions of doped andunpoled material can be made adjacent to doped and poled material. Asthere is an index change in thedoped material upon poling, integrallight guides can be made selectivelyin the dielectric layers. These APLdeveloped techniques,25 therefore,offer the potential for integral lightguides in MCM dielectrics alongwith the ability to nondestructivelyevaluate module performance.In addition to advanced-performance circuits and boards forhigh-reliability spaceflight use, EDF’selectronic fabrication facilities create a large volume of more convenFigure 11. COB implementation of the NEAR Command/Telemetry Processor (24 24tional electronics. These are in 17 cm, 5 kg) compared with the palm-sized Command and Data Handling System (11tended for ground and shipboard 11 5 cm, 0.5 kg).JOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 21, NUMBER 4 (2000)485
H. K. CHARLES, JR.,ANDJ. A. WEINERA computer-controlled rapid prototype machine isalso available. It is capable of making realistic (dimensionally accurate) three-dimensional polymer replicasfrom files downloaded from our CAE systems. Examplesof rapid prototype–produced replicas are shown in Fig.12. EDF’s organic composite fabrication activities arehoused in Building 14. Further description of our composite work is given by Wilson et al., this issue.Fabrication involves more than just the manufactureof advanced electrical and mechanical parts and systems.It also involves the application of the tools normallyassociated with hardware fabrication to support otheraspects of APL’s scientific and engineering activities. Forexample, EDF’s photolithographic resources have beenused to pattern gratings for optical experiments, sensorsfor biomedical and ocean physics applications, and thinfilms for basic research. Our carbon dioxide laser machine tool26 has been employed in material ablationstudies and for novel pattern generation in unconventional materials. It has also served as a heat source formaterial alloying. The rapid prototyping system has beenused to fabricate real parts (not just models or replicas)in short-duration experimental situations. Such innovative use of standard production tools, necessary for APL’sand EDF’s mainstream hardware production, gives APLa flexible resource to augment its research facilities inother parts of the Laboratory.Our expertise in the fabrication of hardware is achief element that distinguishes the Laboratory frommany other research and development centers. Thishands-on hardware development resource of the EDFhelps form APL’s internationally known systems engineering capability.ELECTRONIC AND PHYSICALEVALUATIONThe EDF offers a wide range of electronic and physical testing services. Our electronic test equipment canperform exacting electrical tests for analog, digital, andmicrowave circuits. Components and circuits can betested from DC to 50 GHz. This allows us to verifymanufacturers’ published data sheets, provide deviceand subsystem data not available from manufacturers,and evaluate “edge-of-the-envelope” parameters whencommercial-grade parts are pushed beyond their published limits. Tools and expertise in the EDF enable usto execute extensive DC parametric tests on devices.For example, leakage current values can be validatedor the variation of leakage current with respect tosupply voltage can be measured. In addition, transistorcharacteristic curves can be generated for all devicetypes (bipolars, field-effect transistors, power transistors, hetero junction bipolar transistors, etc.).We can also perform AC characterization of components of frequencies from a few millihertz to 50 GHzusing vector network analyzers. Spectral analysis capability up to 26.5 GHz is currently available, with plansto upgrade to 50 GHz. These measurements are used tocharacterize passive and active circuit components,subsystems, and materials for frequency, time, phase, and noise parameters. The EDF specializes in(i)the design and fabrication of cus(a)(d)tom test fixtures and the use of automated testing equipment andmethods to greatly speed the testing process and eliminate operatorbiases and errors. Over the last few(l)years, these methods have been(e)used on a variety of APL programs,(j)(b)including CASSINI, MSX, NEAR,ACE, and TIMED.Virtually every electronic de(k)(f)vice—whether a printed circuit as(m)(c)sembly, an MCM, or a custom IC—involves a substrate onto which one(g)or more components are attached.(h)(h)This substrate contains conductivetraces that interconnect the deviceto other circuit elements on theFigure 12. Rapid prototype replicas produced by an EDF automated polymer castingboard as well as interface it withmachine. (a) TIMED Doppler Interferometer telescope mount. (b) Model of 443 Erospower supplies and adjacent modasteroid. (c) Impeller thruster. (d) Speaker-mount for Primate Vocalization Program. (e)Planetary gear. (f) Clamp for Primate Vocalization Program. (g) Gridded array. (h)ules in the system. Depending onTransmitter boxes for Primate Vocalization Program. (i) SCAMP pod faring. (j) Videothe application and design, the subdisplay chip mount/virtual reality helmet. (k) TIMED solar array bracket. (l) Mach 6strate will take many forms. It maysupersonic nozzle for dual-combustor ramjet. (m) Impeller.486JOHNS HOPK
H.K.CHARLES,JR.,ANDJ.A.WEINER 478JOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 21,NUMBER 4 (2000) T The Engineering, Design, and Fabrication Facility: A Unique APL Resource Harry K. Charl
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