Micron Serial NOR Flash Memory

128Mb, 1.8V Multiple I/O Serial Flash MemoryFeaturesMicron Serial NOR Flash Memory1.8V, Multiple I/O, 4KB, 32KB, 64KB, Sector EraseMT25QU128ABAFeaturesOptions Voltage– 1.7–2.0V Density– 128Mb Device stacking– Monolithic Device generation Die revision Pin configuration– RESET# and HOLD# Sector Size– 64KB Packages – JEDEC-standard, RoHScompliant– 24-ball T-PBGA, 05/6mm x 8mm (5 x5 array)– 24-ball T-PBGA 05/6mm x 8mm (4 x6 array)– Wafer level chip-scale package,15balls , 9 active balls (XFWLBGA 0.5P)– 8-pin SOP2, 208 mils body width(SO8W)– 16-pin SOP2, 300 mils body width(SO16W)– W-PDFN-8 6mm x 5mm (MLP8 6mmx 5mm)– W-PDFN-8 8mm x 6mm (MLP8 8mmx 6mm) Standard security Special options– Standard– Automotive Operating temperature range– From –40 C to 85 C– From –40 C to 105 C SPI-compatible serial bus interface Single and double transfer rate (STR/DTR) Clock frequency– 166 MHz (MAX) for all protocols in STR– 90 MHz (MAX) for all protocols in DTR Dual/quad I/O commands for increased throughput up to 90 MB/s Supported protocols in both STR and DTR– Extended I/O protocol– Dual I/O protocol– Quad I/O protocol Execute-in-place (XIP) PROGRAM/ERASE SUSPEND operations Volatile and nonvolatile configuration settings Software reset Additional reset pin for selected part numbers Dedicated 64-byte OTP area outside main memory– Readable and user-lockable– Permanent lock with PROGRAM OTP command Erase capability– Bulk erase– Sector erase 64KB uniform granularity– Subsector erase 4KB, 32KB granularity Security and write protection– Volatile and nonvolatile locking and softwarewrite protection for each 64KB sector– Nonvolatile configuration locking– Password protection– Hardware write protection: nonvolatile bits(BP[3:0] and TB) define protected area size– Program/erase protection during power-up– CRC detects accidental changes to raw data Electronic signature– JEDEC-standard 3-byte signature (BB18h)– Extended device ID: two additional bytes identifydevice factory options JESD47H-compliant– Minimum 100,000 ERASE cycles per sector– Data retention: 20 years (TYP)CCMTD-1725822587-10224mt25q qlhs U 128 ABA xxT.pdf - Rev. J 05/18 EN1MarkingU128ABA8E121454SESFW7W90SAITATMicron Technology, Inc. reserves the right to change products or specifications without notice. 2014 Micron Technology, Inc. All rights reserved.Products and specifications discussed herein are subject to change by Micron without notice.

128Mb, 1.8V Multiple I/O Serial Flash MemoryFeaturesPart Number OrderingMicron Serial NOR Flash devices are available in different configurations and densities. Verify valid part numbersby using Micron’s part catalog search at www.micron.com. To compare features and specifications by device type,visit www.micron.com/products. Contact the factory for devices not found.Figure 1: Part Number Ordering InformationMT 25Q LxxxABA1ESF - 0ITESProduction StatusBlank ProductionES Engineering samplesQS Qualification samplesMicron TechnologyPart Family25Q SPI NOROperating TemperatureIT –40 C to 85 CAT –40 C to 105 CUT –40 C to 125 CVoltageL 2.7–3.6VU 1.7–2.0VDensity064 64Mb (8MB)128 128Mb (16MB)256 256Mb (32MB)512 512Mb (64MB)01G 1Gb (128MB)02G 2Gb (256MB)Special OptionsS StandardA Automotive grade AEC-Q100Security Features0 Standard default securityStackA 1 die/1 S#B 2 die/1 S#C 4 die/1 S#Package Codes12 24-ball T-PBGA, 05/6 x 8mm (5 x 5 array)14 24-ball T-PBGA, 05/6 x 8mm (4 x 6 array)SC 8-pin SOP2, 150 milsSE 8-pin SOP2, 208 milsSF 16-pin SOP2, 300 milsW7 8-pin W-PDFN, 6 x 5mmW9 8-pin W-PDFN, 8 x 6mm5x WLCSP package1Device GenerationB 2nd generationDie RevisionA Rev. AB Rev. BSector sizeE 64KB sectors, 4KB and 32KB subsectorsPin Configuration Option1 HOLD# pin3 RESET# pin8 RESET# and HOLD# pinNote:S1. WLCSP package codes, package size, andavailability are density-specific. Contact thefactory for availability.CCMTD-1725822587-10224mt25q qlhs U 128 ABA xxT.pdf - Rev. J 05/18 EN2Micron Technology, Inc. reserves the right to change products or specifications without notice. 2014 Micron Technology, Inc. All rights reserved.

128Mb, 1.8V Multiple I/O Serial Flash MemoryFeaturesContentsImportant Notes and Warnings . 8Device Description . 9Device Logic Diagram . 10Advanced Security Protection . 10Signal Assignments – Package Code: 12 . 11Signal Assignments – Package Code: 14 . 12Signal Assignments – Package Code: 54 . 13Signal Assignments – Package Code: SE, W7, W9 . 14Signal Assignments – Package Code: SF . 14Signal Descriptions . 16Package Dimensions – Package Code: 12 . 17Package Dimensions – Package Code: 14 . 19Package Dimensions – Package Code: 54 . 20Package Dimensions – Package Code: SE . 21Package Dimensions – Package Code: SF . 22Package Dimensions – Package Code: W7 . 23Package Dimensions – Package Code: W9 . 24Memory Map – 128Mb Density . 25Status Register . 26Block Protection Settings . 27Flag Status Register . 28Internal Configuration Register . 29Nonvolatile Configuration Register . 30Volatile Configuration Register . 31Supported Clock Frequencies . 32Enhanced Volatile Configuration Register . 34Security Registers . 35Sector Protection Security Register . 36Nonvolatile and Volatile Sector Lock Bits Security . 37Volatile Lock Bit Security Register . 37Device ID Data . 38Serial Flash Discovery Parameter Data . 39Command Definitions . 40Software RESET Operations . 45RESET ENABLE and RESET MEMORY Commands . 45READ ID Operations . 46READ ID and MULTIPLE I/O READ ID Commands . 46READ SERIAL FLASH DISCOVERY PARAMETER Operation . 47READ SERIAL FLASH DISCOVERY PARAMETER Command . 47READ MEMORY Operations . 48READ MEMORY Operations Timings . 48WRITE ENABLE/DISABLE Operations . 55READ REGISTER Operations . 56WRITE REGISTER Operations . 57CLEAR FLAG STATUS REGISTER Operation . 59PROGRAM Operations . 60PROGRAM Operations Timings . 61ERASE Operations . 64SUSPEND/RESUME Operations . 66PROGRAM/ERASE SUSPEND Operations . 66CCMTD-1725822587-10224mt25q qlhs U 128 ABA xxT.pdf - Rev. J 05/18 EN3Micron Technology, Inc. reserves the right to change products or specifications without notice. 2014 Micron Technology, Inc. All rights reserved.

128Mb, 1.8V Multiple I/O Serial Flash MemoryFeaturesPROGRAM/ERASE RESUME Operations .ONE-TIME PROGRAMMABLE Operations .READ OTP ARRAY Command .PROGRAM OTP ARRAY Command .DEEP POWER-DOWN Operations .ENTER DEEP POWER-DOWN Command .RELEASE FROM DEEP POWER-DOWN Command .DEEP POWER-DOWN Timings .QUAD PROTOCOL Operations .ENTER or RESET QUAD INPUT/OUTPUT MODE Command .CYCLIC REDUNDANCY CHECK Operations .State Table .XIP Mode .Activate and Terminate XIP Using Volatile Configuration Register .Activate and Terminate XIP Using Nonvolatile Configuration Register .Confirmation Bit Settings Required to Activate or Terminate XIP .Terminating XIP After a Controller and Memory Reset .Power-Up and Power-Down .Power-Up and Power-Down Requirements .Active, Standby, and Deep Power-Down Modes .Power Loss and Interface Rescue .Recovery .Power Loss Recovery .Interface Rescue .Initial Delivery Status .Absolute Ratings and Operating Conditions .DC Characteristics and Operating Conditions .AC Characteristics and Operating Conditions .AC Reset Specifications .Program/Erase Specifications .Revision History .Rev. J – 05/18 .Rev. I – 05/17 .Rev. H – 07/16 .Rev. G – 06/16 .Rev. F – 12/15 .Rev. E – 10/15 .Rev. D – 9/15 .Rev. C – 7/15 .Rev. B – 7/14 .Rev. A – 3/14 .CCMTD-1725822587-10224mt25q qlhs U 128 ABA xxT.pdf - Rev. J 05/18 28283858789939494949494949494959595Micron Technology, Inc. reserves the right to change products or specifications without notice. 2014 Micron Technology, Inc. All rights reserved.

128Mb, 1.8V Multiple I/O Serial Flash MemoryFeaturesList of FiguresFigure 1: Part Number Ordering Information . 2Figure 2: Block Diagram . 9Figure 3: Logic Diagram . 10Figure 4: 24-Ball T-BGA, 5 x 5 (Balls Down) . 11Figure 5: 24-Ball TBGA, 4 x 6 (Balls Down) . 12Figure 6: 15-Ball XFWLBGA (Top View) . 13Figure 7: 8-Pin, SOP2 or W-PDFN (Top View) . 14Figure 8: 16-Pin, Plastic Small Outline – SO16 (Top View) . 14Figure 9: 24-Ball T-PBGA (5 x 5 ball grid array) – 6mm x 8mm . 17Figure 10: 24-Ball T-PBGA (24b05) – 6mm x 8mm . 19Figure 11: 15-Ball XFWLBGA . 20Figure 12: 8-Pin SOP2 (SO8W) – 208 Mils Body Width . 21Figure 13: 16-Pin SOP2 – 300 Mils Body Width . 22Figure 14: W-PDFN-8 (MLP8) – 6mm x 5mm . 23Figure 15: W-PDFN-8 (MLP8) – 8mm x 6mm . 24Figure 16: Internal Configuration Register . 29Figure 17: Sector and Password Protection . 35Figure 18: RESET ENABLE and RESET MEMORY Command . 45Figure 19: READ ID and MULTIPLE I/O READ ID Commands . 46Figure 20: READ SERIAL FLASH DISCOVERY PARAMETER Command – 5Ah . 47Figure 21: READ – 03h . 48Figure 22: FAST READ – 0Bh . 49Figure 23: DUAL OUTPUT FAST READ – 3Bh . 49Figure 24: DUAL INPUT/OUTPUT FAST READ – BBh . 50Figure 25: QUAD OUTPUT FAST READ – 6Bh . 50Figure 26: QUAD INPUT/OUTPUT FAST READ – EBh . 51Figure 27: QUAD INPUT/OUTPUT WORD READ – E7h . 51Figure 28: DTR FAST READ – 0Dh . 52Figure 29: DTR DUAL OUTPUT FAST READ – 3Dh . 52Figure 30: DTR DUAL INPUT/OUTPUT FAST READ – BDh . 53Figure 31: DTR QUAD OUTPUT FAST READ – 6Dh . 53Figure 32: DTR QUAD INPUT/OUTPUT FAST READ – EDh . 54Figure 33: WRITE ENABLE and WRITE DISABLE Timing . 55Figure 34: READ REGISTER Timing . 56Figure 35: WRITE REGISTER Timing . 58Figure 36: CLEAR FLAG STATUS REGISTER Timing . 59Figure 37: PAGE PROGRAM Command . 61Figure 38: DUAL INPUT FAST PROGRAM Command . 62Figure 39: EXTENDED DUAL INPUT FAST PROGRAM Command . 62Figure 40: QUAD INPUT FAST PROGRAM Command . 63Figure 41: EXTENDED QUAD INPUT FAST PROGRAM Command . 63Figure 42: SUBSECTOR and SECTOR ERASE Timing . 65Figure 43: BULK ERASE Timing . 65Figure 44: PROGRAM/ERASE SUSPEND and RESUME Timing . 67Figure 45: READ OTP ARRAY Command Timing . 68Figure 46: PROGRAM OTP Command Timing . 69Figure 47: ENTER DEEP POWER-DOWN Timing . 71Figure 48: RELEASE FROM DEEP POWER-DOWN Timing . 72Figure 49: XIP Mode Directly After Power-On . 77Figure 50: Power-Up Timing . 80CCMTD-1725822587-10224mt25q qlhs U 128 ABA xxT.pdf - Rev. J 05/18 EN5Micron Technology, Inc. reserves the right to change products or specifications without notice. 2014 Micron Technology, Inc. All rights reserved.

128Mb, 1.8V Multiple I/O Serial Flash MemoryFeaturesFigure 51:Figure 52:Figure 53:Figure 54:Figure 55:Figure 56:Figure 57:Figure 58:Figure 59:AC Timing Input/Output Reference Levels .Reset AC Timing During PROGRAM and ERASE Cycle .Reset Enable and Reset Memory Timing .Serial Input Timing STR .Serial Input Timing DTR .Write Protect Setup and Hold During WRITE STATUS REGISTER Operation (SRWD 1) .Hold Timing .Output Timing for STR .Output Timing for DTR .CCMTD-1725822587-10224mt25q qlhs U 128 ABA xxT.pdf - Rev. J 05/18 EN6849090909191919292Micron Technology, Inc. reserves the right to change products or specifications without notice. 2014 Micron Technology, Inc. All rights reserved.

128Mb, 1.8V Multiple I/O Serial Flash MemoryFeaturesList of TablesTable 1: Signal Descriptions .Table 2: Memory Map .Table 3: Status Register .Table 4: Protected Area .Table 5: Flag Status Register .Table 6: Nonvolatile Configuration Register .Table 7: Volatile Configuration Register .Table 8: Sequence of Bytes During Wrap .Table 9: Clock Frequencies – STR (in MHz) .Table 10: Clock Frequencies – DTR (in MHz) .Table 11: Enhanced Volatile Configuration Register .Table 12: Sector Protection Register .Table 13: Global Freeze Bit .Table 14: Nonvolatile and Volatile Lock Bits .Table 15: Volatile Lock Bit Register .Table 16: Device ID Data .Table 17: Extended Device ID Data, First Byte .Table 18: Command Set .Table 19: RESET ENABLE and RESET MEMORY Operations .Table 20: READ ID and MULTIPLE I/O READ ID Operations .Table 21: READ MEM

SUSPEND/RESUME Operations . 66 PROGRAM/ERASE SUSPEND Operations . 66 128Mb, 1.8V Multiple I/O Serial Flash Memory Features CCMTD-1725822587-10224 mt25q_qlhs_U_128_ABA_xxT.pdf - Rev. J 05/18 EN 3 Micron Technology, Inc. reserves the right to change products or specifications without notice. .