TIMED Integrated Electronics Module (IEM)
P. C. MARTHTIMED Integrated Electronics Module (IEM)Paul C. MarthThe Thermosphere, Ionosphere, Mesosphere Energetics and Dynamics (TIMED) program is the first to use the Integrated Electronics Module (IEM) spacecraft architecture. TheIEM is based on the idea of incorporating the electronics for several spacecraft subsystemsinto a single chassis using plug-in cards. In addition to the space and mass savings realizedwith this approach, the concept can be adapted to many space missions over an extendedperiod, providing savings by building on prior configurations rather than “starting fromscratch.” The command and data handling, Global Positioning System Navigation, and RFcommunications subsystems, along with associated power converters, are packaged in theTIMED IEM. This article describes the adaptation of the IEM concept for the TIMED mission, which has been operating flawlessly since it was launched on 7 December 2001.INTRODUCTIONIn the mid-1990s, the APL Space Departmentformed the Advanced Satellite Technology Committeeto investigate and recommend architectures for futurespace projects. One of the proposed concepts was anIntegrated Electronics Module (IEM) that would holdcore spacecraft electronics subsystems. A subcommitteewas tasked to further develop this concept.1 The basicidea was to implement, in a single chassis, multiplespacecraft subsystems that are normally constructedas stand-alone entities to achieve the overall functionsneeded for a spacecraft. This construction is known asthe traditional “box-and-harness” approach.Adapting the IEM concept was projected to conservecritical spacecraft commodities (i.e., mass, size, andpower) at a reduced cost. Use of advanced technologycomponents was the key to achieving these savings,estimated at 20 to 30%.194The subcommittee established three categories ofrequirements for the IEM: Vital, Important, and Bells andWhistles. Table 1, excerpted from the committee report,lists the essential requirements under each category.Many of these requirements have been achieved in thevarious IEMs for the TIMED, CONTOUR, MESSENGER, and STEREO spacecraft.2 (Complete informationon the TIMED mission, including participants, status, science, etc., may be found at http://www.timed.jhuapl.edu/mission/.) While the IEMs for each spacecraft have different configurations and complements of subsystems, thebasic concept is characteristic of all.The TIMED spacecraft was the first to embracethe IEM concept. Of the six major TIMED subsystems,four were selected for the IEM: (1) command anddata handling (C&DH), (2) GPS Navigation System(GNS), (3) RF telecommunications, and (4) IEM powerJOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 24, NUMBER 2 (2003)
TIMED INTEGRATED ELECTRONICS MODULEIEM CONSTRUCTIONTable 1. IEM requirements.ImportantLow power consumptionError code–protected data transfersBells and WhistlesCompatible with industry standardsSupport multiple, tightly coupled processorsDynamically chosen bus masterBurst mode and/or message-based transaction supportconditioning. Figure 1 is a block diagram of the IEM. Nine cards are used forthe four subsystems. (TIMED uses two IEMs for redundancy.) Figures 2a and2b are photographs of a TIMED flight unit with and without the front cover.RFC&DHRF/C&DHC&T interfaceA1A2A3A4A5A6A7 28 VDCswitchedPCI busMotherboardDiscretes- AIUs- SeparationsoftwareIEM/1553 BC/RT1553 bus A/B- Instruments- Attitude Interface Units (AIUs)- Power system electronics (PSE)- 2nd IEMI2C bus(RIUs)PowerRF uplink(S-band)C&DH(CCD)A8Baseband telemetryRIUsGNS nav. and trackerprocessors (2) andsoftwareRF downlink(S-band)C&DH- Formatter- PCI I/F- R-Sencoder- Dual-portRAMAntennasRFRF/C&DHGNS receiver andASIC trackerGNSSSR (2.5 Gbits)GNSC&DH processor/software and1553 bus controllerC&DHDC/DC convertersC&DHRIU powerC&DH, GNSRFIEM housekeeping (analog)PowerRF switchesDC/DC convertersIEMDiplexerA9Relay commandsPre-ampLow voltage supplyAntennaMotherboardDownlinkUseable over at least a 10-year lifetimeInerconnect 1–20 slots with I/O trafficCard design unaffected by slot position5–10 MB/s now, with growth potentialFault tolerantProcessor independentUseable in a space radiation environmentSimple bus interface hardwareProductive and cost-effective software toolsCommercially available breadboard equipmentUplinkRequirementVitalBaseband commandRequirementcategoryThe IEM chassis (Fig. 3) is constructed from a single block of aluminum with internal rounded corners for stiffness. The motherboard,a multilayer printed circuit board(PCB) with connectors for plug-incards, is mounted to the frame.The frame is precisely positioned inthe chassis and pinned in place toensure accurate alignment for cardinstallation. Card insertion guideswith wedge-locking hardware holdthe cards in place and provide theprimary thermal conduction pathfor heat from the cards. The cardsand motherboard connectors haveinsertion guide-pins that are keyedto provide card-unique locations.The use of plug-in cards for eachsubsystem mentioned above (ideallyone card per subsystem) is a majorIEM characteristic. The motherboard, mounted to the chassis,handles the inter-card connections.An extension of the motherboardcontains connectors that provide 28 VDCswitchedGSEPSE 28 VDCunswitchedIEM A/BindicatorFigure 1. TIMED IEM block diagram.JOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 24, NUMBER 2 (2003)195
P. C. MARTHFigure 2. TIMED IEM flight unit with (a) and without (b) the front cover (size, 7.1 13 10.5 in.; weight, 25.2 lb; peak power consumptionwhen the downlink power amplifier is on, 53.3 W).removed from signal runs and aresized and duplicated to minimize voltage drop.IEM DATA FLOWThe IEM has three data buses forcommunications within the TIMEDspacecraft: 1553, peripheral component interface (PCI), and inter-inteChassisgrated circuit (I2C). The 1553 bus, anindustry-standard serial, bidirectionalMotherboardbus, is redundant and is used tocommunicate with external subsystems, i.e., all instrument, power, andCards (9)attitude control subsystems, and theFront coverother IEM. A modified version of theindustry-standard PCI bus, which isFigure 3. IEM construction.bit-parallel and bidirectional, is usedinterfaces with spacecraft subsystems external to thefor communications within the IEM. The PCI is a 16IEM. This extension is attached to the motherboard bybit data bus, clocked at 2.5 MHz, and yields a peak dataa flexible section that allows folding the two parts backtransfer rate of 5 Mbytes/s. The I2C bus, also industryto-back for a compact arrangement. Where needed,standard, is a serial bus used to gather temperature sensorconnectors at the top of a card provide for functionsreadings from remote interface units (RIUs). The basicthat are not practical to pass through the motherboard,characteristics of each bus, as implemented for TIMED,i.e., RF signals, card test points, and main power.are listed in Table 2.Card construction is illustrated in Fig. 4, which showsThe RIUs are external to the IEM and collect datadigital and RF circuit elements. The core of a card isfrom temperature sensors placed throughout the TIMEDthe aluminum structural member that also serves as aspacecraft. Each RIU handles 16 sensors. A multiplexerheat sink. Multilayer digital and RF boards or modulesin the RIU time-samples each sensor, digitizes the voltare mounted to the aluminum core either by a thermalage developed by each sensor, which is a nearly linearbonding process or mechanically with threaded studsfunction of temperature, and supplies the results to theinstalled in the core. A 220-pin card-edge connectorcommand and telemetry (C&T) interface card in themates to the motherboard connector. Connectors forIEM via the I2C bus.test points, RF signals, and spacecraft bus voltage inputsTIMED C&T data are organized and encoded intoto the power conditioning subsystem are mounted on apackets in accordance with standards developed bycard at the top edge.the Consultative Committee for Space Data SystemsThe motherboard is configured with alternating(CCSDS). Protocols are established to ensure highlyground and signal layers to reduce cross talk and toreliable end-to-end data delivery between the spacecontrol signal path characteristics. DC power runs arecraft and ground users. This includes confirmation ofBack cover196JOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 24, NUMBER 2 (2003)
TIMED INTEGRATED ELECTRONICS MODULE220-pin card-edgeconnector (matesto motherboard)Kaptoninsulatorsystem. The major functions performed by the processor are toMultilayerPCB(digital)Test pointconnectorThermal bond(insulatingattachmentsheet)Aluminum heatsink/structural memberMultilayerPCB(analog)Aluminumcarrier(for RF module)Figure 4. IEM card construction.Table 2. IEM data bus characteristics.DatabusData transfer(bit-parallel/serial)Data rate(Mbits/s)1553Serial(bidirectional)1.0PCI16-bit l)0.1UseData transfer to/from subsystemsexternal to IEMData transfer within IEM Deliver CCSDS telecommandpackets (e.g., to instrumentsand power, attitude control, andnavigation subsystems) Execute C&DH commands Provide spacecraft safing andautonomy Provide 1553 bus control (Theredundant IEM is a 1553 remoteterminal [RT]. Determination ofwhich IEM is the RT is made bya relay state set by command.) Enable communication throughthe PCI bus master Provide peak power tracking processing for the power subsystem Collect telemetry data packetsfrom instruments and subsystems Build instrument, subsystem status, and spacecraft housekeepingpackets Record and downlink telemetrypackets as defined by CCSDS Manage the SSR Support uploading of new codeto flash memory Support storage of data structures(e.g., autonomy rules, commandmacros) to flash memoryTransfer of digitized temperaturedata from RIUs to IEMeach command, tracking the receipt of each telemetrypacket, and flagging detected errors.IEM SUBSYSTEMSCommand and Data HandlingThe C&DH subsystem is implemented on threecards—processor, solid-state recorder (SSR), and C&Tinterface. It also has elements on two other cards: a critical command decoder (CCD) on the uplink card and adownlink formatter on the downlink card, both part ofthe telecommunications subsystem.The C&DH processor card contains a Mongoose V, a32-bit RISC processor, memory, an ASIC (applicationspecific integrated circuit) 1553 bus controller (BC), anda PCI BC implemented in an FPGA (field-programmable gate array) with dedicated memory. The C&DHsubsystem, which was developed on a PC runningWindows NT, runs under the Nucleus Plus operatingJOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 24, NUMBER 2 (2003)The SSR card has a 2.5-Gbitcapacity, sufficient for about 30 h ofdata accumulation at full spacecraftoperation. Data are recorded in 244byte Reed-Solomon (R-S) code blocks and can be storedand accessed randomly. The SSR card has simultaneousread and write capability at a combined rate of 8 Mbits/s.Memory scrubbing with 5-byte error correction anddetection ensures data integrity. The card includes anFPGA PCI BC with dedicated memory through whichall data and control functions are processed. The C&DHprocessor manages the SSR, which entails providing datafor storage, directing where data are to be stored, andreading out stored data to the downlink.The C&T card implements command, telemetry,and other data links between the C&DH processor andvarious entities within the IEM and TIMED spacecraft.Data flow to and from the C&DH processor is via thePCI bus. The special functions performed by the C&Tcard, which are listed below, are implemented withFPGA components. Route all uplink commands from the CCD on theIEM uplink card to the C&DH processor197
P. C. MARTH Route all relay commands generated by the C&DHprocessor to the CCD Collect temperature data from the RIUs via the I2Cbus and route to the C&DH processor Collect, digitize, and route internal IEM temperatureand voltage data to the C&DH processor Collect and route “event” flags to the C&DH processor (e.g., RF time out, spacecraft separation fromlaunch vehicle, attitude status indicators) Collect navigation experiment data from the uplinkcard and route to the C&DH processor Route commands from the C&DH processor to anavigation experiment on the uplink card Generate an IEM master reset in response to anuplink command detected by the CCD, at IEMpower-on, or for specific errors detected by theC&DH processorThe core functions of the CCD on the uplink card,which are also implemented with an FPGA, are listedbelow. Receive commands from the uplink receiver andforward them to the C&T card for routing to theC&DH processor Detect relay commands from the uplink receiver thatare labeled “Critical” and route these directly to thepower-switching unit of the power subsystem (thisallows bypassing the C&DH processor) Route C&DH processor–generated relay commandsto the power-switching unit and notify the processorthat each command has been sent (e.g., a relay command triggered by an autonomy rule) Reset the CCD and uplink receiver if a “watchdog”timer in the CCD times out. A time out occurs ifan uplink command is not received within a setperiod. The timer is reset for each uplink commandreceived. The C&DH processor is notified of a timeout event. Issue a sequence of a stored set of relay commandsto the power-switching unit if a “hard” low-voltagecondition is flagged by the power subsystem. TheC&DH processor is notified and the commandsequence implements an orderly power load reduction on the spacecraft. Decode and implement several of the internal CCDcommandsThe core functions of the CCD on the downlink formatter, implemented again with FPGAs, are to Gather real-time data from the C&DH processor andrecorded data from the SSR, both via the PCI bus Organize the data into frames (real time andrecorded) Perform R-T encoding198 Transfer the data bit serially to a modulator on thedownlink cardGPS NavigationThe GPS Navigation subsystem (GNS) resides ontwo cards. One card contains a receiver consisting of anRF downconverter, an oscillator, a synthesizer, and a 12channel GPS tracking ASIC (GTA) chip. An antennais mounted on the spacecraft with a clear field of viewto the GPS satellites. A low-noise amplifier, placed nearthe antenna to minimize signal losses, routes the signalsfrom the GPS satellites in view to the RF downconverter. The downconverter translates the GPS signalsfrom 1575.42 to 4.30 MHz in three steps. The frequencysynthesizer on the card produces local oscillator signalsused to accomplish the translation to 4.3 MHz. Theoscillator provides the reference frequency for the synthesizer. Signals at 4.30 MHz are sampled and digitized.The digitized samples are transferred to the GTA, whichprovides acquisition and tracking of the GPS signalsunder control of a tracking processor on the secondcard. GTA output data are stored in memory on thiscard, which is accessed by the tracking processor.The second GNS card contains two Mongoose VRISC processors, one for navigation, the other foracquiring and tracking GPS satellite signals. In additionto supporting the tracking function, the tracking processor also recovers the message subframes of each GPSsatellite in track. Dual-port memory is used to pass databetween the two processors. The “raw” tracking dataand message subframes for each satellite are provided tothe navigation processor. The navigation processor Computes the TIMED spacecraft position, velocity,and time (PVT)Position uncertainty: 300 m, 3 , each axisVelocity uncertainty: 0.25 m, 3 , each axisTime to 100 s UTC (Universal Time Coordinated), 3 Estimates the spacecraft orbit parameters Computes the Earth–Sun vector Provides acquisition aids to the tracking processor Predicts events (e.g., ground station contact times)The GNS provides a 1-s time mark, aligned to UTC,and an accompanying CCSDS unsegmented time codeto the C&DH subsystem for spacecraft timekeeping.The navigation processor provides information to thetracking processor for maintaining the 1-s time markaligned to UTC within 100 µs, 3 .Navigation data (i.e., PVT) and GNS status areprovided to the C&DH system via the PCI bus everysecond. Commands and software updates are loaded tothe GNS from the C&DH subsystem, also through thePCI bus. The GNS can be commanded to a mode thatoutputs “raw” tracking data in addition to the computedJOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 24, NUMBER 2 (2003)
TIMED INTEGRATED ELECTRONICS MODULEnavigation results for diagnostic purposes. Housekeeping telemetry points such as automatic gain control andinput DC voltages are supplied to the C&T card of theC&DH subsystem for sampling, digitizing, and incorporation into spacecraft telemetry.RF TelecommunicationsAs noted earlier, the electronics portion of theTIMED telecommunications subsystem comprises twocards in the IEM, uplink and downlink. Components ofthis subsystem external to the IEM are zenith- and nadirfacing antennas, antenna switching, and a diplexer thatseparates the uplink and downlink signals.The uplink card contains a receiver for recoveringthe 2000 bits/s command information modulated on a2039.65-MHz S-band carrier, using a 16-kHz subcarrier.The first operation of the receiver is to downconvert theS-band signal in two steps, first to 149.00 MHz and thento 15.30 MHz. A synthesizer on the card produces thelocal oscillator signals required for the two downconversions. A 30.60-MHz temperature-controlled crystaloscillator on the card is the reference frequency for thesynthesizer. The receiver separates the main carrier andthe 16-kHz subcarrier. A phase locked loop tracks thecarrier to keep the receiver tuned to the uplink signalonce acquisition is achieved. A command detector unitextracts the 2000 bits/s command data stream from the16-kHz subcarrier. The command data stream is thenrouted to the CCD on the uplink card for further processing, as described previously in the C&DH section.Major performance characteristics of the uplink are:Acquisition threshold: 130 dBmNoise figure: 4 dBDynamic range: 80 dBFrequency tracking range: 150 kHz about centerfrequencyCarrier tracking bandwidth: 400 HzBit error rate: within 3 dB of theoretical at a probability of error 1 10 6Link margin: 3 dB minimumThe downlink card modulates telemetry frames bitserially onto a carrier at 2214.97 MHz. A power amplifieron the card boosts this signal to the transmitted powerlevel. The amplified output is routed to the selectedantenna and radiated for reception at an Earth station.A frequency synthesizer produces the carrier signal fromthe 30.60-MHz reference frequency provided from thedownlink card. The downlink formatter on the downlink card assembles the telemetry frames.Major performance characteristics of the downlink are:RF output power: 3 WModulation format: differential quadraphaseJOHNS HOPKINS APL TECHNICAL DIGEST, VOLUME 24, NUMBER 2 (2003)Data rate: selectable, 4 Mbits/s (high rate) is usualLink margin (at 4 Mbits/s): 12.2 dB, APL 60-ftantenna; 5.5 dB, 5-m antenna; 1.0 dB, 3-m antennaPower ConditioningTwo cards in the IEM produce regulated, conditionedpower from the spacecraft bus voltage (22–35 V) foroperation of the IEM. One card supplies power for theC&DH and GNS and the other for the RF telecommunications subsystem. Power for the uplink card is fromthe spacecraft’s “unswitched” bus; power for all othercards is from the “switched” bus.Standard off-the-shelf, high-reliability DC/DC converter modules are used to produce the various regulatedvoltages required for the IEM cards. Custom circuitry isadded on the cards to meet the following special requirements for the IEM: Provide inrush current control to meet electromagnetic compatibility specifications Provide low input voltage lockout protection Produce “power-on” reset to initialize subsystem Turn on power to the downlink power amplifier in adefined sequence Add circuits to provide 9.0 V used by the downlinkpower amplifier and 3.3 V used by the SSRSUBSY
Integrated Electronics Module (IEM) that would hold core spacecraft electronics subsystems. A subcommittee was tasked to further develop this concept.1 The basic idea was to implement, in a single chassis, multiple spacecraft subsystems that are normally constructed as stand-alone entities to achieve the overall functions needed for a spacecraft.
5.3 IEM as the adoption of NEMA principles across all spheres of government 6. DEFINITION, CONCEPTS AND PRINCIPLES 6.1 Definition of IEM 6.2 Unpacking the IEM concept 6.3 IEM principles 7. SUMMARY OF IEM TOOLS 8. TRENDS AND CHALLENGES 9. CONCLUSIONS 10. REFERENCES 11.GLOSSARY BOXES Box 1: Key definitions and understandings set the context for .
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Instruction Manual. 1 Overview 5 ew IEM G4 series products 6 EK IEM G4 stereo diversity receiver 7 SR IEM G4 stereo transmitter 8 Accessories 9 Earphones 9 IE 40 PRO 9 IE 400 PRO 10 IE 500 PRO 11 . There are different frequency ranges in the UHF band available for trans-mission.
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2.4. A nalogy w ith the R iem ann Z eta Function: Functional E quation and T -D uality 66 2.4.1. K ey P roperties of the R iem ann Zeta Function: E uler P roduct and Functional E quation 67 2.4.2. The Functional E quation, T-D uality and the R iem ann H ypothesis 75 2.5. N otes 80 C hapter 3. Fractal Strings and Fractal M em branes 89 ix
Teacher’s Book B LEVEL - English in school 6 Contents Prologue 8 Test paper answers 10 Practice Test 1 11 Module 1 11 Module 2 12 Module 3 15 Practice Test 2 16 Module 1 16 Module 2 17 Module 3 20 Practice Test 3 21 Module 1 21 Module 2 22 Module 3 25 Practice Test 4 26 Module 1 26 Module 2 27 Module 3 30 Practice Test 5 31 Module 1 31 Module .
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Massachusetts Curriculum Framework for English Language Arts and Literacy 3 Grade 5 Language Standards [L]. 71 Resources for Implementing the Pre-K–5 Standards. 74 Range, Quality, and Complexity of Student Reading Pre-K–5 . 79 Qualitative Analysis of Literary Texts for Pre-K–5: A Continuum of Complexity. 80 Qualitative Analysis of Informational Texts for Pre-K–5: A .
