Vivado Design Suite User Guide: Using The Vivado IDE
See all versionsof this documentVivado Design Suite UserGuideUsing the Vivado IDEUG893 (v2021.1) July 14, 2021
Revision HistoryRevision HistoryThe following table shows the revision history for this document.Revision SummarySection07/14/2021 Version 2021.1General UpdatesUG893 (v2021.1) July 14, 2021Using the Vivado IDEUpdated for Vivado Design Suite 2021.1Send Feedbackwww.xilinx.com2
Table of ContentsRevision History.2Chapter 1: Introduction. 6Project Mode and Non-Project Mode. 7Launching the Vivado Design Suite. 8Using the Getting Started Page.10Adding Design Tools or Devices. 14Chapter 2: Using the Viewing Environment. 15Vivado IDE Viewing Environment. 15Creating Projects. 22Configuring Project Settings.24Using Language Templates. 27Running RTL Analysis, Synthesis, Implementation, and Bitstream Generation.29Opening Designs. 29Finding Design or Device Objects. 31Editing Properties.38Chapter 3: Using Windows.43Working with Windows.43Using Data Table Windows. 47Using the Project Summary. 51Using the Sources Window. 55Using the Netlist Window.67Using the Device Constraints Window.70Using the Properties Window. 71Using the Run Properties Window. 73Using the Selection Window. 76Using the Workspace. 80Using the Text Editor. 85Using the Device Window.93Using the Package Window. 100UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com3
Using the Schematic Window. 104Using the Hierarchy Window. 114Using the Timing Constraints Window. 116Using the Waveform Window. 118Using the Tcl Console. 118Using the Messages Window.123Using the Log Window.128Using the Reports Window. 130Using the Design Runs Window. 133Using the Package Pins Window. 137Using the I/O Ports Window. 139Chapter 4: Configuring the Environment.144Specifying Tool Settings. 144Specifying Project Default Settings. 145Specifying IP Defaults. 146Specifying Source File Settings. 147Specifying Display Settings. 147Specifying WebTalk Settings. 147Specifying Help Settings.148Specifying Text Editor Settings. 148Specifying Third-Party Simulators.149Specifying Colors. 149Setting Selection Rules. 151Configuring Shortcut Keys. 152Creating Run Strategies.153Creating Report Strategies.154Customizing Window Behavior. 156Configuring Custom View Layouts.157Adding Custom Menu Commands.157Appendix A: Vivado IDE Tips. 160Appendix B: Input and Output Files.162Input Files.162Output Files.163Outputs for Environment Configuration. 166Outputs for Project Data. 168Outputs for Project Data Simulation.169UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com4
Outputs for Implementation. 170Appendix C: Additional Resources and Legal Notices. 172Xilinx Resources.172Solution Centers. 172Documentation Navigator and Design Hubs. 172References.173Training Resources.173Please Read: Important Legal Notices. 174UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com5
Chapter 1: IntroductionChapter 1IntroductionThe Vivado Integrated Design Environment (IDE) provides an intuitive graphical user interface(GUI) with powerful features. All of the tools and tool options are written in native tool commandlanguage (Tcl) format, which enables use both in the Vivado IDE or Vivado Design Suite Tclshell. Analysis and constraint assignment is enabled throughout the entire design process. Forexample, you can run timing or power estimations after synthesis, placement, or routing. Becausethe database is accessible through Tcl, changes to constraints, design configuration or toolsettings happen in real time, often without forcing re-implementation.You can improve design performance using the new algorithms delivered by the Vivado IDE,including: Register transfer level (RTL) design in VHDL, Verilog, and SystemVerilog Intellectual property (IP) integration for cores Behavioral, functional, and timing simulation with Vivado simulator Vivado synthesis Vivado implementation for place and route Vivado serial I/O and logic analyzer for debugging Vivado power analysis SDC-based Xilinx design constraints (XDC) for timing constraints entry Static timing analysis High-level floorplanning Detailed placement and routing modification Bitstream generationThe Vivado IDE uses a concept of opening designs in memory. Opening a design loads the designnetlist at that particular stage of the design flow, assigns the constraints to the design, and thenapplies the design to the target device. This provides the ability to visualize and interact with thedesign at each design stage.UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com6
Chapter 1: IntroductionYou can experiment with different implementation options, refine timing constraints, explore theVivado IP catalog, perform simulation, and apply physical constraints with floorplanningtechniques to help improve design results. Early estimates of resource utilization, interconnectdelay, power consumption, and routing connectivity can assist with appropriate logic design,device selection, and floorplanning. As the design moves through the implementation flow, youcan further refine the design.IMPORTANT! The Vivado IDE supports designs that target 7 series and newer devices only.TRAINING: To help you learn more about the concepts presented in this document, you can attend theDesigning FPGAs Using the Vivado Design Suite 1, Designing FPGAs Using the Vivado Design Suite 2,Designing FPGAs Using the Vivado Design Suite 3, and Designing FPGAs Using the Vivado Design Suite 4Training Courses.Project Mode and Non-Project ModeThere are two design flow modes available in the Vivado Design Suite: Project Mode and NonProject Mode. In general, you run Project Mode in the Vivado IDE. In this mode, you create aproject in the IDE, and the Vivado IDE automatically saves the state of the design, generatesreports and messaging, and manages source files. In general, you run Non-Project Mode using Tclcommands or scripts. In this mode, you have full control of the design flow, but the Vivado toolsdo not automatically manage source files or report the design state. However, in Non-ProjectMode, you can open the Vivado IDE at each design stage for design analysis and constraintsassignment. You are viewing the active design in memory, so any changes are automaticallypassed forward in the flow. You can save updates to new constraint files or design checkpoints.For more information, see the Vivado Design Suite User Guide: Design Flows Overview (UG892).In Project Mode, the Vivado IDE supports several features that are not available in Non-ProjectMode: Source file management and status Flow Navigator and Project Summary Consolidated Messages and automatically generated standard reports Cross probing back to RTL Storage of tool settings and design configuration Experimentation with multiple synthesis and implementation runs Use and management of constraint sets Run results management and status IP configuration and integration with the IP catalogUG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com7
Chapter 1: IntroductionThese features provide several advantages from an ease-of-use perspective. For example, whenopening a previously created project in the Vivado IDE, you see the current state of the design,run results, and previously generated reports and messages. Using the Flow Navigator, a singleclick on Generate Bitstream synthesizes and implements the design, and generates a bitstreamfile. In addition, you can cross probe from an error message directly to the source file.Launching the Vivado Design SuiteYou can launch the Vivado Design Suite and run the tools using different methods depending onyour preference. For example, you can choose a Tcl script-based compilation style method inwhich you manage sources and the design process yourself, also known as Non-Project Mode.Alternatively, you can use a project-based method to automatically manage your design processand design data using projects and project states, also known as Project Mode. Either of thesemethods can be run using a Tcl scripted batch mode or run interactively in the Vivado IDE. Formore information on the different design flow modes, see this link in the Vivado Design Suite UserGuide: Design Flows Overview (UG892).Note: Installation, licensing, and release information is available in the Vivado Design Suite User Guide:Release Notes, Installation, and Licensing (UG973).Working with the Vivado IDEYou can launch the Vivado IDE from Windows or Linux.RECOMMENDED: You can open the Vivado IDE from any directory. However, Xilinx recommends runningit from a project directory, because the Vivado IDE log and journal files are written to the launch directory.When running from a command prompt, launch the Vivado IDE from the project directory, or use thevivado -log and -journal options to specify a location. When using a Windows shortcut, you must modifythe Start in folder, which is a Property of the shortcut. Alternatively, you can launch the Vivado IDE bydouble-clicking the project file (.xpr extension) to ensure that the log and journal files are written to theproject directory.Launching the Vivado IDE on WindowsSelect Start All Programs Xilinx Design Tools Vivado version Vivado version .Note: You can also double-click the Vivado IDE shortcut icon on your desktop.Figure 1: Vivado Desktop IconTIP: On Windows 7 systems, you can right-click the Vivado IDE shortcut icon, and select Pin to Start Menuor Pin to Taskbar to provide quick access to the Vivado IDE.UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com8
Chapter 1: IntroductionLaunching the Vivado IDE from the Command Line on Windows orLinuxEnter the following command at the command prompt: install path /Vivado/ version /bin/vivadoNote: When you enter this command, it automatically runs vivado -mode gui to launch the VivadoIDE. If you need help, type vivado -help.TIP: To add the Vivado tools path to your current shell/command prompt, run settings64.bat orsettings64.sh from the install path /Vivado/ version directory.Launching the Vivado IDE from the Vivado Design Suite Tcl ShellEnter the following command at the Tcl command prompt:start guiWorking with TclIf you prefer to work directly with Tcl, you can interact with your design using Tcl commandsusing either of the following methods: Enter individual Tcl commands in the Vivado Design Suite Tcl shell outside of the Vivado IDE. Run Tcl scripts from the Vivado Design Suite Tcl shell. Enter individual Tcl commands in the Tcl Console at the bottom of the Vivado IDE. Run Tcl scripts from the Vivado IDE.For more information about using Tcl and Tcl scripting, see the Vivado Design Suite User Guide:Using Tcl Scripting (UG894) and Vivado Design Suite Tcl Command Reference Guide (UG835). For astep-by-step tutorial that shows how to use Tcl in the Vivado tools, see the Vivado Design SuiteTutorial: Design Flows Overview (UG888).Note: Alternatively, you can type command name -help in the Tcl Console or at the Vivado DesignSuite Tcl shell for information about the specified command.Launching the Vivado Design Suite Tcl ShellUse the following command to invoke the Vivado Design Suite Tcl shell either at the Linuxcommand prompt or within a Windows Command Prompt window:vivado -mode tclNote: On Windows, you can also select Start All Programs Xilinx Design Tools Vivado version Vivado version Tcl Shell.UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com9
Chapter 1: IntroductionLaunching the Vivado Tools Using a Batch Tcl ScriptYou can use the Vivado tools in batch mode by supplying a Tcl script when invoking the tool. Usethe following command either at the Linux command prompt or within a Windows CommandPrompt window:vivado -mode batch -source your Tcl script Note: When working in batch mode, the Vivado tools exit after running the specified script.Using the Tcl Console in the Vivado IDEThe Vivado IDE runs on top of a powerful engine with integrated Tcl support. In the Vivado IDE,you can issue Tcl commands from the Tcl Console, as described in Using the Tcl Console.Related InformationUsing the Tcl ConsoleRunning a Tcl Script from the Vivado IDETo run a script, select Tools Run Tcl Script.Note: To create scripts, you can copy the Vivado IDE Tcl commands from the vivado.jou file or from the TclConsole.Using the Getting Started PageWhen you open the Vivado IDE, the Getting Started Page appears as shown in the followingfigure.Note: To open the Getting Started Page, all open projects must be closed.UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com10
Chapter 1: IntroductionFigure 2: Vivado IDE Getting Started PageThe Vivado IDE Getting Started Page assists you with creating and opening projects, runningVivado IDE commands, and viewing documentation as follows: Quick Start Create Project: Opens the New Project wizard to guide you through creating varioussupported project types. You can also use the wizard to import previously created projectsfrom the PlanAhead tool (.ppr extension) or from the ISE Design Suite (.xiseextension). Open Project: Opens a browser that enables you to open any Vivado IDE project file (.xprextension). Open Example Project: Opens the Open Example Project wizard to guide you throughcreating one of the following example projects, which includes specifying a project nameand location and choosing from a list of valid parts: BFT: Small RTL project.UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com11
Chapter 1: IntroductionBelow are few designs: Configurable MicroBlaze Design Presets: Vivado IP integrator MicroBlaze processordesign targeting various Xilinx evaluation boards. The design allows you to specify thelocal memory size and whether to instantiate DDR4, UART, or GPIO IP. You cancustomize the UART IP to a specified baud rate or customize the GPIO IP to interface toDIP switches, LED, push buttons, or rotary switches. You can implement the design inthe Vivado Design Suite, export the hardware to the Vitis software platform forapplication code development, and simulate the design in the Vivado Design Suite usinga test bench that you supply and an ELF file generated by the Vitis software platform.Note: Configurable MicroBlaze is not available by default. It must be installed through Git. Configurable Zynq UltraScale MPSoC Design: Zynq UltraScale MPSoC designtargeting various Xilinx evaluation boards. The design allows you to specify the localmemory size and whether to instantiate DDR4, UART, or GPIO IP. You can customizethe UART IP to a specified baud rate or customize the GPIO IP to interface to DIPswitches, LED, push buttons, or rotary switches. You can implement the design in theVivado Design Suite, export the hardware to the Vitis software platform for applicationcode development, and simulate the design in the Vivado Design Suite using a testbench that you supply and an ELF file generated by the Vitis software platform.Note: Configurable Zynq UltraScale MPSoC is not available by default. It must be installedthrough Git. CPU (HDL): Large mixed-language RTL project. CPU (Synthesized): Large synthesized netlist project. Wavegen (HDL): Small project that includes three embedded IP cores. You can use thisdesign to learn how to use integrated IP cores with Vivado IDE projects.TIP: Click Refresh to update the installed designs or download the latest Xilinx Example designs. Tasks Manage IP: Opens or creates an IP project for customizing and managing IP. The Vivado IPcatalog displays Xilinx, third-party, or user-created IP, which can be customized to create IPcores for a specified device. You can also view or re-customize existing IP cores andgenerate output products, including a netlist of the IP standalone. Open Hardware Manager: Opens the Vivado Design Suite hardware manager to connect toa target JTAG cable or board, which enables you to program your design into a device. TheVivado logic analyzer and Vivado serial I/O analyzer features of the tool enable you todebug your design.UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com12
Chapter 1: Introduction Vivado Store: The Vivado store, shown in the following figure, consolidates tcl apps, boardfiles and configurable example designs into a single location. A catalog file maintains the listof all items available in the stores. To update the catalog, click the refresh button for therespective store in the lower left-hand corner. Individual items can be installed or removed.We deliver a set of Xilinx Board files and Example designs and installs, which cannot beuninstalled. This is because if customers are inside a firewall or do not have access to theinternet, they should have access to the board files of Xilinx Proprietary Boards. Tcl Apps: An open source repository of Tcl code designed primarily for use with theVivado Design Suite. The Tcl Store provides access to multiple scripts and utilitiescontributed from different sources, which solve various issues and improve productivity.For more information, see this link in the Vivado Design Suite User Guide: Using TclScripting (UG894). Boards: A GitHub repository for Xilinx and third-party hosted board files. Using a boardfile with Vivado can simplify design creation by integrating board level resources intothe design environment. For more information about contributing boards, refer tohttps://github.com/Xilinx/XilinxBoardStore. Example Designs: A GitHub repository comprised of Xilinx and third-party configurableexample designs. These designs are intended to demonstrate specific capabilities of thetool and provide a baseline design. For more information about contributing exampledesigns, refer to https://github.com/Xilinx/XilinxCEDStore.Figure 3: Vivado Store Learning Center Documentation and Tutorials: Opens or downloads Vivado Design Suite documentationusing the Xilinx Documentation Navigator or your default web browser. QuickTake Videos: Opens Xilinx video tutorials.UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com13
Chapter 1: Introduction What's new in 2021.1: Opens "What's new browser page." .Note: For more information about the Xilinx Documentation Navigator, see the Vivado Design Suite UserGuide: Getting Started (UG910). Recent Project, Recent Checkpoints, and Recent IP Locations:Provides one-click access to recently opened projects, checkpoints, or IP locations. Theselists only appear after you open projects, checkpoints, or IP locations.Note: By default, the last ten previously opened projects, checkpoints, or IP locations are listed. To changethis number, select Tools Settings, and update the Recent settings in the Project options under ToolSettings. The Vivado IDE checks that the project data is available before displaying the projects.Adding Design Tools or DevicesIf you want to add a design tool or device that you did not initially install, you can select Help Add Design Tools or Devices. This command launches the Xilinx installer, which allows you tomodify your installation options. For more information, see the Vivado Design Suite User Guide:Release Notes, Installation, and Licensing (UG973).UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com14
Chapter 2: Using the Viewing EnvironmentChapter 2Using the Viewing EnvironmentThis chapter contains general information on the terminology, layout, and project features of theVivado IDE. It does not contain information on the Vivado IDE design flow. For information onthe design flow, see the following documents: Vivado Design Suite User Guide: Design Flows Overview (UG892) Vivado Design Suite User Guide: Designing with IP (UG896) Vivado Design Suite User Guide: Designing IP Subsystems Using IP Integrator (UG994) Vivado Design Suite User Guide: Logic Simulation (UG900) Vivado Design Suite User Guide: Synthesis (UG901) Vivado Design Suite User Guide: Using Constraints (UG903) Vivado Design Suite User Guide: Implementation (UG904) Vivado Design Suite User Guide: Design Analysis and Closure Techniques (UG906) Vivado Design Suite User Guide: Programming and Debugging (UG908)VIDEO: For more information on tool usage and features, see the Vivado Design Suite QuickTake VideoTutorials. These video tutorials target specific topics in brief video presentations.Vivado IDE Viewing EnvironmentThe following figure shows the Vivado IDE viewing environment. You can interact with theVivado IDE through mouse, keyboard, or Tcl input.TIP: For quick access to information on different parts of the Vivado IDE, click the Quick Help buttonthe window or dialog box, or press the F1 key.inThe main components of the viewing environment are:1. Menu Bar2. Main Toolbar3. Flow Navigator4. Data Windows AreaUG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com15
Chapter 2: Using the Viewing Environment5. Menu Command Quick Access Search Field6. Workspace7. Project Status Bar8. Layout Selector9. Status Bar10. Results Windows AreaFigure 4: Vivado IDE Viewing Environment12345967810X10967UG893 (v2021.1) July 14, 2021Using the Vivado IDESend Feedbackwww.xilinx.com16
Chapter 2: Using the Viewing EnvironmentMenu BarThe main menu bar provides access to Vivado IDE commands. Commonly-used commandsalways display (for example, File Project Open) while others display only when a design isactive (for example, Reports Report DRC). Some menu commands have a related keyboardshortcut that is listed next to the menu command. For information on defining your ownkeyboard shortcuts, see Configuring Shortcut Keys.Related InformationConfiguring Shortcut KeysMenu Command Quick Access Search FieldTo the right of the menu commands, the menu command Quick Access search field enables youto locate and execute a command from the menu bar. In the search field, type a few letters of acommand name. A list of commands that include your search criteria appear, as shown in thefollowing figure. Select a command from the list to execute that command.Figure 5: Menu Command Quick Access Search FieldThe list of commands that appear is based on the current design context in the project. Forexample, an open elaborated design offers a different set of commands than an openimplemented design.Note: In addition to menu commands, the command search field reports project names and files thatdisplay under the Open Recent Project and Open Example Project commands in the File menu.Main ToolbarThe main toolbar provides one-click access to the most commonly used commands in the VivadoIDE. When you hover the mouse cursor over a button, a tooltip appears that provides moreinformation about the command.TIP: You can set the amount of time before a tooltip appears and disappears. You can also set whether toshow tooltips for menu commands. Select Tools Settings. In the Tool Settings section of the Settingsdialog box, click t
more information on the different design flow modes, see this link in the Vivado Design Suite User Guide: Design Flows Overview (UG892). Note: Installation, licensing, and release information is available in the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973). W o r k i n g w i t h t h e V i v a d o I D E
For more information about the Vivado IDE and the Vivado Design Suite flow, see: Vivado Design Suite User Guide: Using the Vivado IDE (UG893) [Ref 4] Vivado Design Suite User Guide: Design Flows Overview (UG892) [Ref 12] Simulation Flow Simulation can be applied at several points in the design flow. It is one of the first steps after .
For more information about the Vivado IDE and the Vivado Design Suite flow, see: Vivado Design Suite User Guide: Using the Vivado IDE (UG893) [Ref 3] Vivado Design Suite User Guide: Design Flows Overview (UG892) [Ref 11] Simulation Flow Simulation can be applied at several points in the design flow. It is one of the first steps after .
Vivado Design Suite 2016.2 Release Notes www.xilinx.com 5 UG973 (v2016.2) June 8, 2016 Chapter 1 Release Notes 2016.2 What's New Vivado Design Suite 2016.2 and updated UltraFast Design Methodology Guide for the Vivado Design Suite (UG949) [Ref 1] Available Now. Get Vivado Design Suite 2016.2 with support for Virtex UltraScale and Defense-Grade .
2 Vivado Partial Reconfiguration - Documentation UG909: Vivado Design Suite User Guide - Partial Reconfiguration. UG947: Vivado Design Suite Tutorial - Partial Reconfiguration. You can follow this for the Xilinx-provided ug947-vivado-partial-reconfiguration-tutorial.zip file (this is a Verilog design for
those objects, in the Xilinx Vivado Design Suite. It consists of the following: Chapter 1, Vivado Design Suite First Class Objects: Describes the various design and device objects used by the Vivado Design Suite to model the FPGA design database. Presents the objects sorted according to specific categories, with links to detailed
See the Vivado Design Suite User Guide: Release Notes, Installation, and Licensing (UG973) for a complete list and description of the system and software requirements. Configuring MATLAB to the Vivado Design Suite Before you begin, you should verify that MATLAB is configured to the Vivado Design Suite. Do the following: 1. Configure MATLAB.
Guide (UG911). For more information about XDC, see the Vivado Design Suite User Guide: Using Constraints (UG903). CAUTION! Do not migrate from ISE Design Suite to Vivado Design Suite while in the middle of an in-progress ISE Design Suite project, because design constraints and scripts are not compatible between these environments.
The module scst_user API is de ned in scst_user.h le. 3 IOCTL() functions There are following IOCTL functions aailable.v All of them has one argument. They all, except SCST_USER_REGISTER_DEVICE return 0 for success or -1 in case of error, and errno is set appro-priately. 3.1 SCST_USER_REGISTER_DEVICE
