Lecture 2: Overview

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Lecture 2: Overview CSCE 5730 Digital CMOS VLSI Design Instructor: Saraju P. Mohanty, Ph. D. NOTE: The figures, text etc included in slides are borrowed from various books, websites, authors pages, and other sources for academic purpose only. The instructor does not claim any originality. CSCE 5730: Digital CMOS VLSI Design 1

Lecture Outline Historical development of computers Introduction to a basic digital computer Five classic components of a computer Microprocessor IC design abstraction level Intel processor family Developmental trends of ICs Moore’s Law CSCE 5730: Digital CMOS VLSI Design 2

Introduction to Digital Circuits CSCE 5730: Digital CMOS VLSI Design 3

What is a digital Computer ? A fast electronic machine that accepts digitized input information, processes it according to a list of internally stored instruction, and produces the resulting output information. List of instructions Æ Computer program Internal storage Æ Memory CSCE 5730: Digital CMOS VLSI Design 4

Different Types and Forms of Computer Personal Computers (Desktop PCs) Notebook computers (Laptop computers) Handheld PCs Pocket PCs Workstations (SGI, HP, IBM, SUN) ATM (Embedded systems) Supercomputers CSCE 5730: Digital CMOS VLSI Design 5

Five classic components of a Computer Computer Processor Memory Devices Control Input Datapath Output (1) Input, (2) Output, (3) Datapath, (4) Controller, and (5) Memory CSCE 5730: Digital CMOS VLSI Design 6

What is a microprocessor ? A microprocessor is an integrated circuit (IC) built on a tiny piece of silicon. It contains thousands, or even millions, of transistors, which are interconnected via superfine traces of aluminum. The transistors work together to store and manipulate data so that the microprocessor can perform a wide variety of useful functions. The particular functions a microprocessor performs are dictated by software. (source : Intel) Simply speaking, microprocessor is the CPU on a single chip. CPU stands for “central processing unit” also known as processor. Processor can be “general purpose” or “special purpose”. A special purpose processor is also known as “application specific integrated circuit” (ASIC). CSCE 5730: Digital CMOS VLSI Design 7

What is an Integrated Circuit ? An integrated circuits is a silicon semiconductor crystal containing the electronic components for digital gates. Integrated Circuit is abbreviated as IC. The digital gates are interconnected to implement a Boolean function in a IC . The crystal is mounted in a ceramic/plastic material and external connections called “pins” are made available. ICs are informally called chips. CSCE 5730: Digital CMOS VLSI Design 8

How does a microprocessor look? (1) ASIC (2) Sun UltraSparc CSCE 5730: Digital CMOS VLSI Design (3) PentiumPro 9

Historical Development CSCE 5730: Digital CMOS VLSI Design 10

VLSI Technology: Highest Growth in History 1958: First integrated circuit – Flip-flop using two transistors – Built by Jack Kilby at Texas Instruments 2003 – Intel Pentium 4 μprocessor (55 million transistors) – 512 Mbit DRAM ( 0.5 billion transistors) 53% compound annual growth rate over 45 years – No other technology has grown so fast so long Driven by miniaturization of transistors – Smaller is cheaper, faster, lower in power! – Revolutionary effects on society CSCE 5730: Digital CMOS VLSI Design 11

VLSI Industry : Annual Sales 1018 transistors manufactured in 2003 – 100 million for every human on the planet 340 Billion transistors manufactured in 2006. (World population 6.5 Billion!) Global Semiconductor Billings (Billions of US ) 200 150 100 50 0 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 Year CSCE 5730: Digital CMOS VLSI Design 12

Invention of the Transistor Invention of transistor is the driving factor of growth of the VLSI technology Vacuum tubes ruled in first half of 20th century Large, expensive, power-hungry, unreliable 1947: first point contact transistor – John Bardeen and Walter Brattain at Bell Labs – Earned Nobel prize in 1956 CSCE 5730: Digital CMOS VLSI Design 13

Transistor Types Bipolar transistors – n-p-n or p-n-p silicon structure – Small current into very thin base layer controls large currents between emitter and collector – Base currents limit integration density Metal Oxide Semiconductor Transistors (MOSFET) Field Effect – nMOS and pMOS MOSFETS – Voltage applied to insulated gate controls current between source and drain – Low power allows very high integration CSCE 5730: Digital CMOS VLSI Design 14

The Babbage Difference Machine in 1832 CSCE 5730: Digital CMOS VLSI Design 15

The First Electronic Computer in 1946 (ENIAC) CSCE 5730: Digital CMOS VLSI Design 16

How a Home PC Looks Today? CSCE 5730: Digital CMOS VLSI Design 17

First Integrated Circuit - 1958 The First Integrated Circuit – Jack Kilby, Texas Instruments 1 Transistor and 4 Other Devices on 1 Chip Winner of the 2000 Nobel Prize CSCE 5730: Digital CMOS VLSI Design 18

First Commercial Planar IC - 1960 Fairchild -- One Binary Digital (Bit) Memory Device on a Chip 4 Transistors and 5 Resistors Start of Small Scale Integration (SSI)!! We are in VLSI!! CSCE 5730: Digital CMOS VLSI Design 19

First IC Created with Computer-Aided Design Tools -- 1967 μMOSAIC – Fairchild CSCE 5730: Digital CMOS VLSI Design 20

First 1,024 Bit Memory Chip -- 1970 1970’s processes usually had only nMOS transistors – Inexpensive, but consume power while idle. 1980s-present: CMOS processes for low idle power Intel Corporation DRAM CSCE 5730: Digital CMOS VLSI Design 21

Intel 4004 : 2.3K Transistors (1971) CSCE 5730: Digital CMOS VLSI Design 22

Pentium : 3.1M Transistors (1993) CSCE 5730: Digital CMOS VLSI Design 23

Pentium II : 7.5M Transistors (1997) CSCE 5730: Digital CMOS VLSI Design 24

Pentium III : 28.1M Transistors (1999) CSCE 5730: Digital CMOS VLSI Design 25

Pentium IV : 52M Transistors (2001) CSCE 5730: Digital CMOS VLSI Design 26

Core 2 Duo: 291M Transistors (2006) Core 2 Duo T5000/T7000 series mobile processors, called Penryn uses 800M of 45 nanometer devices (2007). CSCE 5730: Digital CMOS VLSI Design 27

Circuit Design Flow CSCE 5730: Digital CMOS VLSI Design 28

Integrated Circuits Categories There are many different types of ICs as listed below. IC Categories Functions Analog ICs Amplifiers Filters Digital ICs Boolean Gates Encoders/Decoders Multiplexers / Demultiplexers Flip-flops Counters Shift Registers Hybrid ICs Mixed Signal Processors Interface ICs Analog-Digital Converters Digital-Analog Converters CSCE 5730: Digital CMOS VLSI Design 29

Levels of Integration (Chip Complexity) Categorized by the number of gates contained in the chip. IC Number of Complexity Gates Functional Complexity Examples SSI 10 Basic gates Inverters, AND gates, OR gates, NAND gates, NOR gates MSI 10-100 Basic gates Exclusive OR/NOR Sub-modules Adders, subtractors, encoders, decoders, multiplexers, demultiplexers, counters, flip-flops LSI 100-1000s Functional modules Shift registers, stacks VLSI 1000s100,000 Major building blocks Microprocessors, memories ULSI 100,000 Complete systems Single chip computers, digital signal processors WSI 10,000,000 Distributed systems Microprocessor systems CSCE 5730: Digital CMOS VLSI Design 30

Digital Logic Families Various circuit technology used to implement an IC at lower level of abstraction. The circuit technology is referred to as a digital logic family. RTL - Resistor-transistor Logic obsolete DTL - Diode-transistor logic obsolete TTL - Transistor-transistor logic not much used ECL - Emitter-coupled logic high-speed ICs MOS - Metal-oxide semiconductor high-component density CMOS - Complementary Metal-oxide widely used, low-power highsemiconductor performance and high-packing density IC BiCMOS - Bipolar Complementary high current and high-speed Metal-oxide semiconductor GaAs - Gallium-Arsenide very high speed circuits CSCE 5730: Digital CMOS VLSI Design 31

Design Abstraction Levels SYSTEM MODULE GATE CIRCUIT DEVICE G S n CSCE 5730: Digital CMOS VLSI Design D n 32

Digital Circuits : Logic to Device (NAND Gate) (IEC Symbol) (Transistor Diagram) (Layout Diagram) CSCE 5730: Digital CMOS VLSI Design 33

Implementation Approaches for Digital ICs Digital Circuit Implementation Approaches Semi-custom Custom Cell-Based Standard Cells Compiled Cells Macro Cells Array-Based Pre-diffused (Gate Arrays) CSCE 5730: Digital CMOS VLSI Design Pre-wired (FPGA) 34

Implementation Approaches for Digital ICs Full-custom: all logic cells are customized. A general purpose microprocessor is designed this way. Semi-custom: all of the logic cells are from predesigned cell libraries (reduces the manufacture lead time of the IC) Standard-cell based IC uses predesigned logic cells such as AND gates, OR gates, MUXs, FFs,., etc. Macrocells (also called megacells) are larger predesigned cells, such as microcontrollers, even microprocessors, etc. Gate-Array, Sea-of-Gates or prediffused arrays contains array of transistors or gates which can be connected by wires to implement the chip. Programmable-Logic-Array (PLA) is an example of fuse-based FPGA design. (NOTE: Fuse-based, nonvolatile and volatile are three types of FPGAs) CSCE 5730: Digital CMOS VLSI Design 35

Digital IC Design Flow CSCE 5730: Digital CMOS VLSI Design 36

Technology Growth and Moore's Law CSCE 5730: Digital CMOS VLSI Design 37

Different Attributes of an IC or chip We will briefly discuss the VLSI technological growth based on these attributes. Transistor count of a chip Operating frequency of a chip Power consumption of a chip Power density in a chip Size of a device used in chip NOTE: Chip is informal name for IC. CSCE 5730: Digital CMOS VLSI Design 38

Moore’s Law 1965: Gordon Moore plotted transistor on each chip – Transistor counts have doubled every 26 months Many other factors grow exponentially – clock frequency – processor performance CSCE 5730: Digital CMOS VLSI Design 39

Technology Scaling Trend Source: Bendhia 2003 CSCE 5730: Digital CMOS VLSI Design 40

Evolution in Complexity CSCE 5730: Digital CMOS VLSI Design 41

Why Scaling? Technology shrinks by 0.7/generation With every generation can integrate 2x more functions per chip; chip cost does not increase significantly Cost of a function decreases by 2x But – How to design chips with more and more functions? – Design engineering population does not double every two years Hence, a need for more efficient design methods – Exploit different levels of abstraction CSCE 5730: Digital CMOS VLSI Design 42

Increase in Transistor Count Pentium IV (55 Million transistors) Transistors on Lead Microprocessors double every 2 years CSCE 5730: Digital CMOS VLSI Design 43

Die Size Growth Die size (mm) 100 10 8080 8008 4004 8086 8085 286 386 P6 Pentium proc 486 7% growth per year 2X growth in 10 years 1 1970 1980 1990 Year 2000 2010 Die size grows by 14% to satisfy Moore’s Law CSCE 5730: Digital CMOS VLSI Design 44

Increase in Operating Frequency Frequency (Mhz) 10000 Doubles every 2 years 1000 100 486 10 8085 1 0.1 1970 8086 286 P6 Pentium proc 386 8080 8008 4004 1980 1990 Year 2000 2010 Courtesy, Intel Lead Microprocessors frequency doubles every 2 years CSCE 5730: Digital CMOS VLSI Design 45

Power will be a major problem 100000 18KW 5KW 1.5KW 500W Power (Watts) 10000 1000 100 Pentium proc 286 486 8086 386 10 8085 8080 8008 1 4004 0.1 1971 1974 1978 1985 1992 2000 2004 2008 Year Power delivery and dissipation will be prohibitive CSCE 5730: Digital CMOS VLSI Design 46

Power density Power Density (W/cm2) 10000 Rocket Nozzle 1000 Nuclear Reactor 100 8086 Hot Plate 10 4004 P6 8008 8085 Pentium proc 386 286 486 8080 1 1970 1980 1990 Year 2000 2010 Power density too high to keep junctions at low temp CSCE 5730: Digital CMOS VLSI Design 47

Challenges in Digital Design “Macroscopic Issues” “Microscopic Problems” Ultra-high speed design Interconnect Noise, Crosstalk Reliability, Manufacturability Power Dissipation Clock distribution. Time-to-Market Millions of Gates High-Level Abstractions Reuse & IP: Portability Predictability etc. Everything Looks a Little Different and There’s a Lot of Them! CSCE 5730: Digital CMOS VLSI Design 48

100,000 100,000,000 10,000 10,000,000 Logic Tr./Chip Tr./Staff Month. 1,000 1,000,000 10,000 10,000,000 Productivity (K) Trans./Staff - Mo. Complexity Logic Transistor per Chip (M) Productivity Trends 1,000 1,000,000 100 100,000 58%/Yr. compounded Complexity growth rate 10 10,000 100 100,000 1,0001 10 10,000 x 0.1 100 xx 0.01 10 xx x 1 1,000 21%/Yr. compound Productivity growth rate x x 0.1 100 0.01 10 2009 2007 2005 2003 2001 1999 1997 1995 1993 1991 1989 1987 1985 1983 1981 0.001 1 Source: Sematech Complexity outpaces design productivity Courtesy, ITRS Roadmap CSCE 5730: Digital CMOS VLSI Design 49

Circuit Design Metrics CSCE 5730: Digital CMOS VLSI Design 50

Design Metrics How to evaluate performance of a digital circuit (gate, block, )? – – – – – – Cost Reliability Scalability Speed (delay, operating frequency) Power dissipation Energy to perform a function CSCE 5730: Digital CMOS VLSI Design 51

Cost of Integrated Circuits NRE (non-recurrent engineering) costs – design time and effort, mask generation – one-time cost factor Recurrent costs – silicon processing, packaging, test – proportional to volume – proportional to chip area CSCE 5730: Digital CMOS VLSI Design 52

NRE Cost is Increasing CSCE 5730: Digital CMOS VLSI Design 53

Die Cost Single die Wafer Going up to 12” (30cm) CSCE 5730: Digital CMOS VLSI Design 54

Cost per Transistor cost: -per-transistor 1 0.1 Fabrication capital cost per transistor (Moore’s law) 0.01 0.001 0.0001 0.00001 0.000001 0.0000001 1982 1985 1988 1991 1994 1997 2000 2003 CSCE 5730: Digital CMOS VLSI Design 2006 2009 55 2012

Yield No. of good chips per wafer Y 100% Total number of chips per wafer Wafer cost Die cost Dies per wafer Die yield π (wafer diameter/2)2 π wafer diameter Dies per wafer die area 2 die area CSCE 5730: Digital CMOS VLSI Design 56

Defects defects per unit area die area die yield 1 α α α is approximately 3 die cost f (die area)4 NOTE: Solve Example 1.3 , page-18 of Rabaey text book. CSCE 5730: Digital CMOS VLSI Design 57

Some Examples (1994) Chip Metal layers Line width Wafer cost Def./ cm2 Area mm2 Dies/ wafer Yield Die cost 386DX 2 0.90 900 1.0 43 360 71% 4 486 DX2 3 0.80 1200 1.0 81 181 54% 12 Power PC 601 4 0.80 1700 1.3 121 115 28% 53 HP PA 7100 3 0.80 1300 1.0 196 66 27% 73 DEC Alpha 3 0.70 1500 1.2 234 53 19% 149 Super Sparc 3 0.70 1700 1.6 256 48 13% 272 Pentium 3 0.80 1500 1.5 296 40 9% 417 CSCE 5730: Digital CMOS VLSI Design 58

Reliability― Noise in Digital Integrated Circuits V DD v(t) i(t) Inductive coupling Capacitive coupling Power and ground noise CSCE 5730: Digital CMOS VLSI Design 59

Mapping between analog and digital signals V “ 1” V OH V V IH out Slope -1 OH DC Operation: Voltage Transfer Characteristic Undefined Region V “ 0” V Slope -1 IL V OL OL V IL V IH CSCE 5730: Digital CMOS VLSI Design V in 60

Definition of Noise Margins "1" V OH Noise margin high NM H V IH Undefined Region NM L V OL V IL Noise margin low "0" Gate Output Gate Input CSCE 5730: Digital CMOS VLSI Design 61

Noise Budget Allocates gross noise margin to expected sources of noise Sources: supply noise, cross talk, interference, offset Differentiate between fixed and proportional noise sources CSCE 5730: Digital CMOS VLSI Design 62

Key Reliability Properties Absolute noise margin values are deceptive – a floating node is more easily disturbed than a node driven by a low impedance (in terms of voltage) Noise immunity is the more important metric – the capability to suppress noise sources Key metrics: Noise transfer functions, Output impedance of the driver and input impedance of the receiver; CSCE 5730: Digital CMOS VLSI Design 63

Fan-in and Fan-out N Fan-out N M Fan-in M CSCE 5730: Digital CMOS VLSI Design 64

The Ideal Gate V out Ri Ro 0 Fanout NMH NML VDD/2 g V in CSCE 5730: Digital CMOS VLSI Design 65

Delay Definitions V in 50% t V out tpHL tpLH 90% 50% t 10% tf tr CSCE 5730: Digital CMOS VLSI Design 66

A First-Order RC Network R vin vout C tp ln (2) t 0.69 RC Important model – matches delay of inverter CSCE 5730: Digital CMOS VLSI Design 67

Power Dissipation Instantaneous power: p(t) v(t)i(t) Vsupplyi(t) Peak power: Ppeak Vsupplyipeak Average power: Vsupply t T 1 t T Pave p (t )dt isupply (t )dt t T t T CSCE 5730: Digital CMOS VLSI Design 68

Energy and Energy-Delay Power-Delay Product (PDP) E Energy per operation Pav tp Energy-Delay Product (EDP) quality metric of gate E tp CSCE 5730: Digital CMOS VLSI Design 69

Summary Digital integrated circuits have come a long way and still have quite some potential left for the coming decades Some interesting challenges ahead – Getting a clear perspective on the challenges and potential solutions is the purpose of this book Understanding the design metrics that govern digital design is crucial – Cost, reliability, speed, power and energy dissipation CSCE 5730: Digital CMOS VLSI Design 70

CSCE 5730: Digital CMOS VLSI Design 29 IC Categories Functions Analog ICs Amplifiers Filters Digital ICs Boolean Gates Encoders/Decoders Multiplexers / Demultiplexers Flip-flops Counters . Digital IC Design Flow CSCE 5730: Digital CMOS VLSI Design 36. Technology Growth and Moore's Law CSCE 5730: Digital CMOS VLSI Design 37.

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