DSP-based PLL-controlled 50-100kHz 20kW High- Frequency Induction .

switching pulses. The dead-band delay between the switching instants of the IGBTs on the same leg of the inverter isprovided by the dead-band control register DBTCON,which is set at 0.8 ms. This delay is adjusted by the specialhardware feature of the DSP, and is independent of theprocessing delays. This feature of the DSP maintains aconstant delay at all frequencies, which is not possible inanalogue circuit implementations of PLL control due to thevariation of component characteristics with frequency(particularly in the high-frequency range). The DSPoperates at a speed of 20 MIPS, which makes it possibleto control the system up to 100 kHz.During experimentation, a lower frequency limitof 50 kHz and an upper frequency limit of 100 kHzwere set on the control system so that the operatingfrequency could never exceed these limits accidentally. Theswitching signals are isolated and amplified before they areapplied to the gates of the IGBTs using a signalconditioning circuit.3.2Mathematical modelAn approximate discrete-time model of the system wasfound to be useful in designing the control system. Referringto Fig. 4, the PLL control is implemented in discrete-timeby the following equation:T ðk þ 1Þ ¼ T ðkÞ þ Kc eðk þ 1Þð1Þwhich corresponds to integral action.In (1) T is the inverter voltage period (represented by Tcin digital form in Fig. 4), Kc is the integral gain (representedby KcD) and e is the error in phase difference (representedby eD) defined aseðkÞ ¼ xf ðkÞ 12ð2Þwhere xf is the average value of the normalised LP filteroutput (Fig. 5).vcviHowever, in transient operation xf should be related to ufby the differential equationdxf11fð4Þ¼ x f þ ufuf ¼tftfpdtwhere tf ¼ RfCf is the time constant of the filter.Note that in (4) uf is a function of the frequency of theinverter voltage (or its period) through the phase differencef. Considering the steady state operation of the resonantload of the inverter, the following relationship can beobtained between f and T:()2pRCls 1Tð5ÞfðT Þ ¼ tan1 ðo2p0 T Þ2pffiffiffiffiffiffiffiffiffiwhere o0 ¼ 1 Ls Cs ; Ls is the inductance of the heatingcoil and Rl is its equivalent resistance.It is assumed that the relationship (5) is approximatelyvalid during transient operation in which the period Tchanges slowly. Furthermore, (5) is obtained by assumingthat the inverter output voltage is purely sinusoidal.Equation (4) can be discretised as follows:f½T ðkÞ ð6Þxf ðk þ 1Þ ¼ axf ðkÞ þ bpwhere a ¼ e Ts tf , b ¼ (1–a), and Ts is the control samplingtime. Using (1), (2) and (6) the closed-loop system equationis obtained as f½T ðkÞ 1 ð7ÞT ðk þ 1Þ ¼ T ðkÞ þ Kc axf ðkÞ þ bp2Equations (6) and (7) are non-linear, since f is a non-linearfunction of T(k). These equations can be linearised easily bylinearising (5) around the operating point, where theinverter frequency is equal to the resonant frequency ofthe load, to give (see Appendix, Section 7)p1ðT T0 Þð8ÞfðT Þ ’ 2 pRl Cswhere T0 is the inverter period at the operating point.With the following definitions of perturbation variables:Dxf ¼xf 12DT ¼T T0ð9Þthe linearised closed-loop equations of the system become(see Appendix, Section 7)1XOR outputyðk þ 1Þ ¼ Ac yðkÞuf xfss0Fig. 5In (10) y is the column vector y ¼ [Dxf DT]T and2 3a 1 ap2 tr5Ac ¼ 4ð1 aÞKcaKc 1 p2 trWaveforms for PLL operationNormalisation here refers to a scaling such that themaximum is unity (corresponding to 100% duty ratio of theXOR output). Note that the period of the VCO output (T)is updated instead of its frequency. This is found to be moreconvenient since the inverter control program (dead band)requires period information directly.Now, it is clear that xf can be expressed in the steady statein terms of the phase difference f asxf ;ss ¼f¼ ufpwhere uf is the average value of the LP filter input.IEE Proc.-Electr. Power Appl.ð10Þð3Þwhere tr ¼ RlCs.Applying Jury’s stability test [6] to (10), the followingrange of gain for stability is obtained:0oKc o41þa2p2 Rl Cs1 að11ÞSystem modelling and simulationAt the design stage of the induction heating system, asimulation model of the converter and the load wasdeveloped using the SIMULINK package to estimate theturns ratio of the impedance matching transformer, the3

tttimeclockv invrelay2LPFXOR (ZCD)15000XORs 15000e x f -1/2 400vivi , V; ic , 0.034990.03500-200inv.voltageTin1 out10.0z-1rate limiterint. gain discrete-timeVCO INVintegratorhold0600vi , V; vc , Vcompensating capacitor value and the IGBT ratings, aswell as the controller gain. The simulation model is shownin Fig. 6. The system parameters are Lsp ¼ 122 mH, Csp ¼0.04 mF, Rlp ¼ 11.1 O (referred to the primary sideof the impedance matching transformer), Ts ¼ 200 ms,and tf ¼ 68 ms. Note that this model does not simulatethe PLL control algorithm as in the actual practical implementation, with the period T as the output of theVCO (software version). Instead, the frequency of theVCO output in this model is controlled by the VCOinput. However, the behaviours resulting from the twoapproaches are expected to be similar for sufficiently smalldeviations around the operating point. An equivalent gainof Kc ¼ 5.0 ms has been used in the simulations, which is thevalue that corresponds to the gain used in the experimentalsystem. Note that the theoretical limit for the gain from (11)is Kco9.8 ms.-400Vi nt1Vi sumcap. voltage transf. ratioxfnorm. filter volt.a1 sprod1 int1prod2-K1/Csrate lim2 v capxf0.5501/50.5000.4500.400i invinv. current1sint2R0.350start of transient0.3000.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50time, s1VccFig. 7 Simulation results for induction heating systemLsa Inverter voltage (vi) and current (ii)b Inverter voltage (vi) and capacitor voltage (vc) (referred to inverterside)c Transient response of filter output (xf) for a 20% sudden reductionin the load L and Rrate lim1bFig. 6 SIMULINK model for PLL-controlled induction heatingsystema Complete systemb Resonant load modelReferring to Fig. 6 the capacitor and inverter voltagesare passed through relays, which represent zero-crossingdetectors (ZCD), the outputs of which are applied tothe inputs of the XOR. The lowpass filter (LPF) outputis compared with the reference value of 0.5 and the erroris sampled by a first-order sample-and-hold, whichrepresents the analogue-to-digital conversion operation.The discrete-time integrator implements the integral controller. The VCO output in this simulation is the squarewave inverter output voltage, which is applied to theresonant load model. The rate limiter adjusts the rate ofchange of the inverter voltage during switches to practicalvalues.Fig. 7 shows sample simulation results for steady-stateand transient operation of the system. In the transient testcase, it is assumed that there are ramp changes in theinductance and the resistance of the coil from 90 mH to472 mH, and from 10 O to 8 O, respectively (Section 4). Thisemulates a transient test on the actual system in which theworkpiece is pulled out by almost 20%. In Fig. 7c it can beobserved that the PLL control strategy keeps the coilcurrent in phase with the inverter voltage under alloperating conditions.5Experimental resultsAn experimental prototype of the proposed system has beenset up using a Fuji IPM inverter module (7MBP 100RA120), with short-circuit, overcurrent, overtemperature andundervoltage protection logic. The system has beenoperated at an output power of 19.8 kW, an operatingfrequency of 72 kHz and an input voltage of 500 V. Theinverter output voltage and current, and the capacitorvoltage are presented in Figs 8 and 9. In Fig. 8c IGBTcollector–emitter voltages have been measured at 400 V,which is the maximum range of the oscilloscope. The outputvoltages of the PLL circuit (XOR and LP filter outputs)were also measured and are presented in Fig. 10. Atransient test has been performed at a lower power ofIEE Proc.-Electr. Power Appl.

viii0voltage: 200 V/div, current: 20 A/div, time: 2.5 µs/div(i)viii0voltage: 200 V/div, current: 20 A/div, time: 1 µs/div(ii)a0vcvi0voltage: 200 V/div, time: 2.5 µs/divb0voltage: 50 V/div; time: 500 ns/divcFig. 8 Experimental results for 19.8 kW outputa (i) Inverter voltage (vi) and current (ii). (ii) Inverter voltage and current, reduced timescale (1 ms/div)b Inverter voltage (vi) and capacitor voltage (vc)c Collector–emitter voltages of IGBTs on the same inverter leg3.3 kW with a different coil, where the workpiece wassuddenly partially pulled out of the coil (by about 20%).The transient change in the filtered output shows that thePLL control system brings the system back to unity powerfactor operation in about 50 ms. It is difficult to make acomparison with the simulation result under similarIEE Proc.-Electr. Power Appl.conditions, since the exact conditions in the test cannot bemodelled in the simulation. However, the response time inthe simulation is around 30 ms, which roughly agrees withthe practical result. Note that in the simulation result thetransient starts at t ¼ 250 ms and comes to an end att ¼ 280 ms. Comparison of steady-state experimental and5

ZCDoutputviii0XORoutput0voltage: 2 V/div, time: 2.5 µs/divavoltage: 200 V/div, current: 20 A/div, time: 2.5 µs/divFig. 9 Inverter voltage and current for a dead-band time of 1.2 mssimulation results reveals that the system design based onthe simulation model closely follows the predicted behaviour.Referring to Fig. 8a, (i), it can be observed thatthe inverter switches at exactly zero current which ensuresunity power factor. This also means that switching lossesare minimised as a result of zero current switching. Hence,in efficiency calculations the switching losses can beneglected and an estimate of the overall efficiency of theinverter based on conduction losses only can be obtained,usingZ¼2VCE;sat1 Vdcbstart of transient100%ð12Þas 98.9%. In (12) VCE,sat represents the saturation voltage ofthe IGBTs.Fig. 8a, (ii) displays the inverter current and voltage ona much smaller time scale and shows that the currentand voltage waveforms are exactly in phase. It may alsobe noted that the inverter switches in 1.2 ms. Furthermore,the inverter voltage exhibits no oscillations during switchingintervals. This is the result of zero-current switching andthe very small leakage inductance of the impedancematching transformer. The IGBT collector–emitter voltages(for IGBTs on the same inverter leg) on a narrow timescale are shown in Fig. 8c, where it is also clear that theIGBTs switch in about 0.8 ms, which is consistent withFig. 8b. Note that the IGBTs on the same leg switchalmost simultaneously without giving rise to shoot-through,which is again a result of zero-current switching. Fig. 8bshows that the inverter and capacitor voltages arephaseshifted by 901, which demonstrates that thePLL scheme operates successfully. The effect of increasingthe dead-band duration on the inverter output voltageis illustrated in Fig. 9, where the dead-band is adjustedto 1.2 ms. The oscillations in the voltage during the switchingintervals are the result of the feedback diodes trying to turnon as the load current reverses direction when the outgoingtransistors are turned off. During this transition period,the incoming transistors remain off due to the increaseddead-band. It is evident that such oscillations give rise toextra losses. Therefore, it can be concluded that the deadband duration is very critical in zero-current switchingapplications.6voltage: 100 mV/div, time: 2.5 µs/divvoltage: 100 mV/div, time: 50 ms/divcFig. 10a XOR output (lower trace)b Lowpass filter output in steady-statec Lowpass filter output for transient case6ConclusionsA DSP-based PLL-controlled induction heating system hasbeen described in which zero-current switching of theIGBTs and operation at unity power factor with negligibleoscillations on the inverter voltage are achieved through asoftware-based PLL control scheme using a DSP which hasa hardware dead-band feature. The proposed DSP-basedIEE Proc.-Electr. Power Appl.

PLL controller is more flexible and precise than conventional analogue PLL controllers, allowing easy modificationof control parameters (such as dead-band time andcontroller gain) via software, whereas in analogue implementations, which require hardware changes, these modifications would be far more difficult. The dead-band delaycan be kept constant at any predefined value, independentof the operating frequency, using the built-in dead-bandcircuitry. Experimental results reveal that the PLL controlscheme operates precisely as designed and no phase delaywas observed between the inverter output voltageand current. Transient tests on the system have shown thatafter a disturbance the PLL control system brings thesystem back to unity power factor operation within a timeof 50 ms.System parameters such as the turns ratio of theimpedance matching transformer, compensating capacitorvalue and IGBT ratings, as well as controller gain wereobtained from a simulation model. Agreement betweenpredicted simulation results and experimental results havevalidated the design.The use of a DSP-based control system has theadded advantage that different control schemes requiringdifferent heating periods and different adaptations of theinduction heating system can be implemented withmodifications to the software alone and no changes to thehardware.7Acknowledgments6 KUO, B.C.: ‘Digital Control Systems’, 1st Edn. (Holt-SaundersInternational Editions, Tokyo, 1981)9 AppendixThe phase difference f can be linearised by means of thefollowing truncated Taylor series:fðT Þ ’ fðT0 Þ þdfdTðT T0 Þð13ÞT ¼T0where T0 ¼ 2p/o0. The derivative can be evaluated from (5)asdfaðT 2 þ T02 Þ¼ 2dTðT T02 Þ þ a2 T 2ð14Þwhere a ¼ 2pRlCs. When evaluated at T ¼ T0, this derivativegivesdfdT21¼ ¼ apRl CsT ¼T0ð15ÞBy also noting that f(T0) ¼ p/2, (8) is obtained.Substituting (8) and (9) into (6) gives: 11Dxf ðk þ 1Þ þ ¼a Dxf ðkÞ þ22 b p1 þDT ðkÞp 2 pRl CsSimplification using the fact that b ¼ 1 a then yieldsThe authors wish to thank the Eastern MediterraneanUniversity Technology Development Centre (DAU-TEKMER) for their financial support.8References1 KAMLI, M., YAMAMOTO, S., and ABE, M.: ‘A 50-150 kHz halfbridge inverter for induction heating applications’, IEEE Trans. Ind.Electron., 1996, 43, (1), pp. 163–1722 WANG, S., IZAKI, K., HIROTA, I., YAMASHITA, H., OMORI,H., and NAKAOKA, M.: ‘Induction-heated cooking appliance usingnew quasi-resonant ZVS-PWM inverter with power factor correction’,IEEE Trans. Ind. Appl., 1998, 34, (4), pp. 705–7123 CALLEJA, H., and ORDONEZ, R.: ‘Improved induction-heatinginverter with power factor correction’. 30th Annual IEEE Powerelectronics specialists Conference, PESC 994 OKUNO, A., KAWANO, H., SUN, J., KUROKAWA, M.,KOJINA, A., and NAKAOKA., M.: ‘Feasible development of softswitched SIT inverter with load-adaptive frequency-tracking controlscheme for induction heating’, IEEE Trans. Ind. Appl., 1998, 34, (4), pp.713–7185 DAWSON, F.P., and JAIN, P.: ‘A comparison of load commutatedinverter systems for induction heating and melting applications’, IEEETrans. Power Electron., 1991, 6, (3), pp. 430–441IEE Proc.-Electr. Power Appl.Dxf ðk þ 1Þ ¼ aDxf ðkÞ ð1 aÞDT ðkÞp 2 Rl C sð16ÞSimilarly, substituting (8) and (9) into (7) gives 1DT ðk þ 1Þ ¼DT ðkÞ þ Kc a Dxf ðkÞ þ2 ð1 aÞ p11 þDT ðkÞ p2 pRl Cs2which simplifies toDT ðk þ 1Þ ¼ðaKc ÞDxf ðkÞ ð1 aÞKcþ 1 2DT ðkÞp Rl C sð17ÞEquations (16) and (17) can then be written in matrixform as in (10).7

High-frequency induction heating furnaces are widely used in applications such as surface hardening, welding, metal to plastic or metal to glass bonding and curing. The higher efficiency, very short heating times and local heating capabilities of induction heaters have made them s