Automotive EMC - Researchgate
Automobiles are Complex Electronic SystemsAutomotive EMCCommunication SystemNavigationSystemFuel InjectionCabin t SystemsNoise CancellationEmissions ControlsEngine IgnitionSecurity SystemLightingBraking ControlTodd HubingCollision AvoidanceSystemMi h li ProfessorMichelinP foff VehicularV hi l ElectronicsEl tiClemson UniversityTire ystemSeat and Pedal PositionStability ControlMO-AM-5-4Cars in the future will have ONE reliable, low-cost, lightweight network thatserves as the interface between every electronic sub-system in the vehicle.Current automotive electronics designand integration strategies are notsustainable.NavigationSystemFuel InjectionCabin EnvironmentControlsAirbaggDeploymentyEntertainment SystemsNoise CancellationEmissions ControlsEngine IgnitionSecurity SystemCars in the next decade will be verydifferent from an electronics integrationgstandpoint.LightingBraking ControlCollision AvoidanceSystemTire PressureMonitoring2Cars in the future Automobiles are Complex Electronic SystemsCommunication SystemAugust 18, 2008TransmissionSuspensionControlSystemSeat and Pedal PositionStability ControlAugust 18, 2008978-1-4244-1699-8/08/ 25.00 2008 IEEE3 Less than 2 kilograms of wire harness Data from every sensor available to every system Secure, reliable high-speed communication Simple, open diagnostics Redundant, distributed processing Both wired and wireless communicationAugust 18, 20084
Cars in the future Cars in the future Cars in the future will distribute ONLY low-voltage digital signalsand/or DC power to every electronic component. No PWM signals for power or control No analog signals At most 3 wires will be routed to any component Many components will require 1 or 0 wires Connectors will be small, reliable and low costAugust 18, 2008Cars in the future will not generate strong electric or magnetic fieldsand will not be susceptible to these fields even though theygenerate and store significant amounts of electric energy. Balanced design and integrated control willeliminate the need to have wiring harnessescarrying strong, time-varying currents. Intelligent, computer aided layout will ensure thatelectronic systems do not generate and are notsusceptible to electromagnetic interference.5The cars of the future are being designed Today!The companies leading the development of truly integratedelectronic systems will be the market leaders in the next decade.August 18, 2008The cars of the future are being designed Today!Cars with intelligently designed electronic systems will be: Li htLighter Market leaders in the electronics industry are theinnovators, not the adopters. More powerful More efficient Simply adopting the latest, greatest electronicsubsystems and tacking them on to existingautomotive platforms is a strategy that will notsucceed. Far more reliable.August 18, 200867August 18, 20088
Automotive EMC Standards Organizations International Electrotechnical Commission (IEC) International Organization for Standards (IOS)Automotive EMC StandardsEmissions Tests: CISPR, TC77 Vehicle Level Emissions TC22, SC3, WG3 CISPR 12 Society of Automotive Engineers (SAE)CISPR 25 Component Level Emissions Surface Vehicle EMC Standards Committee SAE J551-5 9 kHz – 30 MHz, Broadband IEC 61967 Integrated Circuit EmissionsAugust 18, 2008August 18, 20089Automotive EMC Standards10Automotive EMC StandardsVehicle Immunity Tests: CISPR 25 ALSEISO 11451-2,, SAE J551-11 Radiated Field Immunity(Absorber LinedShielded Environment) ISO 11451-3 On-Board Transmitter Susceptibility ISO 11451-4 Bulk Current Injection ISO 10606, SAE J551-15, IEC 61000-4-2 Electrostatic DischargeAugust 18, 200811August 18, 200812
Automotive EMC StandardsAutomotive EMC StandardsVehicle Immunity Tests: Component Immunity Tests:SAE J551-16 Reverberation Chamber Immunity RF Immunity - ALSESAE J551-17 Power Line Disturbances ISO 11452-8 ISO 11452-4 RF Immunity - BCIISO 10606, SAE J551-15, IEC 61000-4-2 Electrostatic DischargeAugust 18, 2008ISO 11452-3 RF Immunity – TEM Cell Magnetic Field Immunity ISO 11452-2ISO 11452-5 RF Immunity - Stripline13August 18, 2008Automotive EMC StandardsComponent Immunity Tests: ISO 11452-7Automotive Design for EMC Direct Injection ISO 11452-11 (Draft) Reverberation Chamber ISO 7637-2,3 Transient Immunity ISO 10605 Electrostatic DischargeAugust 18, 20081514
Automotive ElectronicsEMC Design GuidelinesBoard Level – Trace routing Harsh environmentCost drivenWeight drivenReliability is important10-year-plus life expectancyLow layer countsMany mixed signal designs(but, there are many exceptions)ooooooooooooooooooAugust 18, 200817EMC Design Guideline CollectionNo trace unrelated to I/O should be located between an I/O connector and the device(s) sending and receiving signalsusing that connector.All power planes and traces should be routed on the same layer.A trace with a propagation delay more than half the transition time of the signal it carries must have a matched termination.Capacitively-loaded nets must have a total source impedance equal to or greater than one-quarter of the line characteristicimpedance or a series resistor must be added to meet this condition.conditionNets driven at faster than 1V/ns slew rate must have a discrete series resistor at the source.Guard traces should be used to isolate high-speed nets from I/O nets.Guard traces should be connected to the ground plane with vias located less than one-quarter wavelength apart at thehighest frequency of interest.All power and ground traces must be at least three times the nominal signal line width. This does not include guard traces.If a ground or power separation is required, the gap must be at least 3 mm wide.Additional decoupling capacitors should be placed on both sides of a power or ground plane gap.Critical nets should be routed in a daisy chain fashion with no stubs or branches.Critical nets should be routed at least 2X from the board edge, where X is the distance between the trace and its returncurrent path.Signals with high-frequency content should not be routed beneath components used for board I/O.Differential pairs radiate much less than single-ended signals even when the traces in the pair are separated by many timestheir distance above a ground plane. However, imbalance in the pair can result in radiation comparable to an equivalentsingle-ended signal.The length of high-frequency nets should be minimized.The number of vias in high-frequency nets should be minimized.On a board with power and ground planes, no traces should be used to connect to power or ground. Connections should bemade using a via adjacent to the power or ground pad of the component.Gaps or slots in the ground plane should be avoided. They should ONLY be used in situations where it is necessary tocontrol the flow of low-frequency (i.e. less than 100 kHz) currents.August 18, 200818Identify Current Pathshttp://www.cvel.clemson.edu/emc/Where does the 10 kHz return current flow?August 18, 200819August 18, 200820
Identify Current PathsIdentify Current PathsWhere does the 56 MHz return current flow?Current takes the path of least impedance! 100 kHz this is generally the path of least inductance 10 kHz this is generally the path(s) of least resistanceAugust 18, 200821August 18, 2008Identify Current PathsWhere does the 1 kHz return current flow?AnalogAmplifierAlifiStrategies forSignal TerminationPOWERSUPPLY4 MHZOSC.Digital / Analog1 kHz Analog SignalPhotoTransistorFiberopticinputpower inputandhigh-speedsignal outputConnection to power planeConnection to ground planeAugust 18, 20082322
Signal TerminationSignal TerminationDigital Signal VoltagesCMOS Input ModelCMOS Driver ModelControl transition times of digital signals!August 18, 2008August 18, 200825Signal Termination26Signal TerminationDigital Signal CurrentsReducing risetime with aseriesi resistoritReducing risetime with aparallel capacitorftfControl transition times of digital signals!Can use a series resistor or ferrite when load is capacitive.Use appropriate logic for fast signals with matched loads.August 18, 200827August 18, 200828
Signal TerminationEliminatingg ringingg g with aseries resistorIdentifying Sources and AntennasMatched terminationsAugust 18, 200829Identify SourcesIdentify SourcesNoise on the Low-Speed I/OActive Devices (Power Pins)For some ICs, the high-frequency currents drawn from the power pinscan be much greater than the high-frequency currents in the signals!August 18, 2008For some ICs, significant high-frequency currents appear on low-speedI/O including outputs that never change state during normal operation!31August 18, 200832
Identify AntennasIdentify AntennasCommon-Mode vs. Differential ModeE max 1.26 10 6What makes an efficient antenna?I c fΔzrλ/2Half-Wave DipoleΔzElectrically Small LoopsE max 1.32 10 14 4 10 6I d f 2sΔzλ/4rQuarter-WaveQuarter Wave Monopole SizeI d fΔz s r λ August 18, 2008 Two Halves33August 18, 2008Identify AntennasGood Antenna PartsPoor Antenna Parts 100 MHz 100 MHz 100 MHz 100 MHzWiringHarnessesHeatsinksMicrostripor striplinetracesMicrostripor striplinetracesPowerplanesTallcomponentsSeams inshieldingenclosuresRecognizing Coupling MechanismsAnythingthat is notbigFree-space wavelength at 100 MHz is 3 metersAugust 18, 20083534
Recognize Coupling MechanismsRecognize Coupling MechanismsVoltage DrivenNoise can be coupled from a source to an antenna by one or more of threedifferent coupling mechanisms:Signal or component voltage appears between two good antenna parts.ConductedElectric field coupledExample:Magnetic field coupledVs 1 volt @ 500 MHzFor printed circuit board analysis and design, it is convenient to expressthese coupling mechanisms in terms of voltage and current.Erad 360 mV / m @ 3 metersMore than 60 dB above the FCC Class B limit!August 18, 200837Recognize Coupling MechanismsAugust 18, 200838Recognize Coupling MechanismsDirect coupling to I/OSignal current loop induces a voltage between two good antenna parts.Signals coupled to I/O lines carry HF power off the board.-Vcm Current driven voltageg tend to be 3 or 4 orders of magnitudegsmaller than voltage driven voltages. However, antennaefficiencies can be 5 or 6 orders of magnitude higher.August 18, 200839August 18, 200840
Grounding vs. Signal ReturnStrategies forGroundingAGND“Whenever I see more than one ofthese symbols on the schematic, Iknow there is [EMC] work for ushere.”T. Van DorenDGNDAugust 18, 2008Ground vs. Signal ReturnMost circuit boards should haveGround vs. Signal ReturnIf grounds are divided, it is generally to controlqy (( 100 kHz)) currents.the flow of low-frequencygground!For example,Why?Isolating battery negative (i.e. chassis ground) from digital groundIsolating digital ground from analog ground in audio circuits.Conductors referenced to different grounds can be good antennas.Signals referenced to two different grounds will be noisy (i.e.include the noise voltage between the two grounds).This can be necessaryy at times to ppreventcommon impedance coupling between circuitswith low-frequency high-current signals and othersensitive electronic circuits.Layouts with more than one ground are more difficult, require morespace and present more opportunities for critical mistakes.Excuses for employing more than one ground are generally basedon inaccurate or out-dated information.August 18, 20084243August 18, 200844
Chassis Ground and Digital ReturnGround vs. Signal ReturnWhere should the transient protection be grounded?Wiring HarnessChassis connectionto chassis groundChassis connectionto chassis groundORCapacitors connectingchassis ground to thedigital return planeDigital Return PlaneChassis Ground PlaneDigital GNDAugust 18, 2008Chassis GNDAugust 18, 20084546ShieldingAperturesVdaughter cardStrategies forShielding- HF SourceShieldingVirtually Non-existentin automotiveelectronics! VcableVpower bus -Vheatsink V- board-chassis Vboard -ICMRequires: Filtering of all wire penetrationsControlled aperture sizesGasketed seamsAugust 18, 200848
ShieldingShielding(a.)Electric FieldShieldingMagneticFieldShielding(b.) V -(at high frequencies)- V (c.)August 18, 200849August 18, 2008ShieldingStrategies forPower Bus DecouplingMagneticFieldShielding(at low frequencies)August 18, 20085150
Conflicting Rules for PCB DecouplingBoards with Closely Spaced Power PlanesUse small-valued capacitors for high-frequency decoupling.Use 0.01 μF for local decoupling!Use capacitors with a low ESR!Locate capacitors near thepower pins of active devices.Avoid capacitors with a lowESR!Location of decouplingcapacitors is not relevantrelevant.Use the largest valuedcapacitors you can find ina given package size.CbUse 0.001 μF for local decoupling!CdCdLocate capacitors near theground pins of active devices.Never put traces ondecouplingdli capacitors.itLocal decoupling capacitors should have arange of values from 100 pF to 1 μF!August 18, 2008Power Distribution Model (5 - 500 MHz)Board with power and ground planes53August 18, 20085455August 18, 200856For Boards with “Closely“Closely-Spaced” PlanesThe location of the decoupling capacitors is not critical.The value of the local decoupling capacitors is not critical, but itmust be greater than the interplane capacitance.The inductance of the connection is the most important parameterof a local decoupling capacitor.None of the local decoupling capacitors are effective above acouple hundred megahertz.None of the local decoupling capacitors are supplying significantcharge in the first few nanoseconds of a transition.August 18, 2008
Power Bus Decoupling StrategyBoards with Power Planes Spaced 0.5 mmWith closely spaced ( .25 mm) planes¾¾¾¾¾¾size bulk decoupling to meet board requirementssize local decoupling to meet board requirementsmount local decoupling in most convenient locationsdon’t put traces on capacitor padstoo much capacitance is oktoo much inductance is not okCbCdCdReferences:T. H.TH Hubing,Hubing J.J L.L Drewniak,Drewniak T.T P.P Van Doren,Doren and D.D Hockanson,Hockanson “PowerPower Bus Decoupling on Multilayer Printed CircuitBoards,” IEEE Transactions on Electromagnetic Compatibility, vol. EMC-37, no. 2, May 1995, pp. 155-166.T. Zeeff and T. Hubing, “Reducing power bus impedance at resonance with lossy components,” IEEE Transactions onAdvanced Packaging, vol. 25, no. 2, May 2002, pp. 307-310.M. Xu, T. Hubing, J. Chen, T. Van Doren, J. Drewniak and R. DuBroff, “Power bus decoupling with embedded capacitance inprinted circuit board design,” IEEE Transactions on Electromagnetic Compatibility, vol. 45, no. 1, Feb. 2003, pp. 22-30.August 18, 200857Boards with Power Planes Spaced 0.5 mmAugust 18, 200858Where do I mount the capacitor?ML TRACELLVIAPORT 1VIAC BOARDLHere?TRACEVCCPORT 2GNDHere?DECOUPLINGCAPACITORACTIVE DEVICELOOP ALOOP A and LOOP BSIGNAL PLANEPOWER PLANEGROUND PLANESIGNAL PLANEOn boards with a spacing between power and ground planes of 30 mils (0.75 mm) ormore, the inductance of the planes can no longer be neglected. In particular, the mutualinductance between the vias of the active device and the vias of the decouplingcapacitor is important. The mutual inductance will tend to cause the majority of thecurrent to be drawn from the nearest decoupling capacitor and not from the planes.August 18, 200859POWERGNDAugust 18, 200860
For Boards with “Widely“Widely--Spaced” PlanesLocal decoupling capacitors should be located as close to the activedevice as possible (near pin attached to most distant plane)plane).The value of the local decoupling capacitors should be 10,000 pF orgreater.The inductance of the connection is the most important parameter ofa local decoupling capacitor.Local decouplingp g capacitorspcan be effective upp to 1 GHz or highergifthey are connected properly.August 18, 2008Power Bus Decoupling Strategy62Power Bus Decoupling StrategyWith widely spaced ( .5 mm) planes¾¾¾¾¾¾August 18, 200861With no power planesize bulk decoupling to meet board requirementssize local decoupling to meet device requirementsmount local decoupling near pin connected to furthest planedon’t put traces on capacitor padstoo much capacitance is oktoo much inductance is not ok¾¾¾¾¾layout low-inductance power distributionsize bulk decoupling to meet board requirementssize local decoupling to meet device requirementstwo caps can be much better than oneavoid resonances by minimizing LReferences:J. Chen, M. Xu, T. Hubing, J. Drewniak, T. Van Doren, and R. DuBroff, “Experimental evaluation of power bus decoupling ona 4-layer printed circuit board,” Proc. of the 2000 IEEE International Symposium on Electromagnetic Compatibility,W hi t D.C.,WashingtonD C AugustAt 2000,2000 pp. 335-338.335 338R fReferences:T. H. Hubing, T. P. Van Doren, F. Sha, J. L. Drewniak, and M. Wilhelm, “An Experimental Investigation of 4-Layer PrintedCircuit Board Decoupling,” Proceedings of the 1995 IEEE International Symposium on Electromagnetic Compatibility,Atlanta, GA, August 1995, pp. 308-312.T. Hubing, “Printed Circuit Board Power Bus Decoupling,” LG Journal of Production Engineering, vol. 3, no. 12, December2000, pp. 17-20. (Korean language publication) .T. Zeeff, T. Hubing, T. Van Doren and D. Pommerenke, “Analysis of simple two-capacitor low-pass filters,” IEEETransactions on Electromagnetic Compatibility, vol. 45, no. 4, Nov. 2003, pp. 595-601.J. Fan, J. Drewniak, J. Knighten, N. Smith, A. Orlandi, T. Van Doren, T. Hubing and R. DuBroff, “Quantifying SMTDecoupling Capacitor Placement in DC Power-Bus Design for Multilayer PCBs,” IEEE Transactions on ElectromagneticCompatibility, vol. EMC-43, no. 4, Nov. 2001, pp. 588-599.August 18, 200863August 18, 200864
Power Bus Decoupling StrategyLow-impedance planes or traces?¾¾¾¾choice based on bandwidth and board complexityplanes are not always the best choiceit is possible to achieve good decoupling either waytrace inductance may limit current to active devicesStrategies dPCB LayoutPlanes widely spaced or closely spaced?¾ want local or global decoupling?¾ want stripline traces?¾ lower impedances obtainable with closely spaced planes.August 18, 200865Mixed--Signal DesignsMixedMixed--Signal DesignsMixedExample: How would you modify this design?If you have analog and digital returns that must beiisolatedl t d (t(to preventt common-impedanceidcoupling):li )Route the returns on separate conductorsProvide a DC connection at the one point (orin the one area) where the referencepotential must be the same.This must include everyplace where a tracecrosses the boundary between the analogand digital regions.August 18, 200867August 18, 200868
Mixed--Signal DesignsMixedDesign Guideline ReviewExample: A much better designMost important guidelines:Keep signal loop areas smallDon’t locate circuitry between connectorsControl transition times in digital signalsNever cut gaps in a solid return planeAugust 18, 200869SummaryAugust 18, 200870Numerical Electromagnetic Modeling ToolsHowever, don’t rely on design guidelines!Visualize signal current pathsLocate antennas and crosstalk pathsBe aware of potential EMI sourcesUse common sense!August 18, 200871August 18, 200872
Numerical Electromagnetic Modeling ToolsCOMPLIANCE FIDELITY COMSOL ufieldEMAGSPEED2000EMAPCOULOMBMicrowave StudioQ3DPAM-CEMMAGNETOMiniNECAugust 18, 2008EMC Expert System CalculationsE 20 I 0(max ) f max (θ , k ) 20 August 18, 20087374Automotive EMC Expert SystemWe have developed algorithms to detect and eliminate potential EMC problems early in the designprocess.Vmin 2.7637 ohmλ 2πl cable sin λ when l cable 4cable rad factor 1.0otherwise λ 2π lboard sin λ when lboard 4board size factor otherwise1.0 E min E cable
Automotive EMC Standards SAE J551-16 Vehicle Immunity Tests: SAE J551-17 ISO 11452-8 Reverberation Chamber Immunity Power Line Disturbances Magnetic Field Immunity August 18, 2008 13
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Automotive EMC Is Changing Global shift towards new propulsion systems is changing the content of vehicles. These new systems will need appropriate EMC methods, standards, and utilization of EMC approaches from other specialties. Many of these systems will utilize high voltage components and have safety aspects that may make automotive EMC more difficult and safety takes priority! 20 .
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