Freescale Semiconductor, Inc.
Freescale Semiconductor, Inc.Freescale Semiconductor, Inc.Engineering BulletinEB376/DRev. 2, 11/2001A comparison of theMC9S12DP256 (mask set0K36N) versus the HC12By Joachim KrückenBEOS MCU DesignMunich/Germany Motorola, Inc., 2001For More Information On This Product,Go to: www.freescale.com
Freescale Semiconductor, Inc.Freescale Semiconductor, Inc.EB376/D Rev. 22A Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.comMOTOROLA
Freescale Semiconductor, Inc.Freescale Semiconductor, Inc.EB376/D Rev. 2Table of ContentsTable of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Conventions Used Throughout This Document . . . . . . . . . . . . . . . . . . . . . . . . . .Module Base Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5556Central Processing Unit (CPU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .MOVB/MOVW instructions: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Instructions with cycle count reduced by 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Instructions with cycle count reduced by 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Instructions with cycle count increased by 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . .Instructions with operations re-ordered . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7778889Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Summary of Additional Functions on MC9S12DP256 . . . . . . . . . . . . . . . . . . . .MC9S12DP256 Power Supply Detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11111113EEPROM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15EEPROM Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15MC9S12DP256 Versus 68HC912DG128 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Flash Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17MC9S12DP256 Versus 68HC912DG128 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Port Integration Module (PIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19I/O port configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Clocks and Reset Generator (CRG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Clocks and Reset Generator (CRG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21MC9S12DP256 Versus 68HC912DG128 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Pulse Width Modulator (PWM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Summary of Additional Functions on MC9S12DP256 . . . . . . . . . . . . . . . . . . . .Comparison of PWM Equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Register Block Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .MOTOROLAA Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.com23232323253
Freescale Semiconductor, Inc.Freescale Semiconductor, Inc.EB376/D Rev. 2Enhanced Capture Timer (ECT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Summary of Additional Functions on MC9S12DP256 . . . . . . . . . . . . . . . . . . . .Register Block Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29292929Serial Communications Interface (SCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Summary of Additional Functions on MC9S12DP256 . . . . . . . . . . . . . . . . . . . .Register Block Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31313132Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Summary of Additional Functions on MC9S12DP256 . . . . . . . . . . . . . . . . . . . .Register Block Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33333334Inter-IC Bus (IIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Summary of Additional Functions on the MC9S12DP256 . . . . . . . . . . . . . . . . .Register Block Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37373738Motorola Scalable CAN (MSCAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Summary of Additional Functions on MC9S12DP256 . . . . . . . . . . . . . . . . . . . .Register Block Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39394041Analog-to-Digital Converter (ATD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Summary of Additional Functions on MC9S12DP256 . . . . . . . . . . . . . . . . . . . .Register Block Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43434345Byte Data Link Controller (BDLC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Summary of Additional Functions on MC9S12DP256 . . . . . . . . . . . . . . . . . . . .Register Block Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53535354Background Debug Module (BDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Summary of Additional Functions on MC9S12DP256 . . . . . . . . . . . . . . . . . . . .Register Block Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Breakpoint registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57575758584A Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.comMOTOROLA
Freescale Semiconductor, Inc.Freescale Semiconductor, Inc.EB376/D Rev. 2OverviewIntroductionOverviewThis document compares the various modules of the MC9S12DP256 (mask0K36N) with equivalent modules in the HC12 family and is meant to be used asa guide in conjunction with the appropriate device Data Books.It is structured (where possible) to align with the Chapter structure of theMC9S12DP256 Technical Data Book, MC9S12DP256/D.Generally, the first subsection of each chapter highlights the differences infeatures of the two devices. Where appropriate, this is followed by acomparison of the individual registers and bits.The HCS12 (MC9S12DP256) design methodology includes a greatly improvedhighly flexible I/O structure. On the HC12, port control is managed by registerbits in the appropriate peripheral modules. On the MC9S12DP256, thefunctionality of these bits has been greatly expanded and centralized in thePort Integration Module (PIM).Conventions Used Throughout This DocumentIn the register comparisons, the bits highlighted in bold italics indicate thedifferences between the corresponding registers of the devices beingcompared.Registers not identified remain identical.Port I/O control bits are not included in the register comparisons as theirfunctionality has been transferred to the PIM. For detail on the I/O philosophyand Port registers refer to the Port Integration Module (PIM) chapter in thisdocument and in the MC9S12DP256 Technical Data Book, MC9S12DP256/D.MOTOROLAA Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.com5
Freescale Semiconductor, Inc.EB376/D Rev. 2Module Base AddressesThe following table lists the base addresses for each module on theMC9S12DP256 and their equivalent on the 68HC912DG128 (or 68HC912B32in the case of the BDLC module).Table 1Module Base AddressesBase AddressFreescale Semiconductor, Inc.Module668HC912DG128MC9S12DP256BKPT 20 28CRG(CGM) 34 34ECT 80 40ATD0 60 80PWM 40 A0SCI0 C0 C8SCI1 C8 D0SPI0 D0 D8IIC E0 E0BDLC F8 (on 68HC912B32 not68HC912DG128) E8SPI1— F0SPI2— F8Flash F4 100EEPROM F0 110ATD1 1E0 120MSCAN0 100 140MSCAN1 300 180MSCAN2— 1C0MSCAN3— 200PIM— 240MSCAN4— 280BDM FF00 FF00A Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.comMOTOROLA
Freescale Semiconductor, Inc.Freescale Semiconductor, Inc.EB376/D Rev. 2IntroductionCentral Processing Unit (CPU)Introduction Identical programmers model. Pipe increased to 3 stages (from 2 plus latch) giving deterministicbehavior. All instructions implemented using same Mnemonics & Op codes. Further detail can be found in the HCS12 CPU Reference Guide.MOVB/MOVW instructions:On the HC12, when using the PC relative addressing mode, an offset isrequired to be added to/subtracted from the displacement computed fromthe base address, which is equal to the address of the next instruction. Thisis detailed in chapter 3.9.1 of the CPU12 Reference Manual (CPU12M/AD).It is handled transparently by assemblers and compilers for the HC12 today.On the HCS12 this is no longer the case. This base is the same for bothsource and destination operands and any assemblers/compilers thatcalculate an offset will generate incorrect code.ExamplesMOVB2,PCR, 1000DC.B1,2,3,4,5,6,7,8,9HCS12: 1000 is written to 3HC12: 1000 is written to 1The other way roundMOVB 1000,2,PCRTEMPDS.B10HCS12: Value read at 1000 is moved to TEMP 2HC12: Value read at 1000 is moved to TEMP 5It is important to ensure that a compiler or assembler is HCS12 compliant onthis point.MOTOROLAA Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.com7
Freescale Semiconductor, Inc.Freescale Semiconductor, Inc.EB376/D Rev. 2Instructions with cycle count reduced by DX1IDX1EXT, IDX, IDX1, IDX2 (7,7,7,8)[D,IDX], [IDX2][D,IDX], [IDX2][D,IDX], [IDX2][D,IDX], [IDX2][D,IDX], [IDX2][D,IDX], [IDX2][D,IDX], [IDX2]INH (entering)INH (mapped to multiple op codes)INH (entering)Instructions with cycle count reduced by 2BRCLRIDX2BRSETIDX2MULINHTBLIDXInstructions with cycle count increased by 1NOTE:8RTCINHRTIINH (with pending interrupt)STOPINH (exiting)WAIINH (interrupt occurs)The increase in RTC is compensated for by the reduction in the number ofcycles in the CALL instruction. Effective throughput is the same number ofcycles except CALL IDX2, RTC.A Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.comMOTOROLA
Freescale Semiconductor, Inc.EB376/D Rev. 2Instructions with operations re-orderedInstructions with operations re-orderedFreescale Semiconductor, Inc.In order to make the cycle by cycle operation the same for similarinstructions, the free cycle "f" has been moved to the last operation (133cases). [Pf at end of instruction even number of cycles]In order to make the cycle by cycle operation the same for similarinstructions, the optional program word fetch cycle "O" has been moved tothe last operation (72 cases). [PO at the end of instruction odd number ofcycles]In 14 other cases the cycle by cycle sequence has been modified to end inthe program word fetch "P" (no "f" or "O" cycles in instructions).A total of 219 cycle order changes have been made in the CPU operation.These should be transparent for most applications.MOTOROLAA Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.com9
Freescale Semiconductor, Inc.Freescale Semiconductor, Inc.EB376/D Rev. 210A Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.comMOTOROLA
Freescale Semiconductor, Inc.Freescale Semiconductor, Inc.EB376/D Rev. 2IntroductionHardwareIntroductionThe MC9S12DP256 has many more (multiplexed) peripheral modules than the68HC912DG128 and a significantly different power supply structure to cater forit’s low voltage, high performance 0.25µ core logic and 5V compatible, highlyflexible I/O ports.This requires a different printed circuit board (PCB) layout.Hybrid layouts, supporting both foot prints, can be achieved using acombination of jumpers, pull-up/down resistors and solderable links but theseare likely to result in significant compromises in performance and EMC.This section compares the PCB requirements of the MC9S12DP256 with thoseof the 68HC912DG128. The first section highlights the differences in features,including some considerations on power supply layout and decoupling.Summary of Additional Functions on MC9S12DP256 ATDVRL and VRH voltage reference inputThe MC9S12DP256 requires a single ATD voltage reference input andreference ground pin shared by both converters as opposed to theseparate reference connections for each converter on the68HC912DG128. Pin out changes and Package detailsThe mechanical package is identical (112 pin LQFP, Case 987) to the68HC912DG128 but many pins with equivalent functionality havechanged location. ATD channel conventionOn the MC9S12DP256, the channels for ATD1 are referred to in thedocumentation by AN08–AN15 instead of AN10–AN17 as on the68HC912DG128. This gives clear and consistent channel numberingfrom 00 on up allowing for future implementations of converters withgreater than 8 input channels.Physically, the channels of ATD1 (AN08–AN15) remain interlaced withthe channels of ATD0 (AN00–AN07) as on the 68HC912DG128 but theirlocation relative to pin 1 has moved.MOTOROLAA Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.com11
Freescale Semiconductor, Inc.EB376/D Rev. 2 EXTAL pinThe oscillator is part of the higher frequency logic, hence EXTAL inputis limited to 2.5V signals. XTAL pinThe XTAL output can be buffered with a high-impedance buffer to drivethe EXTAL input of another device. On the MC9S12DP256, themaximum output voltage of this pin is VDDPLL (2.5V). Port KFreescale Semiconductor, Inc.The MC9S12DP256 has 6 pins on Port K to support 64 x 16K pages ofexternal memory (1 Mbyte). VSTBY pinThere is no RAM standby function on the MC9S12DP256, so the VSTBYpin has been removed. MODC pinPreviously referred to as SMODN, this is for factory test only. The pincontinues to act as the background debug pin in user applications. TEST pinThis is a ‘factory-test’ only input and MUST be grounded or pulled toground with a pull-down resistor in all other applications. ECLK outputECLK control is significantly different. Please refer to the Port E andPEAR register sections of the MC9S12DP256 Technical Data Book,MC9S12DP256/D for details. Port E7 pinOn the MC9S12DP256, the alternate functionality of this pin haschanged – (CAL function not available, *ECLK not available, *DBE notavailable). Pulling PE7 (*XCLKS) low during the reset phase bypassesthe internal low current oscillator and an internal buffer (2.5V) driven byEXTAL feeds the internal clocks. Port K7 pin.On the MC9S12DP256, this pin is used as an emulation chip selectsignal for the emulation of the internal memory expansion or as generalpurpose I/O, depending upon the state of the EMK bit in the MODEregister.The value on this pin during reset determines the state of the ROMONbit during reset into all expanded modes.12A Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.comMOTOROLA
Freescale Semiconductor, Inc.EB376/D Rev. 2MC9S12DP256 Power Supply Detail Flash programming voltageOn the MC9S12DP256, the non-volatile Flash memory is ‘5V only’ anddoes not require an external VFP Pin as on the 68HC912DG128; thisremoves the need for an external charge pump.MC9S12DP256 Power Supply DetailFreescale Semiconductor, Inc.The MC9S12DP256 has an internal 2.5V regulator to supply the highperformance core logic as opposed to the 5V only logic supply of the68HC912DG128. Some key points are highlighted here, but it is essential thatthe Voltage Regulator (VREG) Chapter of the MC9S12DP256 Technical DataBook be reviewed in detail. VREGEN PinI/P used to define the standby operating mode of the internal voltageregulator. VDD1 & VDD2 Pins2.5V supply pins for the core logic which require decoupling. VDDPLL PinOn the 68HC912DG128, this pin, when grounded, caused the PLLcircuitry to be bypassed. On the MC9S12DP256, it is a 2.5V (internal)supply pin for the high performance PLL logic and must NOT begrounded (or connected to 5V). Layout considerationsAvoid current loops in power supply tracks.All ground pins (VSS**) must be connected externally.VDDA/VSSA and VRH/VRL supplies MUST be clean.Connection for external power supply monitor should be close to VDDA. Further Decoupling GuidelinesFor all capacitors in the nF range, it is essential to use a type with lowESR.All recommendations are load and PC board routing dependent.– VDDXThis is highly dependent on the type of load and switching frequencysince VDDX supplies only the 5V drivers in Ports J, K, T, P, M & S.Start with 47–220nF and add 10µF if big loads are switched and thesupply track is long (highly inductive).All fast switching peripherals, PWM, timer, CAN etc. are located onthis bus.MOTOROLAA Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12For More Information On This Product,Go to: www.freescale.com13
Freescale Semiconductor, Inc.EB376/D Rev. 2–VDDA–Here a good noise decoupling is key; the internal load is almoststatic.Recommended 22nF–100nF.VDD1,2–These are the outputs of the internal voltage regulator.Recommended 47–220nF.VDDRFreescale Semiconductor, Inc.This pin supplies the internal regulator as well as the I/O ports A, B,E & H.Two alternatives:a. Expanded busHigh peak current through Port A, B, E mainly.Recommended 100nF 10uF.b. Single chip mode.Here we have a load dependent
MOTOROLA A Comparison of the MC9S12DP256 (Mask Set 0K36N) Versus the HC12 5 Introduction Overview This document compares the various modules of the MC9S12DP256 (mask 0K36N) with equivalent modules in the HC12 family and is meant to be used as a guide in conjunction with the appropriate device Data Books.
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DSP56800 Family Manual. Motorola, Inc. 1996. Motorola DSP Simulator Reference Manual. Motorola, Inc. 1996. Motorola DSP Assembler Reference Manual. Motorola, Inc. 1996. F r e e s c a l e S e m i c o n d u c t o r, I Freescale Semiconductor, Inc. For More Inf
ADEKA SUPER TEOS PRODUCT NAME Si(OC 2H5)4 CHEMICAL FORMULA APPLICATION Dielectric film/Semiconductor ADEKA HIGH-PURITY TEOP PO(OC 2H5)3 Dopant/Semiconductor ADEKA HIGH-PURITY TEB B(OC 2H5)3 Dopant/Semiconductor ADEKA HIGH-PURITY TiCl4 TiCl4 Electrode/Semiconductor ADEKA SUPER TMA Al(CH 3)3 High-k material/Semiconductor ADEKA ORCERA TDMAH Hf[N(CH 3)2]4 High-k material/Semiconductor
Use separate power and ground planes for digital and analog supply pins Theoretical background Cookbook for SAR ADC Measurements , Rev 1, 04/2014 2 Freescale Semiconductor, Inc. If the analog and digital circuits are connected to the same power supply a small inductor (or fer
Freescale Semiconductor Data Sheet Document Number: MPC8610EC Rev. 2, 01/2009 Freescale Semiconductor, Inc., 2008, 2009. All rights reserved. Features High .
Freescale Semiconductor, Inc., 2009. All rights reserved. Freescale Semiconductor Technical Data 1Overview The MPC8641 processor family integrates either one or .
4 Freescale Semiconductor 1 Pins and Connections 1.1 Block diagram Figure 1. Device block diagram 1.2 Device pin out Figure 2. USB2SER — 24-QFN Package System Control Reset Power Management Reset Suspend Resume User Flash 512 Bytes Clock Generator Module EXTAL XTAL System Voltage Regulator USB 3.3 Voltage Regulator VDD VSS VUSB33 USB Module .
