Silicon Carbide And Nitride Materials Catalog

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Silicon Carbide andNitride Materials Catalog

WOLFSPEED MATERIALSIndustry-Leading Portfolio, Innovation and ScaleWolfspeed is a fully integrated materials supplier with the largest and most diverse product portfolio serving our globalcustomer base with a broad range of applications. We are the technology commercialization leader with the capacityand scale to bring large diameter wafers and high-quality epitaxy to the market in mass production volumes.Wolfspeed has long-proven expertise in SiC and GaN materials technology advancement with the focus andcommitment to bring high-quality solution platforms across all applications.n-TYPEHPSISiC SubstratesHigh PuritySemi-InsulatingSiC SubstratesSiCEPITAXYNITRIDEEPITAXYn-type and p-typeEpitaxial LayersGaN, AlGaN, AlInNEpitaxial LayersAPPLICATIONSSiC and GaN materials enable faster, smaller, lighter and more powerful electronic systems. Wolfspeed is committedto providing our customers with the materials needed to facilitate the rapid expansion and adoption of the technologywithin the industry.Our materials enable devices that power Renewable Energy, Base Stations & Telecom, Traction, Industrial MotorControl, Automotive applications and Aerospace and Defense.1RENEWABLEENERGYBASE STATIONSTELECOMTRACTIONINDUSTRIAL MOTORCONTROLAUTOMOTIVEAEROSPACEAND DEFENSE

PHYSICAL PROPERTIESPolytypeSingle-Crystal 4HSupported diameters100 mm & 150 mmCrystal structureHexagonalBandgap3.26 eVa 4.2 W/cm K @ 298 KThermal conductivity (n-type; 0.020 Ω*cm)c 3.7 W/cm K @ 298 Ka 4.9 W/cm K @ 298 KThermal conductivity (HPSI)c 3.9 W/cm K @ 298 Ka 3.073 ÅLattice parametersc 10.053 ÅMohs hardness9DIMENSIONAL PROPERTIES, TERMINOLOGY, AND METHODS*DIAMETERThe linear dimension across the surface of a wafer. Measurement is performed using anautomated optical micrometer, traceable to the ANSI standard, providing the average valuefor each individual wafer.THICKNESS,CENTER POINTMeasured with ANSI-certified non-contact tools at the center of each individual wafer.SURFACEORIENTATIONDenotes the orientation of the surface of a wafer with respect to a crystallographic plane withinthe lattice structure. In wafers cut intentionally “off orientation,” the direction of cut is parallelto the primary flat, away from the secondary flat. Measured with x-ray goniometer on a sampleof one wafer per boule in the center of the wafer.ORTHOGONALMISORIENTATIONIn wafers intentionally cut “off orientation,” the angle between the projection of the surfacenormal onto a (0001) plane and the nearest [1120] direction.WAFER SCRIBEWolfspeed is transitioning to a new wafer scribe format based upon SEMI specificationM12-0706. This conversion, which is projected to be fully integrated in 2022, brings severalimprovements. The M12-based scribe will be positioned upright when the major flat or notchis oriented up, making the scribe easier to read when the wafers are loaded into cassettes. Thenew format includes a wafer supplier identification code, validating the wafer's authenticity.It also includes a checksum, which is an error-detection method that prevents OCR mis-readerrors and reduces the instance of processing errors associated with such events.U8120FN1CIX0Wafer IDVendor IDChecksumNotes: * Please reference SEMI M55.2

HOW TO ORDER0 Standard MPDV Very-Low MPD ( 5/cm2)U Ultra-Low MPD ( 1/cm²)B Low BPD ( 1500/cm²),MPD ( 1/cm²)C 0.015 - 0.028 Ω·cmQ 1E6 Ω·cmR 1E6 Ω·cmX 0.013 - 2.00 Ω·cm0 NoneS Standard SiC ( 30 µm)T Thick SiC ( 30 µm)G GaN EpitaxyF 100 mm (4”)G 150 mm (6”)N n-typeT HPSIW Standard4 4H-SiCC1 350 µm ThicknessN 500 µm Thicknessw/ notchP ProductionR ResearchThis character only applicableto 150 mm wafers.0 On-Axis4 4 Off-Axis2 Double-side Polish,Silicon Face CMP6 Double-side Polish,Carbon Face CMPSiC Epitaxy:0 No Epitaxy1 1 Layer2 2 Layer3 3 Layer4 4 Layer3GaN Epitaxy:0 No EpitaxyA HEMT 25% AlE HEMT 25% AlI Other HEMT

Our Products

N-TYPE SiC SUBSTRATEPRODUCT DESCRIPTIONSThe Materials Business Unit produces a wide assortment of n-type conductive SiC products ranging in wafer diametersup to 150 mm. Wolfspeed's industry-leading, high-volume platform process provides our customers with the highestdegree of material quality, supply assurance and economies of scale.5Part NumberDescriptionW4NRF4C-V2004H-SiC, n-type, Research Grade, 100 mm, 4 Off-Axis, 0.015-0.028 Ω·cm, Very Low MPD 5/cm2, 350 µm Thickw/ 32.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4NPF4C-V2004H-SiC, n-type, Production Grade, 100 mm, 4 Off-Axis, 0.015-0.028 Ω·cm, Very Low MPD 5/cm2, 350 µmThick w/ 32.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4NRF4C-U2004H-SiC, n-type, Research Grade, 100 mm, 4 Off-Axis, 0.015-0.028 Ω·cm, Ultra Low MPD 1/cm2, 350 µm Thickw/ 32.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4NPF4C-U2004H-SiC, n-type, Production Grade, 100 mm, 4 Off-Axis, 0.015-0.028 Ω·cm, Ultra Low MPD 1/cm2, 350 µmThick, w/ 32.5 mm Flat Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4NPF4C-B2004H-SiC, n-type, Production Grade, 100 mm, 4 Off-Axis, 0.015-0.028 Ω·cm, Ultra Low MPD 1/cm2, Low BPD 1500/cm2, 350 µm Thick w/ 32.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4NRG4C-C1-V2004H-SiC, n-type, Research Grade, 150 mm, 4 Off-Axis, 0.015-0.028 Ω·cm, Very Low MPD 5/cm2, 350 µm Thickw/ 47.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4NPG4C-C1-V2004H-SiC, n-type, Production Grade, 150 mm, 4 Off-Axis, 0.015-0.028 Ω·cm, Very Low MPD 5/cm2, 350 µmThick w/ 47.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4NRG4C-C1-U2004H-SiC, n-type, Research Grade, 150 mm, 4 Off-Axis, 0.015-0.028 Ω·cm, Ultra Low MPD 1/cm2, 350 µm Thickw/ 47.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4NPG4C-C1-U2004H-SiC, n-type, Production Grade, 150 mm, 4 Off-Axis, 0.015-0.028 Ω·cm, Ultra Low MPD 1/cm2, 350 µmThick w/ 47.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4NPG4C-C1-B2004H-SiC, n-type, Production Grade, 150 mm, 4 Off-Axis, 0.015-0.028 Ω·cm, Ultra Low MPD 1/cm2, Low BPD 1500/cm2, 350 µm Thick w/ 47.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateFLAT LENGTHLinear dimension of the flat measured with automated opticalmicrometer on a sample of one wafer per boule (see Figure 1).PRIMARY FLATThe flat of the longest length on the wafer, oriented such that thechord is parallel with a specified low-index crystal plane.PRIMARY FLATORIENTATIONThe primary flat is the (1100) plane with the flat face parallel to the[1120] direction. Measured with XRD back reflection technique.SECONDARYFLATA flat of shorter length than the primary flat, whose position withrespect to the primary flat identifies the face of the wafer. Notapplicable to 150 mm wafers.SECONDARY FLATORIENTATIONThe secondary flat is 90 clockwise from the primary flat, 5 ,referencing the silicon face up.MARKINGFor silicon face polished material, the carbon face of each individualwafer is laser-marked with OCR-compatible font, similar todefinitions and characteristics in SEMI M12. The laser markings areoffset right when looking at the carbon face with the primary flat orienteddown (see Figure 1 and 2). For carbon face polished material, thesilicon face of each individual wafer is laser-marked.WaferDiameterXXXXXXXXXXPrimary FlatFigure 1. Diameter, primary flat location andmarking orientation, carbon faceup for silicon face polished 150 mm wafersSecondaryFlatXXXXXXXXXXPrimary FlatFigure 2. Primary flat location and markingorientation, carbon face up for silicon facepolished 100 mm wafers

PRODUCT SPECIFICATIONS100 mm Diameter n-type SubstratesDiameter100.0 mm 0.0/-0.5 mmThickness350.0 µm 25.0 µmDopantPrimary flat lengthSecondary flat lengthSurface orientationSurface finishOrthogonal misorientationPrimary flat orientationSecondary flat orientationNitrogen32.5 mm 2.0 mm18.0 mm 2.0 mm4.0 toward [1120] 0.5 Back face optical polish, epi-face CMP 5.0 [1120] 5.0 90.0 CW from primary 5.0 , silicon face upTTV 15 µmWarp 45 µmLTV (average, 1 cm2 site) 4 µmEdge chips by diffuse lightingProduction-gradeResearch-gradeNone permitted 0.5 mm width and depthMaximum 2 1.0 mm width & depth150 mm Diameter n-type SubstratesDiameter150.0 mm 0.25 mmThickness350 µm 25 µmDopantPrimary flat lengthSecondary flat lengthSurface orientationSurface finishOrthogonal misorientationPrimary flat orientationSecondary flat orientationNitrogen47.5 mm 1.5 mmNone4.0 toward [1120] 0.5 Back face optical polish, epi-face CMP 5.0 [1120] 5 N/ATTV 10 µmWarp 40 µmSFQR (max, 1 cm2 site) 5 µmLTV (average, 1 cm2 site)Production-grade 2 µmResearch-grade 4 µmEdge chips by diffuse lightingProduction-gradeResearch-gradeNone permitted 0.5 mm width and depthMaximum 2 1.0 mm width & depth6

HIGH PURITY SEMI-INSULATING SiC SUBSTRATEPRODUCT DESCRIPTIONSThe Materials Business Unit produces a wide assortment of semi-insulating SiC products ranging in wafer diameters upto 150 mm. Wolfspeed’s High Purity Semi-Insulating wafers are not vanadium-doped.Part NumberDescriptionW4TRF0R-02004H-SiC, HPSI, Research Grade, 100 mm, On-Axis, 1E6 Ω·cm, Standard MPD, 500 µm Thick w/ 32.5 mm Flat,Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4TPF0R-02004H-SiC, HPSI, Production Grade, 100 mm, On-Axis, 1E6 Ω·cm, Standard MPD, 500 µm Thick w/ 32.5 mmFlat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4TRG0R-N-02004H-SiC, HPSI, Research Grade, 150 mm, On-Axis, 1E6 Ω·cm, Standard MPD, 500 µm Thick w/ Notch, DoubleSided Polish Silicon Face CMP Epi Ready, Bare SubstrateW4TPG0R-N-02004H-SiC, HPSI, Production Grade, 150 mm, On-Axis, 1E6 Ω·cm, Standard MPD, 500 µm Thick w/ Notch,Double-Sided Polish Silicon Face CMP Epi Ready, Bare SubstrateFLAT LENGTHLinear dimension of the flat measured with automated optical micrometer on a sample ofone wafer per boule (see Figure 1).PRIMARY FLATThe flat of the longest length on the wafer, oriented such that the chord is parallel with aspecified low-index crystal plane. Not applicable to 150 mm wafers.PRIMARY FLATORIENTATIONThe primary flat is the (1100) plane with the flat face parallel to the [1120] direction.Measured with XRD back reflection technique.SECONDARYFLATA flat of shorter length than the primary flat, whose position with respect to the primary flatidentifies the face of the wafer. Not applicable to 150 mm wafers.SECONDARY FLATORIENTATIONThe secondary flat is 90 clockwise from the primary flat, 5 , referencing the silicon faceup.MARKINGFor silicon face polished material, the carbon face of each individual wafer is laser-markedwith OCR-compatible font, similar to definitions and characteristics in SEMI M12. The lasermarkings are offset right when looking at the carbon face with the primary flat oriented down(see Figure 1).150 MM HPSIMARKING ANDNOTCH:All 150 mm HPSI products have a notch with 1.0 mm ( 0.25, -0.00) depth. A line drawn from thewafer center to the notch is parallel to the [1100] 5.0 direction. The laser markings are offsetright when looking at the carbon face with the notch oriented down (see Figure 2).SecondaryFlatWaferDiameterXXXXXXXXXXPrimary FlatFigure 1. Diameter, primary and secondary flatlocations and marking orientation, carbon faceup for silicon face polished 100 mm HPSI wafers7XXXXXXXXXXBisector of notchFigure 2. Notch location and markingorientation, carbon face up for facepolished 150 mm HPSI wafers

PRODUCT SPECIFICATIONS100 mm Diameter Semi-Insulating SubstratesDiameter100.0 mm 0.0/-0.5 mmThickness500.0 µm 25.0 µmPrimary flat length32.5 mm 2.0 mmSecondary flat length18.0 mm 2.0 mmSurface orientationSurface finishPrimary flat orientationSecondary flat orientationResistivity(0001) 0.25 Back face optical polish, epi-face CMP[1120] 5.0 90.0 CW from primary 5.0 , silicon face up 1E6 Ω·cmTTV 10 µmWarp 35 µmLTV (average, 1 cm2 site) 2 µmEdge chips by diffuse lightingProduction-gradeResearch-gradeNone permitted 0.5 mm width and depthMaximum 2 1.0 mm width & depth150 mm Diameter Semi-Insulating SubstratesDiameterThicknessNotch depthNotch orientationSurface orientationSurface finishResistivity150.0 mm 0.25 mm500 µm 25 µm1.0 mm 0.25 mm, -0.00 mm[1100] 5.0 (0001) 0.25 Back face optical polish, epi-face CMP 1E6 Ω·cmTTV 10 µmWarp 40 µmLTV (average, 1 cm2 site) 3 µmEdge chips by diffuse lightingProduction-gradeResearch-gradeNone permitted 0.5 mm width and depthMaximum 2 1.0 mm width & depth8

SiC SUBSTRATESURFACE FINISH SPECIFICATIONSAttributeEdge chips/indents by high intensityProduction-GradeResearch-GradeNone permitted 0.5 mm width and depthMaximum 2 1.0 mm width & depthTotal usable area* quantitative byautomated optical surface inspectionand 2mmx2mm site map 90% area 70% areaStriations by high intensity lightNone permitted3 allowed 3 mm eachPolytype areas by UV illumination 5% area 5% areaArea contamination (stains)by high intensity lightNone permittedNone permittedCracks by high-intensity lightNone permittedNone permittedHex plates by high-intensity light*None permittedNone permittedScratch length by automated opticalsurface inspection*Cumulative 150 mmCumulative 150 mmlightNotes: *3 mm edge exclusion for 100 and 150 mm substrates.THE WOLFSPEED ADVANTAGEWolfspeed's proprietary crystal growth process is based upon a seeded-sublimation method and therefore requirescareful control and incremental development of high-quality seeds. Wolfspeed’s focus on high-quality growth conditionsthat avoid introducing new defects, while reducing existing defects, results in generational improvements in both bouleand seed quality. Combine that with 30 years of manufacturing experience and unmatched crystal growth capacity,and it is clear that Wolfspeed Materials has more cycles of learning and more generational improvements than any othermanufacturer in the industry. As such, Wolfspeed Materials has significantly reduced most forms of crystalline defects,and practically eliminated some defects such as bar stacking faults and hex plates.StartingSeedHigh QualityGrowth do not add new defects reduce existing defectsImprovedSeedHigh Quality SiliconCarbide Wafers9HighQualityCrystalsSlice andSurfacePrep

SURFACE FINISH DESCRIPTIONS(AREA)CONTAMINATIONAny foreign matter on the surface in localized areas which is revealed underhigh-intensity (or diffuse) illumination as discolored, mottled, or cloudy appearanceresulting from smudges, stains or water spots.CRACKSA fracture or cleavage of the wafer that extends from the front-side surface of the waferto the back-side surface of the wafer. Cracks must exceed 0.25 mm in length under highintensity illumination in order to discriminate fracture lines from crystalline striations.Fracture lines typically exhibit sharp, thin lines of propagation, which discriminate themfrom material striations.EDGE CHIPSAny edge anomalies in excess of dimensions defined in the table on page 9. As viewed underhigh intensity illumination, edge chips are determined as unintentionally missing materialfrom the edge of the wafer.EDGEEXCLUSIONThe outer annulus of the wafer is designated as wafer handling area and is excluded fromsurface finish criteria. This annulus is 3 mm for 100 mm and 150 mm substrates.HEX PLATEHexagonal-shaped platelets on the surface of the wafer which appear silver in color to theunaided eye, under high intensity light.FOREIGNPOLYTYPESRegions of the wafer crystallography which are polycrystalline or of a different polytypematerial than the remainder of the wafer, such as 6H mixed in with a 4H type substrate.Foreign polytype regions may exhibit color changes or distinct boundary lines, and arejudged in terms of area percent under UV illumination.(also referred to as“Inclusions” or“Crystallites”)SCRATCHESA scratch is defined as a singular cut or groove into the front-side wafer surface with a length-towidth ratio of greater than 5 to 1, and detected and classified by Lasertec SICA.STRIATIONSStriations in silicon carbide are defined as linear crystallographic defects extending downfrom the surface of the wafer which may or may not pass through the entire thickness of thewafer, and generally follow crystallographic planes over its length.TOTAL USABLEAREAA cumulative subtraction of all noted defect areas from the front-side wafer quality areabeyond the edge exclusion zone, with regard to a defined grid. The remaining percent valueindicates the proportion of the front-side surface to be free of all noted defects, as measuredby Lasertec SICA or Candela (does not include edge exclusion).10

SiC EPITAXYPRODUCT DESCRIPTIONSWolfspeed produces n-type and p-type SiC epitaxial layers on SiC substrates, and has the widest range of availablelayer thickness from sub-micron to 200 µm. Unless noted otherwise on the product quotation, the epitaxial layerstructure will meet or exceed the following specifications. Additional comments, terms and conditions may be found inthe specification document.Product DescriptionConductivityDopantNet doping on face5E14 – 1E19/cm35E14 – 1E20/cm3Carbon face1E16 – 1E19/cm3Not available 20% 50% 8% of selected thickness 10% of selected thickness0.2–1.0 microns 25% of selected thicknessNot available1.0–10.0 microns 15% of selected thicknessNot availableToleranceThickness range – Silicon face0.2–200 micronsThickness range – Carbon facePRODUCT SPECIFICATIONSCharacteristicsLarge-point defectsMaximum Acceptability Limits100 mm wafer20150 mm wafer25Test MethodsDefect Definitions(See pg. 11)D1DiffuseIlluminationD2M1, M2Scratchescumulative scratch length 150 mmBackside cleanliness95% cleanD3Edge chipsSee Substrate SpecificationsD4M2Epi defects* 3/cm2Candela CS20 /Lasertec SICAD5-D6M3Net dopingSee Product Description tableCV-M4ThicknessSee Product Description tableFTIR-M5*Note: 3 mm edge exclusion for 100 and 150 mm, 70 µm thickness11Methodology(See pg. 11)

SiC EPIWAFERDEFINITIONSCV MEASUREMENT POINTS (EPI DOPING)*:75D1. LARGE-POINT DEFECTSDefects which exhibit a clear shape to the unassistedeye and are 50 microns across. These features includedownfall, triangles, silicon droplets, and pits. Large pointdefects less than 3 mm apart count as one defect.604530150D2. SCRATCHESA scratch is defined as a singular cut or groove into thefront-side wafer surface with a length-to-width ratio ofgreater than 5 to 1, and detected by diffuse illuminationwith the unaided eye.-15-30-45-60D3. BACKSIDE CLEANLINESSVerified by inspecting for contamination on the waferbackside using diffuse illumination and the unaided eye.Backside cleanliness specified as percent area clean.-75-75-45-30-150153045Pt.x mmy mm12345670000000010.9521.9032.8543.8054.7565.70D4. EDGE CHIPSAs viewed under diffuse illumination, edge chips aredetermined as unintentionally missing material from theedge of the wafer.D5. EPITAXY DEFECTSThe sum of discrete defect counts. These includetriangles, downfall, carrots, particles, and silicon droplets.D6. AUTOMATED DEFECT CLASSIFICATION &ACCURACYDefect maps are provided only as representations ofwafer quality. Defect classification, location, and countwill not be absolutely accurate.-606075FTIR POINTS (EPI THICKNESS)*:75604530150METHODOLOGY-15-30M1. 3 mm edge exclusion for 100 and 150 mm.-45-60M2. Inspection performed under diffuse illumination.-75M3. Automated optical inspection.M4. Net doping is determined as an average value ofmultiple points along radius opposite major flat usingCV profiling. Rotational symmetry preserved.M5. Thickness is determined as an average value acrossthe wafer using FTIR, or mass difference for layers 5 µm.-75-60-45-30-1501530456075Pt.x mmy mmPt.x mmy 3.75-45.22-45.22-33.76-64.00Notes: * Values listed in tables are for 150 mm wafers.Both patterns scale for 100 mm wafers.12

NITRIDE EPITAXYPRODUCT DESCRIPTIONSWolfspeed produces GaN, AlxGa1-xN and Al1-yInyN epitaxial layers on SiC substrates. Unless noted otherwise on theproduct quotation, the epitaxial layer structure will meet or exceed the following specifications (1). Contact WolfspeedMaterials Sales for specification on custom epitaxy requests. Additional comments, terms and conditions may be foundin the specification document.STRUCTURAL LAYER SPECIFICATIONSNitride Epitaxial Layer SpecificationsPropertyValue or RangePrecisionMeasurementTechniqueSubstrateOn-axis SiC (Semi-Insulating)--AlxGa1-xN or Al1-yInyNComposition (2)0 x 0.3, 0 y 0.2, certain restrictions applyΔ x 0.015Δ y 0.02XRD peak splitting1.0 µm to 3.0 µm GaN0.5 nm to 1.0 µm AlNThickness (3)1.0 nm to 1.0 µm AlxGa1-xN1.0 nm to 1.0 µm Al1-yInyN2.0 nm to 5.0 nm GaN (Cap Layer)Averagethickness within 15% of targetthickness anduniformity 10%. (4)X-ray or white lightinterferometry5.0 nm to 100 nm SiN (Cap Layer)GaN Crystallinity 250 arcsec (3 µm layer on SiC substrate)-XRD (0006) FWHM(center point)Al0.25Ga0.75N 500 arcsec (3 µm layer on SiC substrate)-XRD (0006) FWHM(center point) (5)-Differentialinterferencemicroscopy at 50xin cross patternwith 5 mm edgeexclusionVisible Defects13 50/cm2

ELECTRICAL LAYER SPECIFICATIONSNitride Epitaxial Layer SpecificationsPropertyDopant typeValue or RangePrecisionMeasurementTechnique--n-type (Si)HEMT buffer (Fe and/or C)Carrier concentration(unintentionally doped) 1E16/cm3, n-type-CVCarrier concentration(n-type, Si doped)1E16 to 2E19/cm3 50%CV(wafer center,room temperature)Carrier concentrationof HEMT structure 8E12/cm2(25 nm Al0.25Ga0.75N)-Contactlessnon-destructivecarrier concentrationMobility of HEMT structureµ 1500 cm2 V-1 s-1(25 nm heet Resisitivity 2% uniformity-Contactlessnon-destructive sheetresisitivitySheet resistivity 5% uniformity-Contactlessnon-destructivesheet resistivity1.Certain additional restrictions may apply and will be presented on the product quotation.2.Quaternary compositions available upon special request.3.Range given for undoped layers. Maximum achievable thickness for doped layers orheterostructures will be reduced.4.Precision specification applies only to layers 0.01 µm thick.Uniformity (100 x standard deviation / mean).Edge exclusion is applied.5.Please specify epitaxy structure details upon submission of RFQ(i.e. thickness, doping, composition).6.Custom structures available. Contact Wolfspeed Materials Sales for more information oncustom epitaxy requests.14

www.wolfspeed.com/materials materials sales@wolfspeed.com 2021 Wolfspeed. All rights reserved. 4600 Silicon Drive Durham, North Carolina, 27703, USAThe information in this document is subject to change without notice.2021 - NC - V1

Thick w/ 32.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare Substrate W4NRF4C-U200 2, 350 µm Thick w/ 32.5 mm Flat, Double-Sided Polish Silicon Face CMP Epi Ready, Bare Substrate W4NPF4C-U200 2, 350 µm Thick, w/ 32.5 mm Flat Double-Sided Polish Silicon Face CMP Epi Ready, Bare Substrate W4NPF4C-B200 2, Low BPD

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