A New Control Architecture For Future Distributed Power Electronics Systems
A New Control Architecture for Future Distributed Power Electronics SystemsIvan Celanovic, Nikola Celanovic, Ivana Milosavljevic', Dushan Boroyevich and Roger Cooley2Center for Power Electronics SystemsThe Bradley Department of Electrical and Computer EngineeringVirgmia Polytechnic Institute and State UniversityBlacksburg, VA 24061-0111, USA'Visteon Automotive Systems17000 Rotunda DriveDearborn, MI 48121, USA2Naval Surface Warfare Center,Carderock Division, Electrical Systems DepartmentPhiladelphia, PA 19112-5083,USAAbstract -This paper proposes a novel open-architectureapproach to the design of digital controller hardware for powerelectronics systems. The paper discusses the benefits of such anapproach and compares it to the more conventional centralizedcontroller approach. Prototypes of the three key openarchitecture functional blocks: high-speed serial communicationlink, hardware manager and application manager were built inorder to test their performance on a representative three-phase100 kVA converter. Experimental results verify the feasibilityof the proposed approach.cCOMMUNICATION BUSINTRODUCTIONControl of today's medium and high-power converters is,in most cases, based on a centralized &@tal controller, asexplained in [l]. This approach has several drawbacks withperhaps the biggest one being the large number of point-topoint signal links that connect power stage and sensors onone side with the centralized controller on the other.Furthermore, the signals in typical power electronics systemscome in variety of different formats and are transmittedthrough a variety of physical meha. This makes thestandardization and modularization of power electronicssystems and subsystems very difficult, if not impossible.In this paper we approach the issue of standardization inpower electronics by standardzing the signal distributionnetwork, which allows for open architecture distributedcontroller approach. The standardization of communicationinterface allows partitioning of power electronics system intoflexible, easy-to-use, multifunctional modules or buildingblocks, which should si@icantly ease the task of systemintegration [2-41, [6-8]. Fig. 1 shows the functional diagramof an open architecture distributed controller approachsuitable for application in power electronics systems.This work was funded by the Office of Naval Research. This work madeuse of ERC Shared Facilities supported by the National ScienceFoundationunder Award Number EEC-97316770-7803-5692-6/00/ 10.00 (c) 2000 IEEE113Fig. 1. Partitioning of power electronics system based on open-architecturedistributed control approach.The concept of a distributedcontroller is widely acceptedin motion control and factory automation systems [9]. Morealong the lines of distributed control at the converter levelwas reported by Malapelle et al. [7] who proposed adistributed &@tal controller for hgh-power drives. Theypartitioned the system controller into a regulator and a bridgecontroller, whch were connected via a relatively slowparallel bus. Toit et al. [6] have proposed a control structurewhere phase-leg controllers are connected to a higher-levelcontroller through a (2.5 Mbitdsec) daisythained fiber opticlink. In their structure the current control is implementedlocally in a phase-leg controller, while the voltage control isimplemented in a higher-level controller,This paper proposes a real-time, dgital control networksuitable for medium- and high-power converters where thenetwork communication protocol is designed to supportmodular and open-system design approach in powerelectronics.
TABLE ICONTROL NETWORK CHARACTERISTICS.CAN2.5Mb/s1 Mb/s30CSMNCD enhancedoptical fiberTwisted pairLon WorksUp t o 1.25 Mb/s32000SERCOSMACRO2-4 Mb/s100 Mb/s256256Predictive CSMACollisionAvoidanceRing managementRing managementTwisted pair, coaxial cable,fiber optic cablePlastic optical fiberGlass optical fiber, twistedIn addition to the real-time control network b s paper alsointroduces two new control architectural blocks that supportproposed control network protocol and can be effectivelyused to form power electronics systems of variousconfigurations. The architectural blocks in question areapplicationsmanager and hardware manager.Following the proposed design parahgm the applicationmanager liberated from any hardware-oriented tasks becomesuniversal and converter independent architectural block thatcan be configured to control any type of power electronicshardware, through the software only. At the same time,hardware manager designed as an integral part of eitherswitching or sensing hardware, handles all the hardwarespecific tasks.The partition of power electronics into proposedarchtectural blocks, we believe, also allows the developmentof a layered control software structure, with the hardwaredevice drivers, libraries of standard control functions, andeventually with compilers from higher-level control designand simulation tools.COMMUNICATIONPROTOCOLBecause of the requirement of noise immunity, and in orderto eliminate the large number of point to point links betweenthe controller and the power the serial fiber optic ringnetwork, like the one shown in Fig. 2 is chosen. The bit ratethat this network needs to have can be found as a multiple ofhardware managers in the network, number of bits percommunicated word (including the control overhead bits) andconverter switching frequency. Therefore, for a system withfour nodes in the network, with ten twelve bit long words thatneed to be exchanged in every switching cycle and a fiftykilohertz switching frequency a channel capacity of about 36Mbit/s is required. Furthermore, as shown in [5] thesynchronization error between nodes should not exceed 0.10.2% of the switching frequency in order to eliminate lowfrequency harmonics due to the synchronization.0-7803-5692-6/00/ 10.00 (c) 2000 E E EILProcess/ machineSensor/ actuators,automotiveAppliance controlMotion controlMotion controlFIBER OPTIC RING.IFig. 2 Daisy-chained fiber optic control network for distributed control ofpower converters.Because of those requirements none the five commerciallyavailable protocols designed for industrial control andautomation applications that were considered for theapplication as power electronics were not found suitable.Therefore, the communication network in this paper isdesigned as a master-slave ring network that runs over plastic125 Mb/s fiber optic. In this type of network topology,application manager is a master node controlling thecommunications where all the hardware managers areoperating in the slave mode.A . Communication Protocol Functional DescriptionMaster-slave protocol that is implemented insuresdeterministic response of the network. If the error occursduring transmission, corrupt data is not used. Instead the newdata simply overwrites the previous data. This way the dataflow is kept strictly predetermined.Shown in Fig. 3 are two basic types of informationcommunicated through the control network: timecritical data(exchanged in every switching cycle) and time noncriticaldata transmitted only after all the critical time variables havebeen passed to all nodes. Time-critical mformation include114
t!t.t---.,.-SWITCHING PERIODAfter the synchronization command is passed, the nodeawaits its address field. When the address is received, thenode generates the synchronization signal. Because all theaddresses are in reverse order and time delayed for the nodepropagation delay all the addresses will arrive at thedestinationnodes at almost the same time. Using this type ofsynchronization scheme in proposed 125 Mb/s fiber opticallink synchronization error is reduced bellow 80 ns.t-“-.F-’---*Fig. 3. Time allocation on the communicationsbus.0 7Laddressn.a)’data field7T‘dn.0HARDWAREMANAGERDESIGNerror code7Hardware manager in power electronics distributednetwork is designed to provide control and communicationfunctions for the module it is associated with. It is designedto support all module specific control tasks thus making themodule specific functions, such as for example softswitching, invisible to the applications manager. In thefollowing sections two types of hardware managers will bediscussed: a hardware manager for the power switchingdevice, and a hardware manager for the current or voltagesensor.n.l dFig. 4. Data formats in distributed controllernetworkdata frame b) synchronizationframe c) command b eall the control variables such as: switching frequencyinformation, duty cycle information and all the sensorinformation. Provision for non-critical data transfer isdesigned to support tasks such as initialization and softwarereconfiguration of the hardware managers. Non-critical datatransfer is allowed only after all the time critical data isexchanged. Fig. 4 shows three types of time critical dataframes: control data frame, synchronization frame andcommand frame.The data frame consists of command indicating thebeginning of the data packet, address of the node, data fieldand error check. The way data field is configured depends onthe particular application and type of the hardware manager.In a ring type of network, each node introduces a delay indata propagation path.Meaning that if we sendsynchronization command through the network, each node isgoing to receive the command with as many time delay Td,asthere are nodes between that node and the master node. Thetime delay, Td, in the hardware test-bed implemented istypically around 460 ns. This means that the error insynchronization will generate time shifted PWM signals atthe outputs, causing low frequency harmonics. This problemis solved with the synchronization sequence.Format of the synchronization frame is shown in Fig. 4(b).The Frame starts with Synchronization command, and isfollowed by 8 bit long data blocks containing addresses ofslave nodes and ‘filler’fields, which are T d long and are usedfor propagation delay compensation. The first address to betransmitted is of the slave node that is last to receive theframe. The number of address data blocks sent equals thenumber of slave nodes on the ring, which we want tosynchronize. The first field is a synchronization commandthat alerts the nodes to wait for their time to synchronize.Next are the address fields of the nodes being synchronized.0-7803-5692-6/00/ 10.00(c) 2000 IEEE115A. Hardware Managerfor Soft-Switched-Phase-LegThe hardware manager shown in Fig. 5 is designed tocontrol soft-switched phase leg. The following are thefunctions of this type of hardware manager:PWM generation for main and auxiliary switches;isolated gate drive for both main and auxiliary switches;overcurrent protection and indication;current, voltage and temperature sensing with A/Dconversion; andcommunication of PWM, status and measurementinformation.The only information the hardware managercommunicates is a standardized serial data packet. All thenecessary data for proper module operation are encoded inthe data field of control data packet that was previouslyexplained.The hardware manager, shown in Fig. 5, consists of gatedrives, a high speed ALTERA 10K PLD, two A/Dconverters, a high-speed ECL logic data transmitter andreceiver, and a 125 Mbitdsec optical transceiver.The communication interface within the hardwaremanager is built in three layers (accordmg to ISO/OSIreduced reference model) defined as: physical layer, data linklayer and application layer.Physical layer is provided by means of an inexpensiveplastic optic fiber, while interface between data link layer andphysical layer is achieved using Hewlett Packard opticaltransceiver.Data link layer is provided by TAXIchip” (transmitterand receiver) [lo]. An incoming optical signal is fed to the
transceiver and then to the TAXIchipm [lo] receiver. Thereceiver converts the serial stream into parallel, which is thenloaded into the PLD for final data processing. Similarly,outgoing data from the PLD (in parallel form) are convertedby the TAXIchipm transmitter into a serial stream, amplifiedby the optical transceiver [ l l ] and transmitted through theoptical fiber.The communication and control block, which isimplemented in hardware (PLD), handles all application layerfunctions. The communication and control subsystem can beviewed as a state machine, shown in Fig. 6, receivingcommands through the network and changing states andoutputs accordingly. Its basic states are described as:idle mode (waiting for the data packet to arrive),forward mode (passing the mformation to the subsequentnode),active mode (incoming data packet has the address of thenode): when the data is being first verified by CRCchecker and then stored in corresponding buffers and thepacket is then forwarded with the results ofcurrent/voltage/temperature measurements and localstatus information,synchronization mode (after receiving SYNC commandfrom application manager): which reloads the doublebuffers, initiates A/D conversion and resets PWMgenerator andinitialization mode: whch initializes the whole systemand dynamically assigns the node address.Fig. 6. State transition diagram for communication controller.P W M generator and local fault protection are also realizedin the PLD. Three main parameters necessary for properoperation of P W M generator are: duty cycle, switchingperiod and the synchronization command. The duty cycledata, when received and validated for proper transmission,are stored in the input buffer. The duty cycle becomes activeonly after it receives synchronization command from theapplication manager, which moves the duty cycle informationto executable buffer used for PWM generation. Periodmformation (which controls switching frequency of the leg)is also double-buffered for the sake of propersynchronization. A digital comparator compares the content0-7803-5692-6/00/ 10.00 (c) 2000 E E E116Fig. 5. Block diagram of designed hardware manager controlling softswitched phase leg.Fig. 7. Prototype of phase leg module integrated with hardware manager.of the counter with duty cycle creating a control pulse for theswitch. The dead time generator and fault protection are thefinal stages in PWM generation, providing shoot-through andover currentholtagehemperature protection.Most of today’s control systems in power electronics arebased on full-state feedback, which requires per-switchingcycle current and voltage measurement. Therefore, thedesigned hardware manager consists of current, voltage andtemperature sensors. Measurement of module voltage andcurrent is performed simultaneously per switching cycleusing two 12-bits AD converters, while temperaturemeasurement is performed with 10 times slower rate. Propertiming is achieved also through synchronization commandreceived from application manager. Measurement results arestored in the output buffer, ready to be packed into acorresponding data packet and sent to applications manager.B. Hardware Mangerfor Distributed SensorAlthough the hardware manager has built-in current,voltage and temperature sensors for some applications,additional system sensors such as position, velocity etc. areneeded to provide feedback to the application controller. Toovercome this limitation a new architectural block smartsensor is introduced. It is designed to follow the samecommunication protocol, has a built in A/D converter andsensor and same communication interface as smart module.Fig. 8 shows the functional dlagram and the hardware
prototype of the smart sensor. The instants of A/Dconversion are synchronized with the rest of the networkusing the already explained synchronization frame.Each phase leg is designed using 1200 V, 300 A IGBTphase-leg modules as main switches. Fig 12 shows outputcurrent waveforms of the three-phase VSI with the closedcurrent loops in DQ reference frame.optical fiberIFig. 8. Block diagram and hardware prototype ofthe distributed currentsensor.APPLICATIONS MANAGERThe application manager, is a high-level controllerliberated from low-level hardware oriented tasks. It isdesigned to provide the system with flexibility and softwarereconfigurability.The prototype application manager (Fig. 9) is built aroundAnalog Devices 21062 SHARC floating point DSP processor,with an onboard ALTERA 10K PLD and fiber-opticcommunication interface that provides open controlarchitecture capable of controlling multiple independentmodules. "Ius allows the applications manager hardwarearchtecture to be independent of the converter topology,number of switches, sensors, etc. and allows systemreconfiguration through software only.Fig. 10. Block diagram ofthree-phase VSI built using distributed controlapproach.Fig. 11. Prototype three-phase VSI built using smart modules and distributedcontroller approach.e:i s 32"Fig. 9. Block diagram and application manager hardware prototype.EXPERIMENTALRESULTSTo verify the idea of a distributed controller, a three-phasevoltage source inverter (VSI) driving a simple R-L load wasdesigned as shown in Fig. 10. Prototype of the converterconsists of three smart hardware managers controlling softswitched phase leg modules, connected via fiber opticcommunication link, while the application manager performscontrol tasks related to controlling the output currents of theinverter in closed-loop manner.0-7803-5692-6/00/ 10.00(c) 2000 IEEEI . . . ., , , , ., , . ., . . ,.,.,/,,. .I. . . .!.i1Fig. 12. Output phase currents (50 Ndiv) and output phase voltages (500V/div) PWM waveforms.117
CONCLUSIONREFERENCESThis paper presented a novel approach to power electronicssystem design based on the open architecture distributeddigital controller and modular power electronics buildmgblocks. The most important features of the new concept are:0Open and flexible communication protocol fordistributed control of power electronics systems;Flexible, and easy to use power converter modules;Hardware independent, applications manager capable ofcontrollmg several different types of converters inparallel, andSimple system integration and reconfiguration.We believe that dstributed digital controller environmenttogether with open-system communication protocol providessolid ground for object oriented software design in powerelectronics. This will also enable easier integration of higherlevel graphically oriented design and simulation tools withpower electronics hardware.Finally, we anticipate that both hardware and softwarestandardization and modularization will lead to user friendly,plug and play, system oriented design in power electronics asopposed to today’s predominantly circuit oriented, customdesign practice.[31[41PIACKNOWLEDGMENTAuthors would like to thank the Office of Naval Researchfor their vision of the Power Electronics Building Block.0-7803-5692-6/00/ 10.00(c) 2000 IEEEV. Vlatkovic, and D. Borojevic, “Digital-Signal-Processor-BasedControl of Three-phase Space Vector Modulated Converters,” IEEETransactions on Industnal Electronics, June 1994, Vol. 41, No. 3, pp.326-332.T. Ericsen, A Tucker, “Power Electronics Building Blocks andPotential Power Modulator Applications,” IEEE Conference Record ofthe Twenty-Third Internahonal Power Modulator Symposium, NewYork, NY, 1998, pp. 12-15.Van Wyk, F.C. Lee, “Power Electronics Technology at the Dawn theNew Millennium-Status and Future,’’ IEEE PESC ConferenceProceedings, 1999.I. Celanovic, I. Milosavljevic, D. Boroyevich, G. Jinhong, R. Cooley,“A New Distributed Controller for the Next Generation PowerElectronics Building Blocks,” 15* Annual IEEE Applied PowerElectronzcs ConferenceProceedings, February 2000, pp. 889-894.I. Milosavljevic, 2. Ye, D. Borojevic, C. Holton, “Analysis ofConverler Operation with a Phase-Leg in Daisy-Chained or Ring TypeStructure,” LEEE PESC ConferenceProceedings, June 1999.J.A. Du Toit, A.D. Le Roux, J.H.R. Enslin, “An Integrated ControllerModule for Distributed Control of Power Electronics,” IEEEAPEC ’98Proceedings, February 1998, pp. 874-880.P.L.G. Malapelle, G. Torri, R. Moruzzi, A Oliva, “A New, Modular,Programmable, High Speed Digital Control for Large Drives,” IEEEIECON 20th International Conference on Industnal Electronics,Control and Instrumentation, 1994; vol. 1, pp. p.210-14.I Milosavljevic, D., Borojevic., I. Celanovic, “ModularizedCommunication and Control Structure for Power Converters,” ghEuropean Conference on Power Electronics and Applicahons, EPE?September 1999.E. Bassi, F. Benzi, L. Lusetti, G.S. Buja, “Communication Protocolsfor Electrical Drives,” IEEE IECON Proceedings, 1995, Vol. 2,pp.706-711.“TAXIchipTMIntegrated Circuits,” Data Sheet and TechnicaIManual,Publicahon#07370, AMD, April 1994.“Plastic Optical Fiber and HCSQY Fiber Cable and Connectors forVersatile Link,” Technical Data 5963-3711E, Hewlett Packard,November 1994.118
distributed control approach. The concept of a distributed controller is widely accepted in motion control and factory automation systems [9]. More along the lines of distributed control at the converter level was reported by Malapelle et al. [7] who proposed a distributed &@tal controller for hgh-power drives. They
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