Sebastian Hoyos - Texas A&M University

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ELEN 689:Special TopicsAdvanced Mixed-Signal InterfacesSebastian HoyosTexas A&M UniversityAnalog and Mixed Signal GroupSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces1

A Lot of New Names for Future BroadbandCommunication Systems The NamesSoftware Defined RadiosMulti-Standard RadiosCognitive RadiosUniversal Radios Common Features Very wideband systems, multiband channels, opportunisticfrequency allocation, bandwidth reuse, intensely digital,scalable/reconfigurable RF/analog. Challenges Conflicting requirements, large bandwidth/dynamic range butstill want low power/small area.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces2

Receiver TopologiesSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces3

The Receiver Design Problem in BroadbandCommunications How much RF processing do I do before the ADC? How do I take advantage of technology scaling in this RF pre-procesing? How do I make the front-end scalable and configurable to fit multiple standards?Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces4

Conventional Receivers¾ Superheterodyne Receiver¾ Single Conversion Receiver¾ Upconversion¾ Dual Conversion¾ Image-Reject Receiver (Complex I&Q mixing)¾ Direct Conversion ReceiverSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces5

Image Rejection¾ In high-IF RF receivers, RFLC or SAW filters are used tosuppress the image before thedown-conversion. Larger IFsare preferable to relax the filterQ factor.¾ Ideally zero IF does notrequire the RF filter but stillsuffers from gain and phasemismatches.Supisa Lerstaveesin, and Bang-Sup Song: ”A Complex Image Rejection Circuit With Sign Detection Only,” IEEE JOURNAL OFSOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces6

Image Rejection Ratio¾ The identities1[cos(x y) cos(x y)]21cos(x) sin(y) [sin(x y) sin(x y)]2cos(x) cos(y) I LO Bcos(ω LO t)Q LO Asin(ω LO t)x RF cos(ω RF t )BBΒΑ[cos((ω RF ω LO ) t ) cos((ω RF ω LO ) t )] LPF cos(ω IF t ) cos(ω ΙF τ ) cos(ω ΙF τ )2222AAA90 o sin(ω IF t ) cos(ω IF t ) Q LO * x RF [sin((ω RF ω LO ) t ) sin((ω RF ω LO ) t )] LPF222ω IF ω RF ω LOI LO * x RF x IMAGE cos((ω LO ω IF ) t )BBBA[cos((ω LO ω IF ω LO ) t ) cos((ω LO ω IF ω LO ) t )] LPF cos(ω IF t ) cos(ω IF t ) cos(ω IF t )2222AAA90o [sin((ω LO ω IF ω LO ) t ) sin((ω LO ω IF ω LO ) t )] LPF cos(ω IF t ) sin(ω IF t ) 222I LO * x IMAGE Q LO * x IMAGE222 1 (1 ε ) 4 A B 1 B / A IRR gain 1 (1 ε ) 1 B / A ε2 A B 4IRR phase 1 4 * (cot Δφ) 2 ( Δφ ) 2¾ 0.1% gain error and4IRR of about 41 dB.IRR total 22( Δφ ) εThe design of CMOS Radio-Frequency Integrated Circuits, Thomas H. Lee.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces1º phase error leads to7

Image Rejection Ratio¾ HW # 4: Find the IRR for the case the input comes with a quadraturecomponent as well, i.e., x RF I D cos(ω RF t ) Q D s in(ω RF t ) and a direct zeroIF receiver is used.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces8

Basic Equations of Image Rejection¾ Gain mismatch α and phase mismatch θ :Supisa Lerstaveesin, and Bang-Sup Song: ”A Complex Image Rejection Circuit With Sign Detection Only,” IEEE JOURNAL OFSOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces9

Matrix Formulation¾ Matrix formulation of the non-idealmixing :¾ Matrix formulation of the nonidealities correction :Supisa Lerstaveesin, and Bang-Sup Song: ”A Complex Image Rejection Circuit With Sign Detection Only,” IEEE JOURNAL OFSOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces10

LMS algorithm for the estimation of α and θ¾ Fully-digital implementation220 iterations needed!!Supisa Lerstaveesin, and Bang-Sup Song: ”A Complex Image Rejection Circuit With Sign Detection Only,” IEEE JOURNAL OFSOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces11

Analog ImplementationSupisa Lerstaveesin, and Bang-Sup Song: ”A Complex Image Rejection Circuit With Sign Detection Only,” IEEE JOURNAL OFSOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces12

256 QAM Spectra Before and AfterImage RejectionSupisa Lerstaveesin, and Bang-Sup Song: ”A Complex Image Rejection Circuit With Sign Detection Only,” IEEE JOURNAL OFSOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces13

256 QAM Constellation Before andAfter Image RejectionSupisa Lerstaveesin, and Bang-Sup Song: ”A Complex Image Rejection Circuit With Sign Detection Only,” IEEE JOURNAL OFSOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces14

Effect of IRR on Error ProbabilitySupisa Lerstaveesin, and Bang-Sup Song: ”A Complex Image Rejection Circuit With Sign Detection Only,” IEEE JOURNAL OFSOLID-STATE CIRCUITS, VOL. 41, NO. 12, DECEMBER 2006Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces15

Non-linearitiesSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces16

Improvement of Mixer Nonlinearities(IIP2) for Active Mixers¾ Detailed circuit analysis of nonlinearities in diff pairs and doubled balanced mixers.¾ The proposed approach is analog,; trimming of current bias.Liwei Sheng; Larson, L.E.;”An Si-SiGe BiCMOS direct-conversion mixer with second-order and third-order nonlinearitycancellation for WCDMA applications,” Microwave Theory and Techniques, IEEE Transactions on Volume 51, Issue11, Nov. 2003 Page(s):2211 - 2220Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces17

Improvement of Mixer Nonlinearities(IIP2) for Active Mixers¾ Uses PN sequences and correlation to estimate the nonlinearities. The LO bias istuned to minimize distortion.Liwei Sheng; Larson, L.E.;”An Si-SiGe BiCMOS direct-conversion mixer with second-order and third-order nonlinearitycancellation for WCDMA applications,” Microwave Theory and Techniques, IEEE Transactions on Volume 51, Issue11, Nov. 2003 Page(s):2211 - 2220Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces18

Some of the New Approaches to BroadbandReceivers A high-frequency software defined radioN. C. Davies, “A high performance HF software radio,” in Proc. 8th Int. Conf. HF Radio Systems and Techniques,Guildford, U.K., 2000, pp. 249–256. Frequency channelizersD. R. Zahirniak, D. L. Sharpin, and T. W. Fields, “A hardware-efficient, multirate, digital channelized receiverarchitecture,” IEEE Trans. Aerosp. Electron. Syst., vol. 34, no. 1, pp. 137–152, Jan. 1998. Selectable RF filters and downconversionH. Yoshida, T. Kato, T. Tomizawa, S. Otaka, and H. Tsurumi, “Multimode software defined radio receiver using directconversion and low-IF principle: Implementation and evaluation,” Electr. Commun. In Japan (Part I: Communications),vol. 86, pp. 55–65, 2003. Subsampling and undersampling Analog decimationD. Jakonis, K. Folkesson, J. Dabrowski, P. Eriksson, and C. Svensson, “A 2.4-GHz RF sampling receiver front-end in0.18-mCMOS,” IEEE J. Solid-State Circuits, vol. 40, no. 6, pp. 1265–1277, Jun. 2005.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces19

Some of the New Approaches to BroadbandReceivers (cont ) Sampling with built-in anti-aliasingY. S. Poberezhskiy and G. Y. Poberezhskiy, “Sampling and signal reconstruction circuits performing internal antialiasingfiltering and their influence on the design of digital receivers and transmitters,” IEEE Trans. Circuits Syst. I, vol. 51,no. 1, pp. 118–129, Jan. 2004. Sample rate, downsampling and filteringR. Crochiere and L. Rabiner, Multirate Digital Signal Processing. Englewood Cliffs, NJ: Prentice Hall, 1983. A discrete-time RF sampling receiverR. B. Staszewski, et. al. “All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nmCMOS,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2278–2291, Dec. 2004. UCLA SDR receiver¾¾Bagheri, R.; Mirzaei, A.; Heidari, M.E.; Chehrazi, S.; Minjae Lee; Mikhemar, M.;Tang, W.K.; Abidi, A.A.; Softwaredefined radio receiver: dream to reality, Communications Magazine, IEEE, Volume 44, Issue 8, Aug. 2006Page(s):111 - 118Abidi, “The path to software-defined radio receiver”, IEEE JSSC, May 2007 Frequency-domain-sampling receivers¾¾¾S. Hoyos, B. M. Sadler, and G. R. Arce, “Broadband Multicarrier Communications Receiver Based on Analogto Digital Conversion in the Frequency Domain,” IEEE Transactions on Wireless Communications, March 2006.S. Hoyos and B. M. Sadler, “Ultra-wideband analog to digital conversion via signal expansion,” IEEETransactions on Vehicular Technology, Vol. 54, No. 5, Sept. 2006, Pages: 1609-1622. InvitedS. Hoyos, B. M. Sadler “UWB Mixed-Signal Transform-Domain Direct-Sequence Receiver,” Accepted forpublication in IEEE Transactions on Wireless Communications, 2007.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces20

Sampling with built-in anti-aliasing Sinc(x) anti-aliasing provided by windowingand integration. The sidelobes decay at 20dB/decade with zeros at fs, 2fs, . More general mixing waveforms can beused, although complexity goes up.Y. S. Poberezhskiy and G. Y. Poberezhskiy, “Sampling and signal reconstruction circuits performing internal antialiasing filtering andtheir influence on the design of digital receivers and transmitters,” IEEE Trans. Circuits Syst. I, vol. 51, no. 1, pp. 118–129, Jan. 2004.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces21

A simple integrator- Assume a low noise transconductance amplifier- LO 2.4 GHz- Pseudo-differential architecture (b) is preferable.- This is just mixing followed by integration which provides down-conversion andfiltering in a single stage.- How do you read the voltage out of the caps?Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces22

Cyclic Read-Out- Cyclic change and discharge ofcaps. every N cycles.- This can be modeled as a movingaverageN 1wi ui ll 0- If modeled as MA, the filter has asinc frequency response whoselobes width and nulls positionsdepend on N.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces23

High-Rate IIR Filtering- History capacitor CH added- LNTA sees constant capacitance CS- Let a1 CH/(CH CR)- At switching time, CH retains a1portion of its total charge and shares(1-a1) to the discharged CR cap. Atsampling time j, the system charge sj is:sj a1sj-1 wj-The output charge xj isxj (1-a1)sj-1This is a IIR filter with samplingfrequency of f0/N and single pole atSpring 2009f c1 1 f01 f 0 CR(1 a1 ) 2π N2π N CH CRS. Hoyos - Advanced Mixed-Signal Interfaces24

Example- CR 0.5pF, CH 15.425pF,a1 0.9686- f0/N 2.4GHz/4 300MHz-Additional zeros with M 4Additional IIR filteringduring read-out processcan also be introducedSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces25

Adding more zeros to the FIR- Redundant switched caps.Introduce more zeros in thetransfer function when adding uptheir charges during read out:M 1yk u k ll 0-Illustrated is the case with M 4Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces26

A discrete-time RF sampling receiver Bluetooth and GSM receivers from TI use integrate and dump samplingfollowed by down sampling and filtering. Programable filtering and decimation to achieve the anti-aliasing needed.R. B. Staszewski, et. al. “All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS,” IEEE J. Solid-State Circuits, vol. 39, no. 12, pp. 2278–2291, Dec. 2004.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces27

UCLA SDR receiver Direct conversion with tunable LO in the freq. range 800 MHz to 6 GHz. Cascade of sincN filters followed by decimation to achieve the initializingneeded. Good for narrowband signals as a single ADC can handle the bandwidth. ButSDR should also be good for wideband and ultra-wideband signals. Need parallelADC to sample at a fraction of Nyquist rate. Parallelization of the front-end will beneeded if want to keep the ADC sampling rate down.A. Abidi, “The path to software-defined radio receiver”, IEEE JSSC, May 2007Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces28

SDR for narrowband, wideband andultra-wideband signals Assume we have a tunable front-end that provides thedownconversion and the antialiasing filtering needed for a wide rangeof standards. The problem now is that the signal bandwidth will have 10X range.Example : 802.11g (ΣΔ ADC @ 50 Ms/s and 8 bits), UWB (ADC @ 500Ms/s and 5 bits). Say you can run the ΣΔ ADC @ 100Ms/s and 5 bits,i.e. exchange OSR by DR). Can we use 5 of these ΣΔ ADCs to copewith UWB ? Note that the same ΣΔ ADC could operate @ 200 KHz and 14 bits forGSM and @ 1MHz and 12 bits for Bluetooth. How do you parallelize the ADCs and even the RF front-end to createa SDR for narrowband, wideband and ultra-wideband signals?Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces29

MotivationDigital intensive RF receivers - ADCs with wide bandwidths and large dynamic range.Solution ? - ParallelizationParallelized ADCsTime-interleaved ADCFilter-bank ADCDrawbacksDrawbacks SHA has stringent tracking bandwidth requirements Each ADC sees full input signal bandwidth (nonlinearity and aliasing) Filters with very tough specs (aliasing) Signal reconstruction increasescomplexitySpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces30

Parallel-Path Samplingr (t ) (m 1) Tc( ) dtADCRoF0F1F2mTce j 2 π Fo tR2 (m 1) Tc( ) dtADCFN-11TcR1RN 1mTce j 2 π FN 1 tR0RN 1Salient FeaturesSimple mixers and integrators in the front endWindowed integration provides inherent antialiasing. Relaxed Filter design. Relaxed sample and hold requirements No signal reconstruction. Direct digital processingof Frequency samples. Relaxed ADC design with lower speeds Spring 2009Drawback Area overhead associated withparallelizationS. Hoyos - Advanced Mixed-Signal Interfaces31

Parallel-Path Receiver ArchitectureMixing and IntegrationBasis FunctionsGm Basis Co-efficientsmTs Tc(.) dtADC(.) dtADCmTsF1 – I and QRFbroadband signalGm mTs TcmTsLNAF2 – I and QGm mTs Tc(.) dtmTsm 0 to M, M - no. of segmentsTc - Actual integration timeTs - Integration time – OverlapFN – I and QADCWindowedIntegrationSinc filterInherent anti-aliasingtime[Ref] P. K. Prakasam, M. Kulkarni, X. Chen, Z. Yu, S. Hoyos, J.,Silva-Martinez and E. SanchezSinencio, " Applications of Multi-Path Transform-Domain Charge-Sampling Wideband Receivers", IEEETransactions on Circuits and Systems II, pp309-313, Vol. 55,Issue 4, April 2008.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces32

Circuit Implementation of the Gm StageIoutVingmR4kTgm4kT/R1. High Linear Gm stage Spring 2009Flicker noise is removed by the degeneration resistorIIP3 is boost to almost 30 dBmLarge Vdd is required.Used in 10 bits full scale input receiver.S. Hoyos - Advanced Mixed-Signal Interfaces33

Circuit Implementation of the Gm Stage2. Noise Cancelling Gm stage Noise of the first stage is eliminatedGain is boostedNoise Figure is improvedUsed in wireless receiver while input signal is small.[Ref] X. Chen, J.,Silva-Martinez and S. Hoyos, " A CMOS differential noise cancelling low noise transconductance amplifier ",Circuits and Systems Workshop: System-on-Chip - Design, Applications, Integration, and Software, page(s): 1-4, 2008 IEEEDallasSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces34

Circuit Implementation of the MixerDouble Balanced Passive Mixer Minimum signal and clock feed-throughEven order harmonics are cancelledAlmost noise freeφI OUT I IN φI IN I OUT φSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces35

Charge Sampling Windowed integration of Iin onC1 and C2 Inherent anti-aliasing sinc filterSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces36

Overlap in windowsSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces37

1 Path CircuitShooting for 10 bits 2.5 Gs/s ADC High linear Gm stage to accommodate fullscale input Overlapping windowing 200 Ms/s path sampling rate 55 dB SNDRThe whole front-end: 10 path ( 5 lo frequencies I/Q )Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces38

Chip Layout45 nm (TI technology) Area: 2.5mm*2.5mm Core Power: 320 mWPath#1Path#2Path#3 64 mW / Path ( I and Q )Clock GeneratorPath#4Path#5Overall Power consumptionof the ADC:320 mW N * P path,adcLNASpring 2009S. Hoyos - Advanced Mixed-Signal InterfacesGm Stages39

System level issues of FD receiverNoise AmplificationEffect of JitterOut-of-band noise folds back creatingdips in performance Overlap improves the filter Overlap results in over-sampling whichreduces aliasing. Additional carriers can be detected. Spring 2009Jitter sources: LO signal, Sampling clocksJitter from LO signal dominantFilter mitigates noise from LO jitter. Long integration windows reduces jitterfrom sampling clocks.S. Hoyos - Advanced Mixed-Signal Interfaces40

Least Squares Data EstimationInput symbolsmodulated on carriersOutput sampled basiscoefficientsEntire system represented as a linear transformation from data symbols (a) to outputsamples of multi‐path receiver (r)Least Squares (LS) solution for the system ‐ Estimate Equation ‐ Need for Calibration ?¾ H is sensitive to mismatches, offsets and imperfections in the system¾ H must match the circuit implementation accurately for good SNRSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces41

Mismatches in the system(only one path is shown)raWirelessChannelIFFTOffset in the LOfrequency at transmitterand receiver.LOMulti-carrier signal TransmitterSamplingclocks aresynchronizedwith LOsignals in thereceiverVRFModulatorGain and phasemismatch for eachcarrier. Flat gain modelis used for channel.LNAGmGain and Phase mismatchbetween multiple channels dueto process variations andenvironment conditions.Charge samplingIntegrator & SamplerMixerActual LOsignalIdeal LO signalIIFAnalogsamplesIRFIIFFinite bandwidthof circuits altersLO waveformshapeLOPhase offsetin LOsignalsMismatches in capacitorsintroduces gain error anddistortion.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces42

Complete System CalibrationMulti-carrier signalReceiverMulti-carrier signalTransmitterrIFFaTe j 2 π ( fo Δ Fc ) TWirelessChannelLOModulatorMulti-channelFD ReceiverLNA Gm stage Charge sampling circuitnoiserrLeast Squares Estimation of data with LMS calibrationr)a (G H G) 1G H r)aEstimated DatarˆGrarrraref)aGrefrrForward Problem calibrationGenerateG matrixrarefrrraref( corrected )HrrcorrectionrreH (G H G) 1 G HReverse Problem calibrationSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces) j 2 π ΔFc ( L 1) TFrequencyestimator43

LMS CalibrationInitialization of G matrixInput ‐ a1 a2 a3 . . . . aSOutput ‐ r1 r2 r3 . . . . rSa1 ‐ [1 0 0 0 . . . 0] Tr1 forms 1st row of G matrixa2 ‐ [0 1 0 0 . . . 0] Tr2 forms 2nd row of G matrixa3 ‐ [0 0 1 0 . . . 0] Tr3 forms 3rd row of G matrixaS ‐ [0 0 0 0 . . . 1] TrS forms Sth row of G matrixLMS calibrationTwo methods:1.Forward Problem CalibrationSpring 20092. Reverse Problem CalibrationS. Hoyos - Advanced Mixed-Signal Interfaces44

ForwardProblemequationForward Problem Calibrationr)a (G H G) 1 G H r)arˆGraEstimated Data rGrefrrrrararefrefrr (samples from receiver)Forward Problem updateequationReverse Problem Calibrationraref)aHrrrrH (G H G) 1 G HReverseProblemequationGrarefrr (samples from receiver)Reverse Problem updateequationSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces45

SimulationsMean squared error convergence1. With arbitrary H matrixVery slow convergenceSpring 20092. With H matrix initialized from ‘r’ vectorFast convergenceS. Hoyos - Advanced Mixed-Signal Interfaces46

SimulationsSNDR post calibration1. With arbitrary H matrixInput SNR 100 dBFrequency offset in carriers is not included2. With H matrix initialized from ‘r’ vectorAll static mismatches are calibrated in both cases.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces47

Frequency offset EstimationThe sampled basis coefficients in block L,where,LO signalInput signalFrequency offset in carriersSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces48

Frequency offset EstimationGain and phasemismatch in nth channelAfter a few steps of simplification,Term inside integral is independent ofLIfthenIncluding noise in these terms, the samples inthe Lth and (L 1)th block are,Maximum-Likelihood Estimation of Frequency offset,Correction to the ‘r’ vectorSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces49

SimulationsSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces50

Simulations¾ About 20 dB improvement in performance with frequency offset estimation.¾ Performance limited by the accuracy of the estimate.Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces51

Multi‐channel Sinc Filter BankMulti‐channel Analog Filter BankGmADCGmADCGmADCGmADCGmADCGmADCCharge sampling sinc filter1dContinuous integrator S&HRf2C1CfFrommixerSpring 20092dC12ToADCCsFrommixerS. Hoyos - Advanced Mixed-Signal Interfaces1ToADC52

Analog ComplexitySinc Filter BankContinuous integrator filter bankf-3dB 0.44 / Tsf-3dB 1 / 2πRfCfDC gain Gm Ts / CDC gain GmRfInt. noise KT/C (2GmTs/C) KT/CInt. noise GmRf .KT/Cf KT/Cf KT/CsGBW (op-amp 1,2) 1/2πRoCGBW (1) 1/ 2πRfCfGBW (1,2) 7/(settling time) (β 1)(10bits)GBW (2) 7/(settling time) (β 1)(10bits)Example: Assuming Gm 1mA/V, Ts 4ns,DC gain 4, f-3dB 110MHzFor DC gain 4, Rf 4KFor f-3dB 110MHz, Cf C/3Noise 9KT/CNoise 13KT/C KT/CsGBW (1,2) 1.75 GHzGBW (1) 1.5 GHz (as Cf C/3)GBW (2) 3.5 GHz (for settling time 2ns)Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces53

Digital ComplexityStep 1:Step 2:Each element in G is given by,fLO (n) . Ts is an integer. So,is periodic repetition ofFc (s) . Ts s/M integerComplexity of computation of p: o(4NM logM) o(4NS) o(4S(logM N))Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces54

Digital ComplexitySparsity of (GHG)‐1is denoted by GHG has only 2N non‐zero elements ineach row Inverse of GHG also has the samesparsity. Complexity of computation of GHG ‐ o(2N x 2N x 2S) o(8N2S) (GHG)‐1 ‐ o(2N x 2N x 2S) o(8N2S)Xi,j is non-zero only when (i-j) mod M 0Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces55

Digital ComplexityComplexity: o(4S( logM N))Step 1:Step 2:Complexity: o(4NS)Total Complexity of LS estimation : o(4S( logM N)) o(4NS)Complexity of FFT: o(4SlogS) o(28S)Example: S 128, M 32, N 5Complexity of LS estimate,Sinc filter bank: o(4S(logM N)) o(4NS) o(60S)Analog filter bank: o(4NMS) o(640S)Complexity of estimation during LMS calibrationForward Problem:Reverse Problem: Example: S 128, M 32, N 5Forward Problem:o(16N2S) o(4S (logM N)) o(4NS) o(460S)o(16N2S)o(4S (logM N))o(4NMS)Reverse Problem:o(4NMS) o(640S)o(4NS)Spring 2009S. Hoyos - Advanced Mixed-Signal Interfaces56

Comparative StudySinc Filter BankAnalog Filter BankAnalog Front endLarger capacitorsSmaller capacitorscomplexityNo resistor required. ResetResistor required for finiteensures finite DC gain.DC gain.Lesser noiseNoise is high.Smaller GBW for op-amps.Larger GBW for op-amps.Analog Power consumptionLess4 times higherDigital complexityo (4S (N logM) ) o(o ( 4NMS )(Estimation)4NS)Example: o (640S)Example: o (60S)Digital complexityo(16N2S) o(4S (logM N)) (Estimation @ calibration)o(4NS)Digital power consumptionSpring 2009o (4NMS)Example: o(460S)Example: o (640S)LowHighExample: About 10% ofExample: 10 times moreS. Hoyos - Advanced Mixed-Signal Interfaces57

Multi-Standard reconfigurable FD receiverGSMNBluetoothMixeroutputWi‐FiUWB0.82to ADCNWiMaxF1GSMMto ADC3F1‐F4 (UWB)MixerGmRFbroadbandsignalNth orderDecimationFilterNsinc2 anti‐aliasing filter6F1F1 WiMaxBluetooth, 802.11 b/gto ADCF111GHzMixing FrequencyallocationGSMBluetooth , 802.11 b/gWiMaxUWBStandardBandwidthBitsUWB500 MHz5WiMax25 MHz7Wi-Fi20 MHz8Bluetooth1 MHz12GSM200 KHz14Anti‐aliasing filter&SamplerΣ ADCAnti‐aliasing filter&SamplerΣ ADCLNAMixerGmSpring 2009F5S. Hoyos - AdvancedMixed-Signal Interfaces58

Decentralized TD Sensor Networkh3(t)S1h1(t) Sourcea0Data sampled @sub-Nyquist rateby sensor nodesS1-S4istransmittedtoFusion Center forprocessingS3 h2(t)a1a2 .S2.r1r2r3r4 nandSyncErrorRF broadband signalMixerLNACharge sampling Integrator GmLO signalModulated signal(to central unit)TransmittermTs TcS4(.) dtmTsh4(t) Analog samples(o/p of chargesampling circuit)hi(t) is the equivalent channel impulseresponse for sensor node SiSpring 2009S. Hoyos - Advanced Mixed-Signal Interfaces59

Spring 2009 S. Hoyos - Advanced Mixed-Signal Interfaces 17 Improvement of Mixer Nonlinearities (IIP2) for Active Mixers Liwei Sheng; Larson, L.E.;"An Si-SiGe BiCMOS direct-conversion mixer with second-order and third-order nonlinearity cancellation for WCDMA applications,"Microwave Theory and Techniques, IEEE Transactions onVolume 51, Issue

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