Requirement For A Package Substrate To Minimize The High . - INEMI
iNEMI Packaging substrates Workshop Requirement for a package substrate to minimize the high temperature package warpage Nov. 17, 2009 Hirofumi Nakajima NEC Electronics Co. 1
Agenda 1. 2. 3. 4. 5. 6. 7. 8. 9. High temperature package warpage Package warpage: trends PBGA, FBGA: temperature-dependent behavior FCBGA: temperature dependent behavior Bottom device of PoP: temperature-dependent behavior Mold compound requirements Package substrate requirements Motherboard warpage requirements Summary 2
High temperature package warpage Example: PBGA Package warpage, deviation from flatness caused by internal stress, may cause unacceptable SMT quality including solder ball bridging and non-wet opens. Before reflow Die size Die Mold compound Substrate Printed solder paste (75 um after reflow) Mother board During reflow Warpage Both packages and PWB warp due to different CTEs, elastic ratios, and Tgs of composing materials. Mother board 3
High temperature warpage Example: PoP (Package on package) Top device of PoP behaves similar to FBGA. Bottom device of PoP always warps concave shape at elevated temperature, which tends to cause opens at center balls of each row or solder bridges at corner balls. Room temperature Reflow condition Bottom package of PoP Pre-stacking Top and bottom packages 4
PBGA, FBGA Warpage data example vs. criteria Warpage at high temp. (um) The warpage data across PBGA’s and FBGA’s bottom faces are consolidated to verify whether the criteria are reasonable. Results: Existing larger packages do not meet the criteria when they are moist, but semiconductor suppliers will make effort to meet the criteria. 300 Dry Moistured 250 200 150 110 um MAX for 220 um MAX for 1.0 mm-pitch BGA 170 um MAX for 0.8 mm-pitch FBGA 0.5 mm-pitch FBGA 100 50 0 0 10 20 30 40 50 Body size (mm) 5
Package warpage: trends Convex ( ) Concave (-) Increasing package size and decreasing package thickness increase the warpage. Larger package size requires larger footprint area on PWB, where both warpages become larger to fall in surface mount failures. Package warpage limits must also lower as time passes to widen the SMT process window and insure acceptable SMT quality. Optimization of materials and package construction is the sokution. PCB warpage improvement is also needed to share the burden imposed by SMT process demands for larger body sizes, at any given BGA pitch. 6
ITRS draft for high temperature package warpage Year of Production Pitch (mm) 2009 2010 2011 2012 2013 2014 2015 2016 2017 Low-cost, mobile and memory applications Cost-performance, high-performance and harsh applications Ball Dia. (mm) 0.9 -0.14, 0.23 -0.14, 0.23 -0.14, 0.23 -0.14, 0.23 -0.13, 0.21 -0.13, 0.21 -0.13, 0.21 -0.13, 0.21 -0.13, 0.21 0.6 0.35 -0.14, 0.23 -0.14, 0.23 -0.14, 0.23 -0.14, 0.22 -0.14, 0.22 -0.14, 0.23 -0.14, 0.23 -0.10, 0.10 -0.10, 0.10 -0.12, 0.12 -0.12, 0.12 -0.10, 0.10 -0.10, 0.10 -0.10, 0.10 -0.14, 0.23 -0.14, 0.23 -0.14, 0.23 -0.14, 0.22 -0.14, 0.22 -0.14, 0.23 -0.14, 0.23 -0.10, 0.10 -0.10, 0.10 -0.12, 0.12 -0.12, 0.12 -0.10, 0.10 -0.10, 0.10 -0.10, 0.10 -0.14, 0.23 -0.14, 0.23 -0.14, 0.23 -0.14, 0.22 -0.14, 0.22 -0.14, 0.23 -0.14, 0.23 -0.10, 0.10 -0.10, 0.10 -0.12, 0.12 -0.12, 0.12 -0.10, 0.10 -0.10, 0.10 -0.10, 0.10 -0.14, 0.23 -0.14, 0.23 -0.14, 0.23 -0.14, 0.22 -0.14, 0.22 -0.14, 0.23 -0.14, 0.23 -0.10, 0.10 -0.10, 0.10 -0.12, 0.12 -0.12, 0.12 -0.10, 0.10 -0.10, 0.10 -0.10, 0.10 -0.13, 0.21 -0.13, 0.21 -0.13, 0.21 -0.13, 0.20 -0.13, 0.20 -0.13, 0.21 -0.13, 0.21 -0.09, 0.09 -0.09, 0.09 -0.11, 0.11 -0.11, 0.11 -0.09, 0.09 -0.09, 0.09 -0.09, 0.09 -0.13, 0.21 -0.13, 0.21 -0.13, 0.21 -0.13, 0.20 -0.13, 0.20 -0.13, 0.21 -0.13, 0.21 -0.09, 0.09 -0.09, 0.09 -0.11, 0.11 -0.11, 0.11 -0.09, 0.09 -0.09, 0.09 -0.09, 0.09 -0.13, 0.21 -0.13, 0.21 -0.13, 0.21 -0.13, 0.20 -0.13, 0.20 -0.13, 0.21 -0.13, 0.21 -0.09, 0.09 -0.09, 0.09 -0.11, 0.11 -0.11, 0.11 -0.09, 0.09 -0.09, 0.09 -0.09, 0.09 -0.13, 0.21 -0.13, 0.21 -0.13, 0.21 -0.13, 0.20 -0.13, 0.20 -0.13, 0.21 -0.13, 0.21 -0.09, 0.09 -0.09, 0.09 -0.11, 0.11 -0.11, 0.11 -0.09, 0.09 -0.09, 0.09 -0.09, 0.09 -0.13, 0.21 -0.13, 0.21 -0.13, 0.21 -0.13, 0.20 -0.13, 0.20 -0.13, 0.21 -0.13, 0.21 -0.09, 0.09 -0.09, 0.09 -0.11, 0.11 -0.11, 0.11 -0.09, 0.09 -0.09, 0.09 -0.09, 0.09 0.25 -0.075, 0.075 -0.075, 0.075 -0.075, 0.075 -0.075, 0.075 -0.065, 0.065 -0.065, 0.065 -0.065, 0.065 -0.065, 0.065 -0.065, 0.065 0.3 -0.075, 0.075 -0.075, 0.075 -0.075, 0.075 -0.075, 0.075 -0.065, 0.065 -0.065, 0.065 -0.065, 0.065 -0.065, 0.065 -0.065, 0.065 0.2 -0.05, 0.05 -0.05, 0.05 -0.05, 0.05 -0.05, 0.05 -0.045, 0.045 -0.045, 0.045 -0.045, 0.045 -0.045, 0.045 -0.045, 0.045 7 1.27 0.6 1.0 0.4 0.55 0.8 0.25 0.45 0.65 0.25 0.5 0.4
PBGA, FBGA: Temperature-dependent behavior Molded condition is stress free, flat. Molding shrinkage and the subsequent cooling cause the shrinkage of package. Reflow soldering makes a package expand and the CTE mismatch between materials causes the high temperature warpage. 28- 35 ppm/deg Package dimension change 5-11 ppm/deg Die shrinkage Substrate shrinkage 3 ppm/deg Mold injection Molding shrinkage Die set opening Stress in the PKG Warpage 11-14 ppm/deg Mold resin shrinkage 7- 9 ppm/deg RT Tg (mold Tg Molding temp. Resin) (substrate) Peak temp. Of reflow Temp. 8
PBGA, FBGA: Package design efforts Package warpage is primarily design failure derived from the CTE mismatch between die, substrate, and mold resin. Warpage elements: material properties, die size, die thickness, substrate thickness, mold thickness, and mold cap occupancy in the substrate area. 28- 35 ppm/deg Package dimension change 5-11 ppm/deg Die shrinkage 3 ppm/deg Mold injection Molding contraction Die set opening Balance 11-14 ppm/deg Mold resin shrinkage 7- 9 ppm/deg RT Tg (mold Tg Molding temp. Resin) (substrate) Peak temp. Of reflow Temp. 9
PBGA, FBGA: Mold resin efforts Adjusting molding shrinkage and CTE of mold resin is currently a main solution to improve warpage. Package dimension change Smaller molding shrinkage (%): Lower CTE α1 (ppm/deg): α2 (ppm/deg): Conventional 0.16 – 0.3 9 – 15 30 – 50 Less warp compound 0.10 – 0.17 7–9 28 – 35 Mold injection Die shrinkage Lower molding shrinkage Substrate shrinkage Lower α 2 Lower α1 RT Mold resin shrinkage Tg (mold Tg Molding temp. Resin) (substrate) Peak reflow temp. Temp. 10
PBGA, FBGA: Substrate efforts Package dimension change Even after using lower CTE mold resin, compound shrinkage of die and mold resin depend on die size. Substrate stiffness resists the stress and keeps package straight. Therefore, flexural modulus must be high even beyond Tg. - Inorganic filler; amount, shape, size, material - Glass cloth; # of ply, flatten cloth, Aramid, Carbon fiber - Base resin; rigid backbone - Metal layer; # of Cu layer, thickness - Thicker substrate Mold injection Modulus at 260 deg C Die: 130 – 180 GPa Substrate: 10 – 15 GPa Mold resin: 0.4 -1.8GPa Die shrinkage Balance Mold resin shrinkage Modulus at RT Die: 130 – 180 GPa Substrate: 18 – 17 GPa Mold resin: 22 – 29 GPa RT Substrate must be flat, resisting the stress of CTE mismatch. Tg (mold Tg Molding temp. Resin) (substrate) Peak reflow temp. Temp. 11
FCBGA: temperature dependent behavior Lower CTE of substrate and higher flexural modulus are solutions to achieve better FCBGA coplanarity at room temperature. 常温時（２５ ） 140 120 80 60 40 20 S31 33 25 X [Ball] 29 17 S11 21 S1 Y [Ball] Underfill cure ピーク（２５０ ） Die shrinkage 140 120 100 Substrate shrinkage Z [um] 80 60 40 20 S34 S23 RT Tg Molding temp. (substrate) 21 29 33 X [Ball] S12 25 13 1 5 9 0 17 9 S21 13 1 0 5 Package dimension change Z [um] 100 S1 Y [Ball] Peak temp. Of reflow Temp. 12
FCBGA: Substrate efforts Requirements Thinner substrate High flexural modulus core Low CTE core Mitigating CTE mismatch between die and PWB Package substrate Core suppliers provide various products that appeal the advantage of their unique property balance. Source: Samsung Electro-mechanics 13
Bottom device of PoP: Temperature-dependent behavior Small mold cap of PoP’s bottom device requires larger molding shrinkage rate and CTE of the mold resin. Package dimension change Mold injection Die shrinkage Substrate shrinkage Balance Larger molding shrinkage Lager α 2 Mold resin shrinkage Larger α1 RT Tg (mold Tg Molding temp. Resin) (substrate) Peak temp. Of reflow Temp. 14
Bottom device of PoP: Mold resin efforts Larger molding shrinkage (%): Higher CTE α1 (ppm/deg): α2 (ppm/deg): High CTE Conventional 0.16 – 0.3 9 – 15 30 – 50 Bottom PoP resin 0.4 – 0.7 17 – 34 60 – 90 Mold compound Low CTE Silicon High CTE Substrate 180 C RT RT 260 C 15
Bottom device of PoP: Substrate efforts Requirements Thinner substrate High flexural modulus core Low CTE core For higher flexural modulus, larger number of glass cloth plies or metal layers are preferred but also costly. Source: Mitsubishi Gas Chemical 16
Mold compound requirements Low molding shrinkage and low CTE are basic requirements for molding resin for PBGA and FBGA. Less moisture absorption: Moist mold compound may have larger CTE, which causes larger warpage when reflowed. High molding shrinkage and high CTE are required for molding resin for the current mold cap design of PoP’s bottom device. Is it possible to prepare a series of mold resin variations which covers all CTE and molding shrinkage rates to adjust the CTE balance of package elements? Mold resin type #1 #2 #3 #4 #5 #6 Molding shrinkage 0.10 0.15 0.20 0.25 0.3 0.35 CTE below Tg 8 10 12 14 16 18 CTE above Tg 25 30 35 40 45 50 17
Package substrate requirements In disregard of cost, the following means help to keep package straightness. Four or more metal layers Two or more glass cloth plies High flexural modulus polymer Low CTE core Low elastic modulus on the surface layers to mitigate the stress caused by CTE mismatch. How can we refrain from increasing cost in using the preferred substrate structure? Standardizing substrate cores? Creating roadmap for flexural modulus of substrate A two-ply core material must cost the same as a one-ply core material. Si (3 ppm/deg) Motherboard warpage Less bow and twist at SMT footprint are requested Low modulus Substrate Core (11ppm/deg) Low modulus PWB (16 ppm/deg) 18
Motherboard warpage requirements Mother board warpage roadmap at room temperature is already too loose to satisfy the package warpage at elevated temperature. Type Motherboard warpage High volume production Laminate Advanced technology available in production (%) Cutting edge technology not available in production High volume production Buildup Advanced technology available in production (%) Cutting edge technology not available in production 2008 0.5 2010 0.5 2012 0.5 2014 0.5 2016 0.5 2018 0.5 0.3 0.3 0.3 0.3 0.3 0.3 0.2 0.2 0.2 0.2 0.2 0.2 0.5 0.5 0.5 0.5 0.5 0.5 0.3 0.3 0.3 0.3 0.3 0.3 0.2 0.2 0.2 0.2 0.2 0.2 Ball pitch (mm) 0.4 0.5 0.65 0.8 1.0 1.27 MAX flatness of foot prints at PWB (um) 20 30 40 40 60 60 MAX Body size (mm): High volume 0.4 0.6 0.8 0.8 1.2 1.2 MAX Body size (mm): Advanced technology available in production 0.7 1.0 1.3 1.3 2.0 2.0 MAX Body size (mm): Cutting edge technology not available in production 1.0 1.5 2.0 2.0 3.0 3.0 Source: Utsunomiya, JJTR 2009 19
Motherboard warpage requirements Mother board warpage roadmap at room temperature is already too loose to satisfy the package warpage at elevated temperature. Type Motherboard warpage High volume production Laminate Advanced technology available in production (%) Cutting edge technology not available in production High volume production Buildup Advanced technology available in production (%) Cutting edge technology not available in production 2008 0.5 2010 0.5 2012 0.5 2014 0.5 2016 0.5 2018 0.5 0.3 0.3 0.3 0.3 0.3 0.3 0.2 0.2 0.2 0.2 0.2 0.2 0.5 0.5 0.5 0.5 0.5 0.5 0.3 0.3 0.3 0.3 0.3 0.3 0.2 0.2 0.2 0.2 0.2 0.2 Ball pitch (mm) 0.4 0.5 0.65 0.8 1.0 1.27 MAX flatness of foot prints at PWB (um) 20 30 40 40 60 60 MAX Body size (mm): High volume 0.4 0.6 0.8 0.8 1.2 1.2 MAX Body size (mm): Advanced technology available in production 0.7 2.0 MAX Body size (mm): Cutting edge technology not available in production 1.0 1.0 small 1.3 size 1.3to be 2.0 Too allowed for SMT 1.5 2.0 2.0 3.0 Source: Utsunomiya, JJTR 2009 3.0 20
Summary Principally, package warpage at high temperature can be controlled by choosing the relevant material conbinations. Mold resin for PBGA and FBGA to be lower CTE lower molding shrinkage A series of mold resin variations that provide CTE and mold shrinkage Package substrate to be lower CTE higher flexural modulus Lower modulus on the surface layer to mitigate the stress derived from CTE mismatch between silicon and motherboard. the same cost as conventional substrate Motherboard to be less warpage in the footprint area at both room and high temperature Especially, warpage roadmap of PWB does not meet the requirement of high temperature warpage of a package. 21
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6 Package warpage: trends Convex ( ) Concave (-) Increasing package size and decreasing package thickness increase the warpage. Larger package size requires larger footprint area on PWB, where both warpages become larger to fall in surface mount failures. Package warpage limits must also lower as time passes to widen the SMT process window and insure acceptable SMT quality.
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