PI7C9X113SL - Diodes Incorporated
PI7C9X113SLPCI Express-to-PCI BridgeDatasheetJanuary 2021Revision 51545 Barber Lane Milpitas, CA 95035Telephone: 408-232-9100FAX: 408-434-1040Internet: http://www.diodes.comDocument Number DS40300 Rev 5-2
PI7C9X113SLPRIMPORTANT NOTICE1.DIODES INCORPORATED AND ITS SUBSIDIARIES (“DIODES”) MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED,WITH REGARDS TO ANY INFORMATION CONTAINED IN THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIEDWARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTYINTELLECTUAL PROPERTY RIGHTS (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).2.The Information contained herein is for informational purpose only and is provided only to illustrate the operation of Diodes products describedherein and application examples. Diodes does not assume any liability arising out of the application or use of this document or any product describedherein. This document is intended for skilled and technically trained engineering customers and users who design with Diodes products. Diodes productsmay be used to facilitate safety-related applications; however, in all instances customers and users are responsible for (a) selecting the appropriate Diodesproducts for their applications, (b) evaluating the suitability of the Diodes products for their intended applications, (c) ensuring their applications, whichincorporate Diodes products, comply the applicable legal and regulatory requirements as well as safety and functional-safety related standards, and (d)ensuring they design with appropriate safeguards (including testing, validation, quality control techniques, redundancy, malfunction prevention, andappropriate treatment for aging degradation) to minimize the risks associated with their applications.3.Diodes assumes no liability for any application-related information, support, assistance or feedback that may be provided by Diodes from timeto time. Any customer or user of this document or products described herein will assume all risks and liabilities associated with such use, and will holdDiodes and all companies whose products are represented herein or on Diodes’ websites, harmless against all damages and liabilities.4.Products described herein may be covered by one or more United States, international or foreign patents and pending patent applications.Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks and trademarkapplications. Diodes does not convey any license under any of its intellectual property rights or the rights of any third parties (including third partieswhose products and services may be described in this document or on Diodes’ website) under this document.5.Diodes products are provided subject to Diodes’ Standard Terms and Conditions of Sale ditions/terms-and-conditions-of-sales/) or other applicable terms. This document does not alter or expand the applicable warranties provided byDiodes. Diodes does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel.6.Diodes products and technology may not be used for or incorporated into any products or systems whose manufacture, use or sale is prohibitedunder any applicable laws and regulations. Should customers or users use Diodes products in contravention of any applicable laws or regulations, or forany unintended or unauthorized application, customers and users will (a) be solely responsible for any damages, losses or penalties arising in connectiontherewith or as a result thereof, and (b) indemnify and hold Diodes and its representatives and agents harmless against any and all claims, damages,expenses, and attorney fees arising out of, directly or indirectly, any claim relating to any noncompliance with the applicable laws and regulations, as wellas any unintended or unauthorized application.7.While efforts have been made to ensure the information contained in this document is accurate, complete and current, it may contain technicalinaccuracies, omissions and typographical errors. Diodes does not warrant that information contained in this document is error-free and Diodes is under noobligation to update or otherwise correct this information. Notwithstanding the foregoing, Diodes reserves the right to make modifications, enhancements,improvements, corrections or other changes without further notice to this document and any product described herein. This document is written in Englishbut may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released byDiodes.8.Any unauthorized copying, modification, distribution, transmission, display or other use of this document (or any portion hereof) is prohibited.Diodes assumes no responsibility for any losses incurred by the customers or users or any third parties arising from any such unauthorized use.Copyright 2021 Diodes Incorporatedwww.diodes.comPI7C9X113SLDocument Number DS40300 Rev 5-2Page 2 of 80www.diodes.comJanuary 2021 Diodes Incorporated
PI7C9X113SLPRREVISION TIONPreliminary DatasheetUpdated Section 6.3 (I/O Limit Register – Offset 1Ch, Interrupt Line Register – Offset 3Ch, ArbiterEnable Register – Offset 48h, Memory ReadSmart Range Control Register – Offset 58h, UpstreamMemory Read/Write Control Register – Offset 68h, XPIP Configuration Register 1 – Offset D0h)Updated Section 12 IEEE 1149.1 Compatible JTAG Controller (Removed TRST L)Updated Table 14-2 DC Electrical Characteristics (VDDA)Updated Section 2 Pin Definitions (Pin 22 to NC)Updated Section 6.3 PCI Configuration Registers (Offset 40h, 44h, 6Ch, A4h, D0h, D4h)Updated VDDC and VDDA voltage to 1.1V (Section 2.7, Table 14-2)Updated Temperature Support Range from Extended Commercial to IndustrialUpdated DC Spec ParametersUpdated Figure 15-1 Package outline drawingDatasheet ReleasedUpdated VDDC and VDDA voltage to 1.0V (Section 2.7, Table 14-2)Remove Figure 8-2 Topology of internal clock generator and internal clock buffering – externalfeedback modeRemove Figure 8-4 Topology of external clock generator and internal clock buffering – externalfeedback modeUpdated VDDC and VDDA voltage to 1.15V (retroactive notice in January 2016)Remove NC and pin 22 from Section 2.6 and added pin 22 to Section 2.7 under pin name VSSUpdated Section 2.5 JTAG Boundary Scan SignalsUpdated LogoUpdated Section 2.7 Power and Ground PinsUpdated Section 2.8 Pin AssignmentsUpdated Section 14.1 Absolute Maximum RatingsUpdated Section 14.2 DC SpecificationsAdded Section 14.4 Operating Ambient TemperatureAdded Table 14-4 PCI Express Interface - Differential Transmitter (TX) Output CharacteristicsAdded Table 14-5 PCI Express Interface - Differential Receiver (RX) Input CharacteristicsAdded Section 14 Power SequencingUpdated Section 17 Ordering InformationRevision numbering system changed to whole numberFix converted PDF fileAdded Figure 16-2 Part MarkingUpdated Section 17 Ordering InformationUpdated Table 15-1 Absolute Maximum RatingsUpdated Section 14 Power SequencingAdded Section 14.2 Power-Off SequenceUpdated Section 14 Power SequencingUpdated Section 2.2 PCI Express SignalsPREFACEThe datasheet of PI7C9X113SL will be enhanced periodically when updated information is available. The technicalinformation in this datasheet is subject to change without notice. This document describes the functionalities ofPI7C9X113SL (PCI Express Bridge) and provides technical information for designers to design their hardware usingPI7C9X113SL.PI7C9X113SLDocument Number DS40300 Rev 5-2Page 3 of 80www.diodes.comJanuary 2021 Diodes Incorporated
PI7C9X113SLPRTABLE OF CONTENTS1INTRODUCTION . 101.11.21.31.42PIN DEFINITIONS . 122.12.22.32.42.52.62.72.83TRANSPARENT MODE . 18FORWARD BRDIGE . 18PCI EXPRESS FUNCTIONAL OVERVIEW. 205.15.26FUNCTIONAL MODE SELECTION . 17PIN STRAPPING . 17TRANSPARENT AND FORWARD BRIDGING. 184.14.25SIGNAL TYPES . 12PCI EXPRESS SIGNALS . 12PCI SIGNALS . 12MODE SELECT AND STRAPPING SIGNALS . 14JTAG BOUNDARY SCAN SIGNALS . 14MISCELLANEOUS SIGNALS . 14POWER AND GROUND PINS . 14PIN ASSIGNMENTS . 16MODE SELECTION AND PIN STRAPPING. 173.13.24INDUSTRY SPECIFICATION COMPLIANCE . 10GENERAL FEATURES . 11PCI EXPRESS FEATURES . 11PCI FEATURES . 11TLP STRUCTURE . 20VIRTUAL ISOCHRONOUS OPERATION . 20CONFIGURATION REGISTER ACCESS. 216.16.26.3CONFIGURATION REGISTER MAP . 21PCI EXPRESS EXTENDED CAPABILITY REGISTER MAP . 23PCI CONFIGURATION REGISTERS . .106.3.116.3.126.3.136.3.14VENDOR ID – OFFSET 00h . 25DEVICE ID – OFFSET 00h . 25COMMAND REGISTER – OFFSET 04h . 25PRIMARY STATUS REGISTER – OFFSET 04h . 26REVISION ID REGISTER – OFFSET 08h . 26CLASS CODE REGISTER – OFFSET 08h . 26CACHE LINE SIZE REGISTER – OFFSET 0Ch . 27PRIMARY LATENCY TIMER REGISTER – OFFSET 0Ch . 27HEADER TYPE REGISTER – OFFSET 0Ch . 27RESERVED REGISTERS – OFFSET 10h TO 17h . 27PRIMARY BUS NUMBER REGISTER – OFFSET 18h . 28SECONDARY BUS NUMBER REGISTER – OFFSET 18h . 28SUBORDINATE BUS NUMBER REGISTER – OFFSET 18h . 28SECONDARY LATENCY TIME REGISTER – OFFSET 18h. 28PI7C9X113SLDocument Number DS40300 Rev 5-2Page 4 of 80www.diodes.comJanuary 2021 Diodes Incorporated
26.3.636.3.646.3.656.3.666.3.676.3.68I/O BASE REGISTER – OFFSET 1Ch . 28I/O LIMIT REGISTER – OFFSET 1Ch . 28SECONDARY STATUS REGISTER – OFFSET 1Ch . 28MEMORY BASE REGISTER – OFFSET 20h . 29MEMORY LIMIT REGISTER – OFFSET 20h . 29PREFETCHABLE MEMORY BASE REGISTER – OFFSET 24h . 29PREFETCHABLE MEMORY LIMIT REGISTER – OFFSET 24h . 30PREFETCHABLE BASE UPPER 32-BIT REGISTER – OFFSET 28h. 30PREFETCHABLE LIMIT UPPER 32-BIT REGISTER – OFFSET 2Ch . 30I/O BASE UPPER 16-BIT REGISTER – OFFSET 30h . 30I/O LIMIT UPPER 16-BIT REGISTER – OFFSET 30h. 30CAPABILITY POINTER – OFFSET 34h . 30EXPANSION ROM BASE ADDRESS REGISTER – OFFSET 38h . 30INTERRUPT LINE REGISTER – OFFSET 3Ch . 31INTERRUPT PIN REGISTER – OFFSET 3Ch . 31BRIDGE CONTROL REGISTER – OFFSET 3Ch . 31PCI DATA PREFETCHING CONTROL REGISTER – OFFSET 40h . 32CHIP CONTROL 0 REGISTER – OFFSET 40h . 33RESERVED REGISTER – OFFSET 44h. 34ARBITER ENABLE REGISTER – OFFSET 48h . 35ARBITER MODE REGISTER – OFFSET 48h . 35ARBITER PRIORITY REGISTER – OFFSET 48h . 36RESERVED REGISTERS – OFFSET 4Ch . 36MEMORY READSMART BASE LOWER 32-Bit REGISTER 1 – OFFSET 50h. 36MEMORY READSMART BASE UPPER 32-Bit REGISTER 1 – OFFSET 54h . 36MEMORY READSMART RANGE CONTROL REGISTER 1 – OFFSET 58h . 36MEMORY READSMART BASE LOWER 32-Bit REGISTER 2 – OFFSET 5Ch . 37MEMORY READSMART BASE UPPER 32-Bit REGISTER 2 – OFFSET 60h . 37MEMORY READSMART RANGE SIZE REGISTER 2 – OFFSET 64h . 37UPSTREAM MEMORY READ/WRITE CONTROL REGISTER – OFFSET 68h . 37PHY TRANSMIT/RECEIVE CONTROL REGISTER – OFFSET 6Ch . 38EEPROM AUTOLOAD CONTROL/STATUS REGISTER – OFFSET 70h . 39RESERVED REGISTER – OFFSET 74h. 39GPIO DATA AND CONTROL REGISTER – OFFSET 78h . 39RESERVED REGISTER – OFFSET 7Ch . 40PCI-X CAPABILITY ID REGISTER – OFFSET 80h . 40NEXT CAPABILITY POINTER REGISTER – OFFSET 80h . 40PCI-X SECONDARY STATUS REGISTER – OFFSET 80h . 40PCI-X BRIDGE STATUS REGISTER – OFFSET 84h . 40UPSTREAM SPLIT TRANSACTION REGISTER – OFFSET 88h . 41DOWNSTREAM SPLIT TRANSACTION REGISTER – OFFSET 8Ch . 42POWER MANAGEMENT ID REGISTER – OFFSET 90h . 42NEXT CAPABILITY POINTER REGISTER – OFFSET 90h . 42POWER MANAGEMENT CAPABILITY REGISTER – OFFSET 90h . 42POWER MANAGEMENT CONTROL AND STATUS REGISTER – OFFSET 94h . 43PCI-TO-PCI SUPPORT EXTENSION REGISTER – OFFSET 94h . 44SUBTRACTIVE DECODING PCI-TO-PCI BRIDGE ENABLE – OFFSET 98h . 44RESERVED REGISTERS – OFFSET 9Ch . 44CAPABILITY ID REGISTER – OFFSET A0h . 44NEXT POINTER REGISTER – OFFSET A0h. 44SLOT NUMBER REGISTER – OFFSET A0h . 44CHASSIS NUMBER REGISTER – OFFSET A0h . 45SECONDARY CLOCK AND CLKRUN CONTROL REGISTER – OFFSET A4h . 45XPIP CONFIGURATION REGISTER 3 – OFFSET A4h . 46PI7C9X113SLDocument Number DS40300 Rev 5-2Page 5 of 80www.diodes.comJanuary 2021 Diodes Incorporated
1216.3.122CAPABILITY ID REGISTER – OFFSET A8h . 46NEXT POINTER REGISTER – OFFSET A8h. 46RESERVED REGISTER – OFFSET A8h . 46SUBSYSTEM VENDOR ID REGISTER – OFFSET ACh . 46SUBSYSTEM ID REGISTER – OFFSET ACh . 46PCI EXPRESS CAPABILITY ID REGISTER – OFFSET B0h . 47NEXT CAPABILITY POINTER REGISTER – OFFSET B0h . 47PCI EXPRESS CAPABILITY REGISTER – OFFSET B0h. 47DEVICE CAPABILITY REGISTER – OFFSET B4h . 47DEVICE CONTROL REGISTER – OFFSET B8h. 48DEVICE STATUS REGISTER – OFFSET B8h . 49LINK CAPABILITY REGISTER – OFFSET BCh. 49LINK CONTROL REGISTER – OFFSET C0h . 50LINK STATUS REGISTER – OFFSET C0h . 50RESERVED REGISTER – OFFSET C4 – C8h . 51XPIP CONFIGURATION REGISTER 0 – OFFSET CCh . 51XPIP CONFIGURATION REGISTER 1 – OFFSET D0h . 51XPIP CONFIGURATION REGISTER 2 – OFFSET D4h . 51CAPABILITY ID REGISTER – OFFSET D8h . 51NEXT POINTER REGISTER – OFFSET D8h . 52VPD REGISTER – OFFSET D8h . 52VPD DATA REGISTER – OFFSET DCh . 52EXTENDED CONFIGURATION ACCESS ADDRESS REGISTER – OFFSET E0h . 52EXTENDED CONFIGURATION ACCESS DATA REGISTER – OFFSET E4h . 52RESERVED REGISTERS – OFFSET E8h – ECh . 52MESSAGE SIGNALED INTERRUPTS ID REGISTER – F0h . 52NEXT CAPABILITIES POINTER REGISTER – F0h . 53MESSAGE CONTROL REGISTER – OFFSET F0h . 53MESSAGE ADDRESS REGISTER – OFFSET F4h . 53MESSAGE UPPER ADDRESS REGISTER – OFFSET F8h . 53MESSAGE DATA REGISTER – OFFSET FCh. 53ADVANCE ERROR REPORTING CAPABILITY ID REGISTER – OFFSET 100h . 53ADVANCE ERROR REPORTING CAPABILITY VERSION REGISTER – OFFSET 100h . 54NEXT CAPABILITY OFFSET REGISTER – OFFSET 100h . 54UNCORRECTABLE ERROR STATUS REGISTER – OFFSET 104h . 54UNCORRECTABLE ERROR MASK REGISTER – OFFSET 108h . 54UNCORRECTABLE ERROR SEVERITY REGISTER – OFFSET 10Ch . 54CORRECTABLE ERROR STATUS REGISTER – OFFSET 110h . 55CORRECTABLE ERROR MASK REGISTER – OFFSET 114h . 55ADVANCED ERROR CAPABILITIES AND CONTROL REGISTER – OFFSET 118h . 55HEADER LOG REGISTER 1 – OFFSET 11Ch . 56HEADER LOG REGISTER 2 – OFFSET 120h . 56HEADER LOG REGISTER 3 – OFFSET 124h . 56HEADER LOG REGISTER 4 – OFFSET 128h . 56SECONDARY UNCORRECTABLE ERROR STATUS REGISTER – OFFSET 12Ch . 56SECONDARY UNCORRECTABLE ERROR MASK REGISTER – OFFSET 130h . 57SECONDARY UNCORRECTABLE ERROR SEVERITY REGISTER – OFFSET 134h . 57SECONDARY ERROR CAPABILITY AND CONTROL REGISTER – OFFSET 138h. 58SECONDARY HEADER LOG REGISTER – OFFSET 13Ch – 148h. 58RESERVED REGISTER – OFFSET 14Ch . 58VC CAPABILITY ID REGISTER – OFFSET 150h . 58VC CAPABILITY VERSION REGISTER – OFFSET 150h . 58NEXT CAPABILITY OFFSET REGISTER – OFFSET 150h . 58PORT VC CAPABILITY REGISTER 1 – OFFSET 154h . 58PI7C9X113SLDocument Number DS40300 Rev 5-2Page 6 of 80www.diodes.comJanuary 2021 Diodes Incorporated
T VC CAPABILITY REGISTER 2 – OFFSET 158h . 59PORT VC CONTROL REGISTER – OFFSET 15Ch. 59PORT VC STATUS REGISTER – OFFSET 15Ch . 59VC0 RESOURCE CAPABILITY REGISTER – OFFSET 160h . 59VC0 RESOURCE CONTROL REGISTER – OFFSET 164h . 59VC0 RESOURCE STATUS REGISTER – OFFSET 168h . 59RESERVED REGISTERS – OFFSET 16Ch – 2FCh . 60EXTENDED GPIO DATA AND CONTROL REGISTER – OFFSET 300h. 60EXTENDED GPI/GPO DATA AND CONTROL REGISTER – OFFSET 304h . 60RESERVED REGISTERS – OFFSET 308h – 30Ch . 60REPLAY AND ACKNOWLEDGE LATENCY TIMERS – OFFSET 310h . 60RESERVED REGISTERS – OFFSET 314h – FFCh . 607GPIO PINS AND SM BUS ADDRESS. 618CLOCK SCHEME . 629INTERRUPTS . 6610EEPROM (I2C) INTERFACE AND SYSTEM MANAGEMENT BUS . 6710.110.210.3EEPROM (I2C) INTERFACE . 67SYSTEM MANAGEMENT BUS . 67EEPROM AUTOLOAD CONFIGURATION . 6711RESET SCHEME. 6912IEEE 1149.1 COMPATIBLE JTAG CONTROLLER . 7012.112.212.312.412.5INSTRUCTION REGISTER . 70BYPASS REGISTER . 70DEVICE ID REGISTER . 70BOUNDARY SCAN REGISTER . 71JTAG BOUNDARY SCAN REGISTER ORDER . 7113POWER MANAGEMENT . 7214POWER SEQUENCING . 7314.114.215INITIAL POWER-UP (G3 TO L0) . 74POWER-OFF SEQUENCE . 75
Updated VDDC and VDDA voltage to 1.1V (Section 2.7, Table 14-2) Updated Temperature Support Range from Extended Commercial to Industrial 01/14/2011 0.3g Updated DC Spec Parameters 08/19/2011 1.0 Updated Figure 15-1 Package outline drawing Datasheet Released 09/7/2011 1.1 Updated VDDC and VDDA voltage to 1.0V (Section 2.7, Table 14-2)
Title Word "DIODES" (only) Logo with "INCORPORATED" Color Palette1 Blue PMS# 294 PMS# 294 ("DIODES" in Blue)/ PMS# 418 ("INCORPORATED" in Grey) 4 Color Proces s Equivalents (%) C-100, M -56, Y -0, K -18 "DIODES": C-100, M-56, Y-0, K-18 "INCORPORATED": C-0, M-0, Y-30, K-79 Width/Heights Ratio2 W/H1 5.12 W/H2 4.14
direction typically include one or more diodes in the circuit design. Today the most common diodes are made from semiconductor materials such as silicon or germanium. There are a variety of diodes; A few important ones are described below. Normal (p-n) diodes The operation of these diodes is the subject of this document. Usually made of
3 A product Line of Diodes Incorporated PI5A100 www.diodes.com December 2017 Diodes Incorporated PI5A100 Document Number DS40515 Rev 1-2 Notes: 1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet.
Diodes Incorporated Diodes Zetex Semiconductors Limited Diodes Inc. Taiwan 4949 Hedgcoxe Road, Suite 110, Plano, TX 75024, USA Chadderton, Oldham, OL9 9LL United Kingdom Hsin-Tien, Taipei, Taiwan, R.O.C. Tel: 972 987 3900 Tel: (44) 161 622 4444 Tel: 011-886-2-8914-6000 Fax: (44) 161 622 4446 Fax: 011-886-2-8914-6639 GL-106 Rev 113 Page 1
SEMICONDUCTORS 2.PDF 1 E. COATES 2016 Semiconductor Diodes Module 2.0 Diodes Introduction Diodes are one of the simplest, but most useful of all semiconductor devices. Many types of diode are used for a wide range of applications. Rectifier diodes are a vital component in power supplies wher
PAM8302A 2 Document number: DS41333 Rev. 5 - 2 www.diodes.com of 14 September 2020 Diodes Incorporated PAM830
Pulse Testing Of Laser Diodes By: Paul Meyer Keithley Instruments, Inc. Thermal management is critical during the testing of laser diodes at the semiconductor wafer, bar, and chip-on-carrier (submount) production stages. This has led to pulse testing of laser diodes to minimize power dissipation. Still,
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