Transformer Driver For Isolated Power Supplies (Rev. C)

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SN6501www.ti.comSLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012Transformer Driver for Isolated Power SuppliesCheck for Samples: SN6501FEATURESAPPLICATIONS 1 Push-Pull Driver for Small TransformersSingle 3.3 V or 5 V SupplyHigh Primary-side Current Drive:– 5 V Supply: 350 mA (max)– 3.3 V Supply: 150 mA (max)Low Ripple on Rectified Output Permits SmallOutput CapacitorsSmall 5-pin SOT23 Package Isolated Interface Power Supply for CAN, RS485, RS-422, RS-232, SPI, I2C, Low-Power LANIndustrial AutomationProcess ControlMedical EquipmentDESCRIPTIONThe SN6501 is a monolithic oscillator/power-driver, specifically designed for small form factor, isolated powersupplies in isolated interface applications. It drives a low-profile, center-tapped transformer primary from a 3.3 Vor 5 V DC power supply. The secondary can be wound to provide any isolated voltage based on transformerturns ratio.The SN6501 consists of an oscillator followed by a gate drive circuit that provides the complementary outputsignals to drive the ground referenced N-channel power switches. The internal logic ensures break-before-makeaction between the two switches.The SN6501 is available in a small SOT23-5 package, and is specified for operation at temperatures from –40 Cto 125 C.VIN 0µF 0.1µFVcc51GND13INOUT5GNDENNC4VOUT-REG 5V10µFD1MBR0520LFigure 1. Typical Operating Circuit1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.Copyright 2012, Texas Instruments Incorporated

SN6501SLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012www.ti.comThese devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.FUNCTIONAL BLOCK DIAGRAMSN6501D1QVCCGateDriveOSCD2QGNDGNDPIN FUNCTIONSD11VCC2D235GND4GNDPIN No.NAME1D1Drain 1DESCRIPTION2VccSupply voltage3D2Drain 24,5GNDGroundTEST CIRCUITVINSN65014GND D2VCC5GND D13 50W10µF21 50WFigure 2. Test Circuit for RON, fOSC, fSt, tr-D, tf-D, tBBMVIN10µFSN65014T13GNDMBR0520L1D2VCC52210µF FMBR0520LFigure 3. Test Circuit for Output Voltage and Efficiency at TP1 and TP2(see Figure 4 to Figure 23)2Submit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN6501

SN6501www.ti.comSLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012ABSOLUTE MAXIMUM RATINGSover operating free-air temperature range (unless otherwise noted)(1)VALUESVCCSupply voltageVD1, VD2Output switch voltage–0.3 V to 6 VID1P, ID2PPeak output switch current500 mAPTOTContinuous power dissipation250 mWESDHuman Body ModelESDA/JEDEC JS-001-2012Charged Device ModelJEDEC JESD22-C101EMachine ModelJEDEC JESD22-A115-A14 VTSTGStorage temperature rangeTJJunction temperature(1) 4 kVAll Pins 1.5 kV 200 V–65 C to 150 C170 CStresses beyond those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage to the device. These are stress ratingsonly and functional operation of the device at these or any other conditions beyond those indicated under RECOMMENDEDOPERATING CONDITIONS is not implied. Exposure to absolute-maximum-rated conditions for extended periods affects devicereliability.THERMAL INFORMATIONSN6501THERMAL METRIC (1)DBV 5-PINSθJAJunction-to-ambient thermal resistance208.3θJCtopJunction-to-case (top) thermal resistance87.1θJBJunction-to-board thermal resistance40.4ψJTJunction-to-top characterization parameter5.2ψJBJunction-to-board characterization parameter39.7θJCbotJunction-to-case (bottom) thermal resistanceN/AUNITS C/Wneed space between thermal table note and ROC title(1)For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.RECOMMENDED OPERATING CONDITIONSVCCSupply voltageVD1, VD2Output switch voltageID1, ID2D1 and D2 output switchcurrent – Primary-sideTAVCC 5 V 10%,MINTYP MAX35.501107.2VCC 3.3 V 10%When connected to Transformer withprimary winding Center-tappedVCC 5 V 10%VD1, VD2 Swing 3.8 V,see Figure 27 for typical characteristics350VCC 3.3 V 10%VD1, VD2 Swing 2.5 V,see Figure 26 for typical characteristics150Ambient temperature125Submit Documentation FeedbackProduct Folder Link(s) :SN6501VVmA–40Copyright 2012, Texas Instruments IncorporatedUNIT C3

SN6501SLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012www.ti.comELECTRICAL CHARACTERISTICSOver full-range of recommended operating conditions, unless otherwise notedPARAMETERRONSwitch-on resistanceICCAverage supply current (1)fSTStartup frequencyfOSCOscillator frequencytr-DD1, D2 output rise timetf-DD1, D2 output fall timetBBMBreak-before-make time(1)4TEST CONDITIONSMINTYPMAXVCC 3.3 V 10%, See Figure 213VCC 5.0 V 10%, See Figure 20.62VCC 3.3 V 10%, no load150400VCC 5.0 V 10%, no load300700VCC 2.4 V, See Figure 2300250360550VCC 5.0 V 10%, See Figure 230041062070VCC 5.0 V 10%, See Figure 280VCC 3.3 V 10%, See Figure 2110VCC 5.0 V 10%, See Figure 260VCC 3.3 V 10%, See Figure 2150VCC 5.0 V 10%, See Figure 250ΩuAkHzVCC 3.3 V 10%, See Figure 2VCC 3.3 V 10%, See Figure 2UNITkHznsnsnsAverage supply current is the current used by SN6501 only. It does not include load current.Submit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN6501

SN6501www.ti.comSLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012TYPICAL OPERATING CHARACTERISTICSTypical Curves in Figure 4 through Figure 23 are measured with Circuit in Figure 3 at TP1 and TP2. TA 25 C unlessotherwise noted.990880TP1TP1770Efficiency - %VOUT - V6TP2543504030220T1 1:1.5 (DA2303-AL from Coilcraft)VIN 5 V, Vout 5 VLDO TPS7325010TP26004080T1 1:1.5 (DA2303-AL from Coilcraft)VIN 5 V, Vout 5 VLDO TPS7325010120160ILOAD - mA2002400280040Figure 4. Output Voltage vs Load Current80120160ILOAD - mA200240280Figure 5. Efficiency vs Load Current990880770660TP15Efficiency - %VOUT - VTP2TP14TP23504030220T1 1:1.5 (DA2303-AL from Coilcraft)VIN 3.3 V, Vout 3.3 VLDO TPS76333100T1 1:1.5 (DA2303-AL from Coilcraft)VIN 3.3 V, Vout 3.3 VLDO TPS76333100204060800100204060ILOAD - mAILOAD - mAFigure 6. Output Voltage vs Load Current100120Figure 7. Efficiency vs Load Current909880TP17TP170Efficiency - %6VOUT - V805TP243TP260504030220T1 1:2.2 (DA2304-AL from Coilcraft)VIN 3.3 V, Vout 5 VLDO TPS76350100010203040ILOAD - mAT1 1:2.2 (DA2304-AL from Coilcraft)VIN 3.3 V, Vout 5 VLDO TPS76350105060700Figure 8. Output Voltage vs Load Current1020304050ILOAD - mA6070Figure 9. Efficiency vs Load CurrentSubmit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN6501805

SN6501SLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012www.ti.comTYPICAL OPERATING CHARACTERISTICS (continued)Typical Curves in Figure 4 through Figure 23 are measured with Circuit in Figure 3 at TP1 and TP2. TA 25 C unlessotherwise noted.990880TP1770TP2TP1Efficiency - %VOUT - V6TP254360504030220T1 1:2.0 (MA5632-AL from Coilcraft)VIN 3.3 V, Vout 5 VLDO TPS76350110001020304050ILOAD - mA6070T1 1:2.0 (MA5632-AL from Coilcraft)VIN 3.3 V, Vout 5 VLDO TPS76350008010Figure 10. Output Voltage vs Load Current20304050ILOAD - mA607080Figure 11. Efficiency vs Load Current890780TP1TP1VOUT - VEfficiency - %TP25TP27064360504030220T1 1:1.31 (78253/55MC from Murata)VIN 5 V, Vout 5 VLDO TPS732501000020406080T1 1:1.31 (78253/55MC from Murata)VIN 5 V, Vout 5 VLDO TPS7325010100 120ILOAD - mA14016018020020Figure 12. Output Voltage vs Load Current406080100 120ILOAD - mA140160180200Figure 13. Efficiency vs Load Current890780TP170Efficiency - %6VOUT - V5TP14TP23504030220T1 1:1.31 (78253/55MC from Murata)1 VIN 3.3 V, Vout 3.3 VLDO TPS7633300TP260T1 1:1.31 (78253/55MC from Murata)VIN 3.3 V, Vout 3.3 VLDO TPS7633310010203040506070ILOAD - mA8090100110120010Figure 14. Output Voltage vs Load Current6Submit Documentation Feedback203040506070ILOAD - mA8090100110120Figure 15. Efficiency vs Load CurrentCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN6501

SN6501www.ti.comSLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012TYPICAL OPERATING CHARACTERISTICS (continued)Typical Curves in Figure 4 through Figure 23 are measured with Circuit in Figure 3 at TP1 and TP2. TA 25 C unlessotherwise noted.908TP1TP1807706VOUT - VEfficiency - %TP2543TP2504030220T1 1:2.27 (78253/35MC from Murata)VIN 3.3 V, Vout 5 VLDO TPS763501060T1 1:2.27 (78253/35MC from Murata)VIN 3.3 V, Vout 5 VLDO TPS76350100010203040ILOAD - mA506070010Figure 16. Output Voltage vs Load Current203040ILOAD - mA6070Figure 17. Efficiency vs Load Current890TP1TP1807706TP25Efficiency - %VOUT - V504360TP2504030220T1 1:1.5 (750310999 from Wurth Electronics Midcom)1 V 5 V, V 5 VINoutLDO TPS73250004080120160ILOAD - mA10T1 1:1.5 (750310999 from Wurth Electronics Midcom)VIN 5 V, Vout 5 VLDO TPS73250020024004080Figure 18.160200240Figure 19.906TP1805TP170Efficiency - %4VOUT - V120ILOAD - mATP2360TP2504030220T1 1:1.5 (750310999 from Wurth Electronics Midcom)VIN 3.3 V, VOUT 3.3 VLDO TPS76333110T1 1:1.5 (750310999 from Wurth Electronics Midcom)VIN 3.3 V, VOUT 3.3 VLDO TPS76333000102030405060ILOAD - mA708090100010Figure 20.2030405060ILOAD - mA708090100Figure 21.Submit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN65017

SN6501SLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012www.ti.comTYPICAL OPERATING CHARACTERISTICS (continued)Typical Curves in Figure 4 through Figure 23 are measured with Circuit in Figure 3 at TP1 and TP2. TA 25 C unlessotherwise noted.1090980870Efficiency - %TP17VOUT - VTP16TP254TP2605040303202T1 1:2.2 (750310995 from Wurth Electronics Midcom)1 VIN 3.3 V, Vout 5 VLDO TPS76350001020304050ILOAD - mAT1 1:2.2 (750310995 from Wurth Electronics Midcom)VIN 3.3 V, Vout 5 VLDO TPS763501006007010Figure 22. Output Voltage vs Load Current203040ILOAD - mA506070Figure 23. Efficiency vs Load Current400460350440VCC 5 VVCC 5 V300f - Frequency - kHz420ICC - mA250200VCC 3.3 V150400380VCC 3.3 V360100340500-55-35-155254565TA - Free-Air Temperature - C85105320-55125Figure 24. Average Supply Current vs Free-AirTemperature-35-155254565TA - Free-Air Temperature - C85105125Figure 25. D1, D2 Oscillator Frequency vs Free-AirTemperature53.3VCC 5 VVCC 3.3 V4.953.25VD1, VD2 Voltage Swing - VVD1, VD2 Voltage Swing - ID1, ID2 - mA150200Figure 26. D1, D2 Primary-side Output Switch VoltageSwing vs Current80100200ID1, ID2 - mA300400Figure 27. D1, D2 Primary-side Output Switch VoltageSwing vs CurrentSubmit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN6501

SN6501www.ti.comSLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012TYPICAL OPERATING CHARACTERISTICS (continued)Typical Curves in Figure 4 through Figure 23 are measured with Circuit in Figure 3 at TP1 and TP2. TA 25 C unlessotherwise noted.500 mV/divD2D12 V/div2 V/divD2D1500 mV/divTime - 400 ns/divFigure 28. D1, D2 Switching WaveformsTime - 200 ns/divFigure 29. D1, D2 Break-Before-Make WaveformSubmit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN65019

SN6501SLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012www.ti.comAPPLICATION INFORMATIONThe SN6501 is a transformer driver designed for low-cost, small form-factor, isolated DC-DC converters utilizingthe push-pull topology. The device includes an oscillator that feeds a gate-drive circuit. The gate-drive,comprising a frequency divider and a break-before-make (BBM) logic, provides two complementary outputsignals which alternately turn the two output transistors on and off.VccSN6501Q2 offQ1 offD2OSCfOSCSG2Freq.Divider SBBMLogic G1Q2D1Q1Q1 onGNDtBBMQ2 onGNDFigure 30. SN6501 Block Diagram and Output Timing with Break-Before-Make ActionThe output frequency of the oscillator is divided down by an asynchronous divider that provides twocomplementary output signals, S and S, with a 50% duty cycle. A subsequent break-before-make logic inserts adead-time between the high-pulses of the two signals. The resulting output signals, G1 and G2, present the gatedrive signals for the output transistors Q1 and Q2. As shown in Figure 31, before either one of the gates canassume logic high, there must be a short time period during which both signals are low and both transistors arehigh-impedance. This short period, known as break-before-make time, is required to avoid shorting out both endsof the primary.fOSCSSG1G2Q1Q2Figure 31. Detailed Output Signal WaveformsPUSH-PULL CONVERTERPush-pull converters require transformers with center-taps to transfer power from the primary to the secondary(see Figure 32).10Submit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN6501

SN6501www.ti.comSLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012CR1CR1VOUTCCRLVINRLVINCR2Q2VOUTCR2Q1Q2Q1Figure 32. Switching Cycles of a Push-Pull ConverterWhen Q1 conducts, VIN drives a current through the lower half of the primary to ground, thus creating a negativevoltage potential at the lower primary end with regards to the VIN potential at the center-tap.At the same time the voltage across the upper half of the primary is such that the upper primary end is positivewith regards to the center-tap in order to maintain the previously established current flow through Q2, which nowhas turned high-impedance. The two voltage sources, each of which equaling VIN, appear in series and cause avoltage potential at the open end of the primary of 2 VIN with regards to ground.Per dot convention the same voltage polarities that occur at the primary also occur at the secondary. Thepositive potential of the upper secondary end therefore forward biases diode CR1. The secondary current startingfrom the upper secondary end flows through CR1, charges capacitor C, and returns through the load impedanceRL back to the center-tap.When Q2 conducts, Q1 goes high-impedance and the voltage polarities at the primary and secondary reverse.Now the lower end of the primary presents the open end with a 2 VIN potential against ground. In this case CR2is forward biased while CR1 is reverse biased and current flows from the lower secondary end through CR2,charging the capacitor and returning through the load to the center-tap.CORE MAGNETIZATIONFigure 33 shows the ideal magnetizing curve for a push-pull converter with B as the magnetic flux density and Has the magnetic field strength. When Q1 conducts the magnetic flux is pushed from A to A’, and when Q2conducts the flux is pulled back from A’ to A. The difference in flux and thus in flux density is proportional to theproduct of the primary voltage, VP, and the time, tON, it is applied to the primary: B VP tON.BVINA’VPHRDSVDSAVIN VP VDSFigure 33. Core Magnetization and Self-Regulation Through Positive Temperature Coefficient of RDS(on)This volt-seconds (V-t) product is important as it determines the core magnetization during each switching cycle.If the V-t products of both phases are not identical, an imbalance in flux density swing results with an offset fromthe origin of the B-H curve. If balance is not restored, the offset increases with each following cycle and thetransformer slowly creeps toward the saturation region.Submit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN650111

SN6501SLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012www.ti.comFortunately, due to the positive temperature coefficient of a MOSFET’s on-resistance, the output FETs of theSN6501 have a self-correcting effect on V-t imbalance. In the case of a slightly longer on-time, the prolongedcurrent flow through a FET gradually heats the transistor which leads to an increase in RDS-on. The higherresistance then causes the drain-source voltage, VDS, to rise. Because the voltage at the primary is thedifference between the constant input voltage, VIN, and the voltage drop across the MOSFET, VP VIN – VDS, VPis gradually reduced and V-t balance restored.CONVERTER DESIGNThe following recommendations on components selection focus on the design of an efficient push-pull converterwith high current drive capability. Contrary to popular belief, the output voltage of the unregulated converteroutput drops significantly over a wide range in load current. The characteristic curve in Figure 8 for exampleshows that the difference between VOUT at minimum load and VOUT at maximum load exceeds a transceiver’ssupply range. Therefore, in order to provide a stable, load independent supply while maintaining maximumpossible efficiency the implementation of a low dropout regulator (LDO) is strongly advised.The final converter circuit is shown in Figure 3. The measured VOUT and efficiency characteristics for theregulated and unregulated outputs are shown in Figure 4 to Figure 23.SN6501 DRIVE CAPABILITYThe SN6501 transformer driver is designed for low-power push-pull converters with input and output voltages inthe range of 3 V to 5.5 V. While converter designs with higher output voltages are possible, care must be takenthat higher turns ratios don’t lead to primary currents that exceed the SN6501 specified current limits.LDO SELECTIONThe minimum requirements for a suitable low dropout regulator are: Its current drive capability should slightly exceed the specified load current of the application to prevent theLDO from dropping out of regulation. Therefore for a load current of 100 mA, choose a 100 mA to 150 mALDO. While regulators with higher drive capabilities are acceptable, they also usually possess higher dropoutvoltages that will reduce overall converter efficiency. The internal dropout voltage, VDO, at the specified load current should be as low as possible to maintainefficiency. For a low-cost 150 mA LDO, a VDO of 150 mV at 100 mA is common. Be aware however, that thislower value is usually specified at room temperature and can increase by a factor of 2 over temperature,which in turn will raise the required minimum input voltage. The required minimum input voltage preventing the regulator from dropping out of line regulation is given with:VI-min VDO-max VO-max.This means in order to determine VI for worst-case condition, the user must take the maximum values for VDOand VO specified in the LDO data sheet for rated output current (i.e., 100 mA) and add them together. Alsospecify that the output voltage of the push-pull rectifier at the specified load current is equal or higher than VImin. If it is not, the LDO will lose line-regulation and any variations at the input will pass straight through to theoutput. Hence below VI-min the output voltage will follow the input and the regulator behaves like a simpleconductor. The maximum regulator input voltage must be higher than the rectifier output under no-load. Under thiscondition there is no secondary current reflected back to the primary, thus making the voltage drop acrossRDS-on negligible and allowing the entire converter input voltage to drop across the primary. At this point thesecondary reaches its maximum voltage ofVS-max VIN-max nwith VIN-max as the maximum converter input voltage and n as the transformer turns ratio. Thus to prevent theLDO from damage the maximum regulator input voltage must be higher than VS-max. Table 1 lists the maximumsecondary voltages for various turns ratios commonly applied in push-pull converters with 100 mA output drive.Table 1. Required maximum LDO Input Voltages for Various Push-pull ConfigurationsPUSH-PULL CONVERTER12LDOCONFIGURATIONVIN-max [V]TURNS-RATIOVS-max [V]VI-max [V]3.3 VIN to 3.3 VOUT3.61.5 3%5.66 to 103.3 VIN to 5 VOUT3.62.2 3%8.210Submit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN6501

SN6501www.ti.comSLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012Table 1. Required maximum LDO Input Voltages for Various Push-pull Configurations (continued)PUSH-PULL CONVERTERLDOCONFIGURATIONVIN-max [V]TURNS-RATIOVS-max [V]VI-max [V]5 VIN to 5 VOUT5.51.5 3%8.510DIODE SELECTIONA rectifier diode should always possess low-forward voltage to provide as much voltage to the converter outputas possible. When used in high-frequency switching applications, such as the SN6501 however, the diode mustalso possess a short recovery time. Schottky diodes meet both requirements and are therefore stronglyrecommended in push-pull converter designs. An excellent choice for low-volt applications is the MBR0520L witha typical forward voltage of 275 mV at 100 mA forward current. For higher output voltages such as 10 V andabove use the MBR0530 which provides a higher DC blocking voltage of 30 V.1Forward Current, IF - AForward Current, IF - A10 CTJ 100 C75 C25 C-25 C0.10.01TJ 125 C75 C25 C-40 C0.10.010.10.20.30.4Forward Voltage, VF - V0.50.20.30.4Forward Voltage, VF - V0.5Figure 34. Diode Forward Characteristics for MBR0520L (left) and MBR0530 (right)CAPACITOR SELECTIONThe capacitors in the converter circuit in Figure 3 are multi-layer ceramic chip (MLCC) capacitors.As with all high speed CMOS ICs, the SN6501 requires a bypass capacitor in the range of 10 nF to 100 nF.The input bulk capacitor at the center-tap of the primary supports large currents into the primary during the fastswitching transients. For minimum ripple make this capacitor 10 μF to 22 μF. In a 2-layer PCB design with adedicated ground plane, place this capacitor close to the primary center-tap to minimize trace inductance. In a 4layer board design with low-inductance reference planes for ground and VIN, the capacitor can be placed at thesupply entrance of the board. To ensure low-inductance paths use two vias in parallel for each connection to areference plane or to the primary center-tap.The bulk capacitor at the rectifier output smoothes the output voltage. Make this capacitor 10 μF to 22 μF.The small capacitor at the regulator input is not necessarily required. However good analog design practicesuggests, using a small value of 47 nF to 100 nF improves the regulator’s transient response and noise rejection.The LDO output capacitor buffers the regulated output for the subsequent isolator and transceiver circuitry. Thechoice of output capacitor depends on the LDO stability requirements specified in the data sheet. However, inmost cases, a low-ESR ceramic capacitor in the range of 4.7 μF to 10 μF will satisfy these requirements.Submit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN650113

SN6501SLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012www.ti.comTRANSORMER SELECTIONV-t Product CalculationTo prevent a transformer from saturation its V-t product must be greater than the maximum V-t product appliedby the SN6501. The maximum voltage delivered by the SN6501 is the nominal converter input plus 10%. Themaximum time this voltage is applied to the primary is half the period of the lowest frequency at the specifiedinput voltage. Therefore, the transformer’s minimum V-t product is determined through:TVVtmin ³ VIN-max max IN-max22 fmin(1)Inserting the numeric values from the data sheet into the equation above yields the minimum V-t products of3.6 VVtmin ³ 7.2 Vμsfor 3.3 V, and2 250 kHzVtmin ³5.5 V 9.1 Vμs for 5 V applications.2 300 kHz(2)Common V-t values for low-power center-tapped transformers range from 22 Vμs to 150 Vμs with typicalfootprints of 10 mm x 12 mm. However, transformers specifically designed for PCMCIA applications provide aslittle as 11 Vμs and come with a significantly reduced footprint of 6 mm x 6 mm only.While Vt-wise all of these transformers can be driven by the SN6501, other important factors such as isolationvoltage, transformer wattage, and turns ratio must be considered before making the final decision.Turns Ratio EstimateAssume the rectifier diodes and linear regulator has been selected. Also, it has been determined that thetransformer choosen must have a V-t product of at least 11 Vμs. However, before searching the manufacturerwebsites for a suitable transformer, the user still needs to know its minimum turns ratio that allows the push-pullconverter to operate flawlessly over the specified current and temperature range. This minimum transformationratio is expressed through the ratio of minimum secondary to minimum primary voltage multiplied by a correctionfactor that takes the transformer’s typical efficiency of 97% into account:VP-min VIN-min - VDS-max(3)VS-min must be large enough to allow for a maximum voltage drop, VF-max, across the rectifier diode and stillprovide sufficient input voltage for the regulator to remain in regulation. From the LDO SELECTION section, thisminimum input voltage is known and by adding VF-max gives the minimum secondary voltage with:VS-min VF-max VDO-max VO-max(4)VFVIVSVINVDOVORLVPVDSRDSQFigure 35. Establishing the Required Minimum Turns Ratio Through nmin 1.031 VS-min / VP-minThen calculating the available minimum primary voltage, VP-min, involves subtracting the maximum possible drainsource voltage of the SN6501, VDS-max, from the minimum converter input voltage VIN-min:14Submit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN6501

SN6501www.ti.comSLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012VP-min VIN-min – VDS-max(5)VDS-max however, is the product of the maximum RDS(on) and ID values for a given supply specified in the SN6501data sheet:VDS-max RDS-max IDmax(6)Then inserting Equation 6 into Equation 5 yields:VP-min VIN-min - RDS-max x IDmax(7)and inserting Equation 7 and Equation 4 into Equation 3 provides the minimum turns ration with:V VDO-max VO-maxnmin 1.031 F-maxVIN-min - RDS-max ID-max(8)Example:For a 3.3 VIN to 5 VOUT converter using the rectifier diode MBR0520L and the 5 V LDO TPS76350, the datasheet values taken for a load current of 100 mA and a maximum temperature of 85 C are VF-max 0.2 V,VDO-max 0.2 V, and VO-max 5.175 V.Then assuming that the converter input voltage is taken from a 3.3 V controller supply with a maximum 2%accuracy makes VIN-min 3.234 V. Finally the maximum values for drain-source resistance and drain current at3.3 V are taken from the SN6501 data sheet with RDS-max 3 Ω and ID-max 150 mA.Inserting the values above into Equation 8 yields a minimum turns ratio of:0.2V 0.2V 5.175 Vnmin 1.031 23.234 V - 3 Ω 150 mA(9)Most commercially available transformers for 3-to-5 V push-pull converters offer turns ratios between 2.0 and 2.3with a common tolerance of 3%.HIGHER OUTPUT VOLTAGE DESIGNSThe SN6501 can drive push-pull converters that provide high output voltages of up to 30 V, or bipolar outputs ofup to 15 V. Using commercially available center-tapped transformers, with their rather low turns ratios of 0.8 to5, requires different rectifier topologies to achieve high output voltages. Figure 36 to Figure 39 show some ofthese topologies together with their respective open-circuit output voltages.nnVOUT n·VINVINVOUT 2n·VINVINVOUT- n·VINFigure 36. Bridge Rectifier with Center-TappedSecondary Enables Bipolar OutputsnFigure 37. Bridge Rectifier Without Center-TappedSecondary Performs Voltage DoublingVOUT 2n·V INVINnVOUT 4n·VINVINVOUT- 2n·V INFigure 38. Half-wave Rectifier Without Centertapped Secondary Performs Voltage Doubling,Centered Ground provides Bipolar OutputsFigure 39. Half-wave Rectifier Without CenteredGround and Center-tapped Secondary PerformsVoltage Doubling Twice, Hence Quadrupling VINSubmit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN650115

SN6501SLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012www.ti.comAPPLICATION CIRCUITSThe following application circuits are shown for a 3.3 V input supply commonly taken from the local, regulatedmicro-controller supply. For 5 V input voltages requiring different turn ratios refer to the transformermanufacturers and their websites listed in Table 2.Table 2. Transformer ManufacturersCoilcraft Inc.http://www.coilcraft.comHalo-Electronics Inc.http://www.haloelectronics.comMurata Power Solutionshttp://www.murata-ps.comWurth Electronics Midcom Inchttp://www.midcom-inc.comVS3.3V10 µF2VccD21:2.2 MBR0520L31SN6501D1INOUT5ISO 5VTPS7635010µF 0.1µF31ENGND10µF2MBR0520LGND2 25RSTVDD9OSC0 STELLARIS10LM3S102OSC16MHz618pF18pF 6Vcc2RRE ISO3082DE ISO3088BA1310 W(opt)1210 W (opt)DGND12,7,8GND29,10,15SM7124.7nF/2kVFigure 40. Isolated RS-485 Interface16Submit Documentation FeedbackCopyright 2012, Texas Instruments IncorporatedProduct Folder Link(s) :SN6501

SN6501www.ti.comSLLSEA0C – FEBRUARY 2012 – REVISED MARCH 2012VS10 µF3.3V2VccD21:2.2 MBR0520L31SN6501OUTISO 5V5TPS7635010µF 0.1µFD1IN3EN1GND10µF2MBR0520LGND2 140 12* 337VDDC RST VDD VDDA VBAT 2530CAN0RxOSC0 STELLARIS3126OSC1 LM3S5Y36CAN0Tx7LDO GND GNDA LGND2432710 W (opt)610 W (opt)SM71254.7nF/2kV* multiple pins and capacitors omitted for clarity purposeFigure 41. Isolated CAN InterfaceVIN3.3V0.1µF2Vcc D2 31:2.2 MBR0520L1SN650110µF 0.1µFGND D1110µF4,53INOUT5 VISO5LP2985-50ONMBR0520L4BPGND210nF3.3 µF0.1µFISO-BARRIER0.1µF0.1µF161µF0.1µF1614.7 k2DVcc56XOUTXIN7UCA0TXD153165MSP430 UCA0RXD12F2132P3.1DVss4P3.

The SN6501 is a monolithic oscillator/power-driver,specifically designed for small form factor, isolated power supplies in isolated interface applications. It drives a low-profile,center-tappedtransformer primary from a 3.3 V or 5 V DC power supply. The secondary can be wound to provide any isolated voltage based on transformer turns ratio.

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The SN6501 is a monolithic oscillator/power-driver,specifically designed for small form factor, isolated power supplies in isolated interface applications. It drives a low-profile,center-tappedtransformer primary from a 3.3 V or 5 V DC power supply. The secondary can be wound to provide any isolated voltage based on transformer turns ratio.

The MAX253 monolithic oscillator/power-driver is specifically designed to provide isolated power for an isolated RS-485 or RS-232 data interface. The device drives a center-tapped transformer primary from a 5V or 3.3V DC power supply. The secondary can be wound to provide any isolated voltage needed at power levels up to 1W.

Transformer Design & Design Parameters - Ronnie Minhaz, P.Eng. Transformer Consulting Services Inc. Power Transmission Distribution Transformer Consulting Services Inc. Generator Step-Up Auto-transformer Step-down pads transformer transformer 115/10 or 20 kV 500/230 230/13.8 132 345/161 161 161 230/115 132 230 230/132 115 345 69 500 34 GENERATION TRANSMISSION SUB-TRANSMISSION DISTRIBUTION .

transformer there are hysteresis and eddy current losses in transformer core. Theory of transformer on no-load, and having no winding resistance and no leakage reactance of transformer Let us consider one electrical transformer with only core losses. That means it has only core losses but no copper lose and no leakage reactance of transformer.

Step 13: Now click on the 2-Winding Transformer icon . Place the 2-winding transformer in the same way that you placed the previous two components. Join the primary of the transformer to the Main Bus. Double click the transformer icon and set the following properties: On the Info Tab o Change the transformer ID to "Main Transformer".

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